EdkModulePkg/Bus/Pci/Ehci/Dxe/Ehci.h

   1 /*++
   2
   3 Copyright (c) 2006, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 Module Name:
  13
  14     Ehci.h
  15
  16 Abstract:
  17
  18
  19 Revision History
  20 --*/
  21
  22 #ifndef _EHCI_H
  23 #define _EHCI_H
  24
  25 //
  26 // Universal Host Controller Interface data structures and defines
  27 //
  28 #include <IndustryStandard/pci22.h>
  29
  30
  31 extern UINTN  gEHCDebugLevel;
  32 extern UINTN  gEHCErrorLevel;
  33
  34
  35 #define STALL_1_MACRO_SECOND              1
  36 #define STALL_1_MILLI_SECOND              1000 * STALL_1_MACRO_SECOND
  37 #define STALL_1_SECOND                    1000 * STALL_1_MILLI_SECOND
  38
  39 #define MEM_UNIT_SIZE                     128
  40
  41
  42 #define SETUP_PACKET_PID_CODE             0x02
  43 #define INPUT_PACKET_PID_CODE             0x01
  44 #define OUTPUT_PACKET_PID_CODE            0x0
  45
  46 #define ITD_SELECT_TYPE                   0x0
  47 #define QH_SELECT_TYPE                    0x01
  48 #define SITD_SELECT_TYPE                  0x02
  49 #define FSTN_SELECT_TYPE                  0x03
  50
  51 #define EHCI_SET_PORT_RESET_RECOVERY_TIME     50 * STALL_1_MILLI_SECOND
  52 #define EHCI_CLEAR_PORT_RESET_RECOVERY_TIME   STALL_1_MILLI_SECOND
  53 #define EHCI_GENERIC_TIMEOUT                  50 * STALL_1_MILLI_SECOND
  54 #define EHCI_GENERIC_RECOVERY_TIME            50 * STALL_1_MACRO_SECOND
  55 #define EHCI_SYNC_REQUEST_POLLING_TIME        50 * STALL_1_MACRO_SECOND
  56 #define EHCI_ASYNC_REQUEST_POLLING_TIME       50 * STALL_1_MILLI_SECOND
  57
  58 #define USB_BAR_INDEX                     0 /* how many bytes away from USB_BASE to 0x10 */
  59
  60 #define NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES 16
  61
  62 #define EHCI_MIN_PACKET_SIZE              8
  63 #define EHCI_MAX_PACKET_SIZE              1024
  64 #define EHCI_MAX_FRAME_LIST_LENGTH        1024
  65 #define EHCI_BLOCK_SIZE_WITH_TT           64
  66 #define EHCI_BLOCK_SIZE                   512
  67 #define EHCI_MAX_QTD_CAPACITY             (EFI_PAGE_SIZE * 5)
  68
  69 #define NAK_COUNT_RELOAD                  3
  70 #define QTD_ERROR_COUNTER                 3
  71 #define HIGH_BANDWIDTH_PIPE_MULTIPLIER    1
  72
  73 #define QTD_STATUS_ACTIVE                 0x80
  74 #define QTD_STATUS_HALTED                 0x40
  75 #define QTD_STATUS_BUFFER_ERR             0x20
  76 #define QTD_STATUS_BABBLE_ERR             0x10
  77 #define QTD_STATUS_TRANSACTION_ERR        0x08
  78 #define QTD_STATUS_DO_STOP_SPLIT          0x02
  79 #define QTD_STATUS_DO_START_SPLIT         0
  80 #define QTD_STATUS_DO_PING                0x01
  81 #define QTD_STATUS_DO_OUT                 0
  82
  83 #define DATA0                             0
  84 #define DATA1                             1
  85
  86 #define MICRO_FRAME_0_CHANNEL             0x01
  87 #define MICRO_FRAME_1_CHANNEL             0x02
  88 #define MICRO_FRAME_2_CHANNEL             0x04
  89 #define MICRO_FRAME_3_CHANNEL             0x08
  90 #define MICRO_FRAME_4_CHANNEL             0x10
  91 #define MICRO_FRAME_5_CHANNEL             0x20
  92 #define MICRO_FRAME_6_CHANNEL             0x40
  93 #define MICRO_FRAME_7_CHANNEL             0x80
  94
  95 #define CONTROL_TRANSFER                  0x01
  96 #define BULK_TRANSFER                     0x02
  97 #define SYNC_INTERRUPT_TRANSFER           0x04
  98 #define ASYNC_INTERRUPT_TRANSFER          0x08
  99 #define SYNC_ISOCHRONOUS_TRANSFER         0x10
 100 #define ASYNC_ISOCHRONOUS_TRANSFER        0x20
 101
 102
 103 //
 104 // Enhanced Host Controller Registers definitions
 105 //
 106 extern EFI_DRIVER_BINDING_PROTOCOL  gEhciDriverBinding;
 107 extern EFI_COMPONENT_NAME_PROTOCOL  gEhciComponentName;
 108
 109 #define USBCMD            0x0     /* Command Register Offset 00-03h */
 110 #define USBCMD_RS         0x01    /* Run / Stop */
 111 #define USBCMD_HCRESET    0x02    /* Host controller reset */
 112 #define USBCMD_FLS_512    0x04    /* 512 elements (2048bytes) in Frame List */
 113 #define USBCMD_FLS_256    0x08    /* 256 elements (1024bytes) in Frame List */
 114 #define USBCMD_PSE        0x10    /* Periodic schedule enable */
 115 #define USBCMD_ASE        0x20    /* Asynchronous schedule enable */
 116 #define USBCMD_IAAD       0x40    /* Interrupt on async advance doorbell */
 117
 118 #define USBSTS            0x04    /* Statue Register Offset 04-07h */
 119 #define USBSTS_HSE        0x10    /* Host system error */
 120 #define USBSTS_IAA        0x20    /* Interrupt on async advance */
 121 #define USBSTS_HCH        0x1000  /* Host controller halted */
 122 #define USBSTS_PSS        0x4000  /* Periodic schedule status */
 123 #define USBSTS_ASS        0x8000  /* Asynchronous schedule status */
 124
 125 #define USBINTR           0x08    /* Command Register Offset 08-0bh */
 126
 127 #define FRINDEX           0x0c    /* Frame Index Offset 0c-0fh */
 128
 129 #define CTRLDSSGMENT      0x10    /* 4G Segment Selector Offset 10-13h */
 130
 131 #define PERIODICLISTBASE  0x14    /* Frame List Base Address Offset 14-17h */
 132
 133 #define ASYNCLISTADDR     0x18    /* Next Asynchronous List Address Offset 18-1bh */
 134
 135 #define CONFIGFLAG        0x40    /* Configured Flag Register Offset 40-43h */
 136 #define CONFIGFLAG_CF     0x01    /* Configure Flag */
 137
 138 #define PORTSC            0x44    /* Port Status/Control Offset 44-47h */
 139 #define PORTSC_CCS        0x01    /* Current Connect Status*/
 140 #define PORTSC_CSC        0x02    /* Connect Status Change */
 141 #define PORTSC_PED        0x04    /* Port Enable / Disable */
 142 #define PORTSC_PEDC       0x08    /* Port Enable / Disable Change */
 143 #define PORTSC_OCA        0x10    /* Over current Active */
 144 #define PORTSC_OCC        0x20    /* Over current Change */
 145 #define PORTSC_FPR        0x40    /* Force Port Resume */
 146 #define PORTSC_SUSP       0x80    /* Port Suspend State */
 147 #define PORTSC_PR         0x100   /* Port Reset */
 148 #define PORTSC_LS_KSTATE  0x400   /* Line Status K-state */
 149 #define PORTSC_LS_JSTATE  0x800   /* Line Status J-state */
 150 #define PORTSC_PP         0x1000  /* Port Power */
 151 #define PORTSC_PO         0x2000  /* Port Owner */
 152
 153 #define CAPLENGTH         0       /* Capability Register Length 00h */
 154
 155 #define HCIVERSION        0x02    /* Interface Version Number  02-03h */
 156
 157 #define HCSPARAMS         0x04    /* Structural Parameters 04-07h */
 158 #define HCSP_NPORTS       0x0f    /* Number of physical downstream ports on host controller */
 159
 160 #define HCCPARAMS         0x08    /* Capability Parameters 08-0bh */
 161 #define HCCP_64BIT        0x01    /* 64-bit Addressing Capability */
 162 #define HCCP_PFLF         0x02    /* Programmable Frame List Flag */
 163 #define HCCP_EECP         0xff00  /* EHCI Extemded Capabilities Pointer */
 164
 165 #define HCSPPORTROUTE     0x0c    /* Companion Port Route Description 60b */
 166
 167 #define CLASSC            0x09    /* Class Code 09-0bh */
 168
 169 #define USBBASE           0x10    /* Base Address to Memory-mapped Host Controller Register Space 10-13h */
 170
 171 #define SBRN              0x60    /* Serial Bus Release Number 60h */
 172
 173 #define FLADJ             0x61    /* Frame Length Adjustment Register 61h */
 174
 175 #define PORTWAKECAP       0x62    /* Port wake capablilities register(OPIONAL)  61-62h */
 176
 177 //
 178 // PCI Configuration Registers
 179 //
 180 #define EHCI_PCI_CLASSC         0x09
 181 #define EHCI_PCI_MEMORY_BASE    0x10
 182
 183 //
 184 // Memory Offset Registers
 185 //
 186 #define EHCI_MEMORY_CAPLENGTH   0x0
 187 #define EHCI_MEMORY_CONFIGFLAG  0x40
 188
 189 //
 190 // USB Base Class Code,Sub-Class Code and Programming Interface
 191 //
 192 #define PCI_CLASSC_PI_EHCI      0x20
 193
 194 #define SETUP_PACKET_ID         0x2D
 195 #define INPUT_PACKET_ID         0x69
 196 #define OUTPUT_PACKET_ID        0xE1
 197 #define ERROR_PACKET_ID         0x55
 198
 199 #define bit(a)                  (1 << (a))
 200
 201 #define GET_0B_TO_31B(Addr)     (((UINTN) Addr) & (0xffffffff))
 202 #define GET_32B_TO_63B(Addr)    ((UINTN)RShiftU64((UINTN) Addr, 32) & (0xffffffff))
 203
 204
 205 //
 206 // Ehci Data and Ctrl Structures
 207 //
 208 #pragma pack(1)
 209
 210 typedef struct {
 211   UINT8 PI;
 212   UINT8 SubClassCode;
 213   UINT8 BaseCode;
 214 } USB_CLASSC;
 215
 216 //
 217 //32 Bytes Aligned
 218 //
 219 typedef struct {
 220   UINT32  NextQtdTerminate : 1;
 221   UINT32  Rsvd1 : 4;
 222   UINT32  NextQtdPointer : 27;
 223
 224   UINT32  AltNextQtdTerminate : 1;
 225   UINT32  Rsvd2 : 4;
 226   UINT32  AltNextQtdPointer : 27;
 227
 228   UINT32  Status : 8;
 229   UINT32  PidCode : 2;
 230   UINT32  ErrorCount : 2;
 231   UINT32  CurrentPage : 3;
 232   UINT32  InterruptOnComplete : 1;
 233   UINT32  TotalBytes : 15;
 234   UINT32  DataToggle : 1;
 235
 236   UINT32  CurrentOffset : 12;
 237   UINT32  BufferPointer0 : 20;
 238
 239   UINT32  Rsvd3 : 12;
 240   UINT32  BufferPointer1 : 20;
 241
 242   UINT32  Rsvd4 : 12;
 243   UINT32  BufferPointer2 : 20;
 244
 245   UINT32  Rsvd5 : 12;
 246   UINT32  BufferPointer3 : 20;
 247
 248   UINT32  Rsvd6 : 12;
 249   UINT32  BufferPointer4 : 20;
 250
 251   UINT32  PAD[5];
 252 } EHCI_QTD_HW;
 253
 254 //
 255 //32 Bytes Aligned
 256 //
 257 typedef struct {
 258   UINT32  QhTerminate : 1;
 259   UINT32  SelectType : 2;
 260   UINT32  Rsvd1 : 2;
 261   UINT32  QhHorizontalPointer : 27;
 262
 263   UINT32  DeviceAddr : 7;
 264   UINT32  Inactive : 1;
 265   UINT32  EndpointNum : 4;
 266   UINT32  EndpointSpeed : 2;
 267   UINT32  DataToggleControl : 1;
 268   UINT32  HeadReclamationFlag : 1;
 269   UINT32  MaxPacketLen : 11;
 270   UINT32  ControlEndpointFlag : 1;
 271   UINT32  NakCountReload : 4;
 272
 273   UINT32  InerruptScheduleMask : 8;
 274   UINT32  SplitComletionMask : 8;
 275   UINT32  HubAddr : 7;
 276   UINT32  PortNum : 7;
 277   UINT32  Multiplier : 2;
 278
 279   UINT32  Rsvd2 : 5;
 280   UINT32  CurrentQtdPointer : 27;
 281
 282   UINT32  NextQtdTerminate : 1;
 283   UINT32  Rsvd3 : 4;
 284   UINT32  NextQtdPointer : 27;
 285
 286   UINT32  AltNextQtdTerminate : 1;
 287   UINT32  NakCount : 4;
 288   UINT32  AltNextQtdPointer : 27;
 289
 290   UINT32  Status : 8;
 291   UINT32  PidCode : 2;
 292   UINT32  ErrorCount : 2;
 293   UINT32  CurrentPage : 3;
 294   UINT32  InterruptOnComplete : 1;
 295   UINT32  TotalBytes : 15;
 296   UINT32  DataToggle : 1;
 297
 298   UINT32  CurrentOffset : 12;
 299   UINT32  BufferPointer0 : 20;
 300
 301   UINT32  CompleteSplitMask : 8;
 302   UINT32  Rsvd4 : 4;
 303   UINT32  BufferPointer1 : 20;
 304
 305   UINT32  FrameTag : 5;
 306   UINT32  SplitBytes : 7;
 307   UINT32  BufferPointer2 : 20;
 308
 309   UINT32  Rsvd5 : 12;
 310   UINT32  BufferPointer3 : 20;
 311
 312   UINT32  Rsvd6 : 12;
 313   UINT32  BufferPointer4 : 20;
 314
 315   UINT32  Pad[5];
 316 } EHCI_QH_HW;
 317
 318 typedef struct {
 319   UINT32  LinkTerminate : 1;
 320   UINT32  SelectType : 2;
 321   UINT32  Rsvd : 2;
 322   UINT32  LinkPointer : 27;
 323 } FRAME_LIST_ENTRY;
 324
 325 #pragma pack()
 326
 327 typedef struct _EHCI_QTD_ENTITY     EHCI_QTD_ENTITY;
 328 typedef struct _EHCI_QH_ENTITY      EHCI_QH_ENTITY;
 329 typedef struct _EHCI_ASYNC_REQUEST  EHCI_ASYNC_REQUEST;
 330 //
 331 //Aligan On 32 Bytes
 332 //
 333 struct _EHCI_QTD_ENTITY {
 334   EHCI_QTD_HW     Qtd;
 335   UINT32          TotalBytes;
 336   UINT32          StaticTotalBytes;
 337   UINT32          StaticCurrentOffset;
 338   EHCI_QTD_ENTITY *Prev;
 339   EHCI_QTD_ENTITY *Next;
 340   EHCI_QTD_ENTITY *AltNext;
 341   EHCI_QH_ENTITY  *SelfQh;
 342 };
 343 //
 344 //Aligan On 32 Bytes
 345 //
 346 struct _EHCI_QH_ENTITY {
 347   EHCI_QH_HW      Qh;
 348   EHCI_QH_ENTITY  *Next;
 349   EHCI_QH_ENTITY  *Prev;
 350   EHCI_QTD_ENTITY *FirstQtdPtr;
 351   EHCI_QTD_ENTITY *LastQtdPtr;
 352   EHCI_QTD_ENTITY *AltQtdPtr;
 353   UINTN           Interval;
 354   UINT8           TransferType;
 355 };
 356
 357 #define GET_QH_ENTITY_ADDR(a)   ((EHCI_QH_ENTITY *) a)
 358 #define GET_QTD_ENTITY_ADDR(a)  ((EHCI_QTD_ENTITY *) a)
 359
 360
 361 //
 362 // Ehci Managment Structures
 363 //
 364 #define USB2_HC_DEV_FROM_THIS(a)  CR (a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)
 365
 366 #define USB2_HC_DEV_SIGNATURE     EFI_SIGNATURE_32 ('e', 'h', 'c', 'i')
 367
 368 struct _EHCI_ASYNC_REQUEST {
 369   UINT8                           TransferType;
 370   EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunc;
 371   VOID                            *Context;
 372   EHCI_ASYNC_REQUEST              *Prev;
 373   EHCI_ASYNC_REQUEST              *Next;
 374   EHCI_QH_ENTITY                  *QhPtr;
 375 };
 376
 377 typedef struct _MEMORY_MANAGE_HEADER {
 378   UINT8                         *BitArrayPtr;
 379   UINTN                         BitArraySizeInBytes;
 380   UINT8                         *MemoryBlockPtr;
 381   UINTN                         MemoryBlockSizeInBytes;
 382   VOID                          *Mapping;
 383   struct _MEMORY_MANAGE_HEADER  *Next;
 384 } MEMORY_MANAGE_HEADER;
 385
 386 typedef struct _USB2_HC_DEV {
 387   UINTN                     Signature;
 388   EFI_PCI_IO_PROTOCOL       *PciIo;
 389   EFI_USB2_HC_PROTOCOL      Usb2Hc;
 390   UINTN                     PeriodicFrameListLength;
 391   VOID                      *PeriodicFrameListBuffer;
 392   VOID                      *PeriodicFrameListMap;
 393   VOID                      *AsyncList;
 394   EHCI_ASYNC_REQUEST        *AsyncRequestList;
 395   EFI_EVENT                 AsyncRequestEvent;
 396   EFI_UNICODE_STRING_TABLE  *ControllerNameTable;
 397   MEMORY_MANAGE_HEADER      *MemoryHeader;
 398   UINT8                     Is64BitCapable;
 399   UINT32                    High32BitAddr;
 400   EHCI_QH_ENTITY            *NULLQH;
 401   UINT32                    UsbCapabilityLen;
 402   UINT16                    DeviceSpeed[16];
 403 } USB2_HC_DEV;
 404
 405
 406 //
 407 // Internal Functions Declaration
 408 //
 409
 410 //
 411 // EhciMem Functions
 412 //
 413 EFI_STATUS
 414 CreateMemoryBlock (
 415   IN  USB2_HC_DEV               *HcDev,
 416   OUT MEMORY_MANAGE_HEADER      **MemoryHeader,
 417   IN  UINTN                     MemoryBlockSizeInPages
 418   )
 419 /*++
 420
 421 Routine Description:
 422
 423   Use PciIo->AllocateBuffer to allocate common buffer for the memory block,
 424   and use PciIo->Map to map the common buffer for Bus Master Read/Write.
 425
 426 Arguments:
 427
 428   HcDev                  - USB2_HC_DEV
 429   MemoryHeader           - MEMORY_MANAGE_HEADER to output
 430   MemoryBlockSizeInPages - MemoryBlockSizeInPages
 431
 432 Returns:
 433
 434   EFI_SUCCESS           Success
 435   EFI_OUT_OF_RESOURCES  Fail for no resources
 436   EFI_UNSUPPORTED       Unsupported currently
 437
 438 --*/
 439 ;
 440
 441 EFI_STATUS
 442 FreeMemoryHeader (
 443   IN USB2_HC_DEV               *HcDev,
 444   IN MEMORY_MANAGE_HEADER      *MemoryHeader
 445   )
 446 /*++
 447
 448 Routine Description:
 449
 450   Free Memory Header
 451
 452 Arguments:
 453
 454   HcDev         - USB2_HC_DEV
 455   MemoryHeader  - MemoryHeader to be freed
 456
 457 Returns:
 458
 459   EFI_SUCCESS            Success
 460   EFI_INVALID_PARAMETER  Parameter is error
 461
 462 --*/
 463 ;
 464
 465 VOID
 466 InsertMemoryHeaderToList (
 467   IN MEMORY_MANAGE_HEADER     *MemoryHeader,
 468   IN MEMORY_MANAGE_HEADER     *NewMemoryHeader
 469   )
 470 /*++
 471
 472 Routine Description:
 473
 474   Insert Memory Header To List
 475
 476 Arguments:
 477
 478   MemoryHeader    - MEMORY_MANAGE_HEADER
 479   NewMemoryHeader - MEMORY_MANAGE_HEADER
 480
 481 Returns:
 482
 483   VOID
 484
 485 --*/
 486 ;
 487
 488 EFI_STATUS
 489 AllocMemInMemoryBlock (
 490   IN  MEMORY_MANAGE_HEADER     *MemoryHeader,
 491   OUT VOID                     **Pool,
 492   IN  UINTN                    NumberOfMemoryUnit
 493   )
 494 /*++
 495
 496 Routine Description:
 497
 498   Alloc Memory In MemoryBlock
 499
 500 Arguments:
 501
 502   MemoryHeader        - MEMORY_MANAGE_HEADER
 503   Pool                - Place to store pointer to memory
 504   NumberOfMemoryUnit  - Number Of Memory Unit
 505
 506 Returns:
 507
 508   EFI_SUCCESS    Success
 509   EFI_NOT_FOUND  Can't find the free memory
 510
 511 --*/
 512 ;
 513
 514 BOOLEAN
 515 IsMemoryBlockEmptied (
 516   IN MEMORY_MANAGE_HEADER     *MemoryHeaderPtr
 517   )
 518 /*++
 519
 520 Routine Description:
 521
 522   Is Memory Block Emptied
 523
 524 Arguments:
 525
 526   MemoryHeaderPtr - MEMORY_MANAGE_HEADER
 527
 528 Returns:
 529
 530   TRUE    Empty
 531   FALSE   Not Empty
 532
 533 --*/
 534 ;
 535
 536 VOID
 537 DelinkMemoryBlock (
 538   IN MEMORY_MANAGE_HEADER     *FirstMemoryHeader,
 539   IN MEMORY_MANAGE_HEADER     *NeedFreeMemoryHeader
 540   )
 541 /*++
 542
 543 Routine Description:
 544
 545   Delink Memory Block
 546
 547 Arguments:
 548
 549   FirstMemoryHeader     - MEMORY_MANAGE_HEADER
 550   NeedFreeMemoryHeader  - MEMORY_MANAGE_HEADER
 551
 552 Returns:
 553
 554   VOID
 555
 556 --*/
 557 ;
 558
 559 EFI_STATUS
 560 InitialMemoryManagement (
 561   IN USB2_HC_DEV     *HcDev
 562   )
 563 /*++
 564
 565 Routine Description:
 566
 567   Initialize Memory Management
 568
 569 Arguments:
 570
 571   HcDev - USB2_HC_DEV
 572
 573 Returns:
 574
 575   EFI_SUCCESS        Success
 576   EFI_DEVICE_ERROR   Fail
 577
 578 --*/
 579 ;
 580
 581 EFI_STATUS
 582 DeinitialMemoryManagement (
 583   IN USB2_HC_DEV     *HcDev
 584   )
 585 /*++
 586
 587 Routine Description:
 588
 589   Deinitialize Memory Management
 590
 591 Arguments:
 592
 593   HcDev - USB2_HC_DEV
 594
 595 Returns:
 596
 597   EFI_SUCCESS        Success
 598   EFI_DEVICE_ERROR   Fail
 599
 600 --*/
 601 ;
 602
 603 EFI_STATUS
 604 EhciAllocatePool (
 605   IN  USB2_HC_DEV     *HcDev,
 606   OUT UINT8           **Pool,
 607   IN  UINTN           AllocSize
 608   )
 609 /*++
 610
 611 Routine Description:
 612
 613   Ehci Allocate Pool
 614
 615 Arguments:
 616
 617   HcDev     - USB2_HC_DEV
 618   Pool      - Place to store pointer to the memory buffer
 619   AllocSize - Alloc Size
 620
 621 Returns:
 622
 623   EFI_SUCCESS        Success
 624   EFI_DEVICE_ERROR   Fail
 625
 626 --*/
 627 ;
 628
 629 VOID
 630 EhciFreePool (
 631   IN USB2_HC_DEV     *HcDev,
 632   IN UINT8           *Pool,
 633   IN UINTN           AllocSize
 634   )
 635 /*++
 636
 637 Routine Description:
 638
 639   Uhci Free Pool
 640
 641 Arguments:
 642
 643   HcDev     - USB_HC_DEV
 644   Pool      - Pool to free
 645   AllocSize - Pool size
 646
 647 Returns:
 648
 649   VOID
 650
 651 --*/
 652 ;
 653
 654 //
 655 // EhciReg Functions
 656 //
 657 EFI_STATUS
 658 ReadEhcCapabiltiyReg (
 659   IN USB2_HC_DEV             *HcDev,
 660   IN UINT32                  CapabiltiyRegAddr,
 661   IN OUT UINT32              *Data
 662   )
 663 /*++
 664
 665 Routine Description:
 666
 667   Read  Ehc Capabitlity register
 668
 669 Arguments:
 670
 671   HcDev             - USB2_HC_DEV
 672   CapabiltiyRegAddr - Ehc Capability register address
 673   Data              - A pointer to data read from register
 674
 675 Returns:
 676
 677   EFI_SUCCESS        Success
 678   EFI_DEVICE_ERROR   Fail
 679
 680 --*/
 681 ;
 682
 683 EFI_STATUS
 684 ReadEhcOperationalReg (
 685   IN USB2_HC_DEV             *HcDev,
 686   IN UINT32                  OperationalRegAddr,
 687   IN OUT UINT32              *Data
 688   )
 689 /*++
 690
 691 Routine Description:
 692
 693   Read  Ehc Operation register
 694
 695 Arguments:
 696
 697   HcDev                - USB2_HC_DEV
 698   OperationalRegAddr   - Ehc Operation register address
 699   Data                 - A pointer to data read from register
 700
 701 Returns:
 702
 703   EFI_SUCCESS        Success
 704   EFI_DEVICE_ERROR   Fail
 705
 706 --*/
 707 ;
 708
 709 EFI_STATUS
 710 WriteEhcOperationalReg (
 711   IN USB2_HC_DEV             *HcDev,
 712   IN UINT32                  OperationalRegAddr,
 713   IN UINT32                  Data
 714   )
 715 /*++
 716
 717 Routine Description:
 718
 719   Write  Ehc Operation register
 720
 721 Arguments:
 722
 723   HcDev                - USB2_HC_DEV
 724   OperationalRegAddr   - Ehc Operation register address
 725   Data                 - 32bit write to register
 726
 727 Returns:
 728
 729   EFI_SUCCESS        Success
 730   EFI_DEVICE_ERROR   Fail
 731
 732 --*/
 733 ;
 734
 735 EFI_STATUS
 736 SetEhcDoorbell (
 737   IN  USB2_HC_DEV     *HcDev
 738   )
 739 /*++
 740
 741 Routine Description:
 742
 743   Set Ehc door bell bit
 744
 745 Arguments:
 746
 747   HcDev - USB2_HC_DEV
 748
 749 Returns:
 750
 751   EFI_SUCCESS       Success
 752   EFI_DEVICE_ERROR  Fail
 753
 754 --*/
 755 ;
 756
 757 EFI_STATUS
 758 SetFrameListLen (
 759   IN USB2_HC_DEV     *HcDev,
 760   IN UINTN           Length
 761   )
 762 /*++
 763
 764 Routine Description:
 765
 766   Set the length of Frame List
 767
 768 Arguments:
 769
 770   HcDev    - USB2_HC_DEV
 771   Length   - the required length of frame list
 772
 773 Returns:
 774
 775   EFI_SUCCESS            Success
 776   EFI_INVALID_PARAMETER  Invalid parameter
 777   EFI_DEVICE_ERROR       Fail
 778
 779 --*/
 780 ;
 781
 782 BOOLEAN
 783 IsFrameListProgrammable (
 784   IN  USB2_HC_DEV     *HcDev
 785   )
 786 /*++
 787
 788 Routine Description:
 789
 790   Whether frame list is programmable
 791
 792 Arguments:
 793
 794   HcDev - USB2_HC_DEV
 795
 796 Returns:
 797
 798   TRUE   Programmable
 799   FALSE  Unprogrammable
 800
 801 --*/
 802 ;
 803
 804 BOOLEAN
 805 IsPeriodicScheduleEnabled (
 806   IN  USB2_HC_DEV     *HcDev
 807   )
 808 /*++
 809
 810 Routine Description:
 811
 812   Whether periodic schedule is enabled
 813
 814 Arguments:
 815
 816   HcDev - USB2_HC_DEV
 817
 818 Returns:
 819
 820   TRUE   Enabled
 821   FALSE  Disabled
 822
 823 --*/
 824 ;
 825
 826 BOOLEAN
 827 IsAsyncScheduleEnabled (
 828   IN  USB2_HC_DEV     *HcDev
 829   )
 830 /*++
 831
 832 Routine Description:
 833
 834   Whether asynchronous schedule is enabled
 835
 836 Arguments:
 837
 838   HcDev - USB2_HC_DEV
 839
 840 Returns:
 841
 842   TRUE   Enabled
 843   FALSE  Disabled
 844
 845 --*/
 846 ;
 847
 848 BOOLEAN
 849 IsEhcPortEnabled (
 850   IN  USB2_HC_DEV     *HcDev,
 851   IN  UINT8           PortNum
 852   )
 853 /*++
 854
 855 Routine Description:
 856
 857   Whether port is enabled
 858
 859 Arguments:
 860
 861   HcDev - USB2_HC_DEV
 862
 863 Returns:
 864
 865   TRUE   Enabled
 866   FALSE  Disabled
 867
 868 --*/
 869 ;
 870
 871 BOOLEAN
 872 IsEhcReseted (
 873   IN  USB2_HC_DEV     *HcDev
 874   )
 875 /*++
 876
 877 Routine Description:
 878
 879   Whether Ehc is halted
 880
 881 Arguments:
 882
 883   HcDev - USB2_HC_DEV
 884
 885 Returns:
 886
 887   TRUE   Reseted
 888   FALSE  Unreseted
 889
 890 --*/
 891 ;
 892
 893 BOOLEAN
 894 IsEhcHalted (
 895   IN  USB2_HC_DEV     *HcDev
 896   )
 897 /*++
 898
 899 Routine Description:
 900
 901   Whether Ehc is halted
 902
 903 Arguments:
 904
 905   HcDev  - USB2_HC_DEV
 906
 907 Returns:
 908
 909   TRUE   Halted
 910   FALSE  Not halted
 911
 912 --*/
 913 ;
 914
 915 BOOLEAN
 916 IsEhcSysError (
 917   IN  USB2_HC_DEV     *HcDev
 918   )
 919 /*++
 920
 921 Routine Description:
 922
 923   Whether Ehc is system error
 924
 925 Arguments:
 926
 927   HcDev  - USB2_HC_DEV
 928
 929 Returns:
 930
 931   TRUE   System error
 932   FALSE  No system error
 933
 934 --*/
 935 ;
 936
 937 BOOLEAN
 938 IsHighSpeedDevice (
 939   IN EFI_USB2_HC_PROTOCOL *This,
 940   IN UINT8                PortNum
 941   )
 942 /*++
 943
 944 Routine Description:
 945
 946   Whether high speed device attached
 947
 948 Arguments:
 949
 950   HcDev - USB2_HC_DEV
 951
 952 Returns:
 953
 954   TRUE   High speed
 955   FALSE  Full speed
 956
 957 --*/
 958 ;
 959
 960 EFI_STATUS
 961 WaitForEhcReset (
 962   IN USB2_HC_DEV             *HcDev,
 963   IN UINTN                   Timeout
 964   )
 965 /*++
 966
 967 Routine Description:
 968
 969   wait for Ehc reset or timeout
 970
 971 Arguments:
 972
 973   HcDev   - USB2_HC_DEV
 974   Timeout - timeout threshold
 975
 976 Returns:
 977
 978   EFI_SUCCESS    Success
 979   EFI_TIMEOUT    Timeout
 980
 981 --*/
 982 ;
 983
 984 EFI_STATUS
 985 WaitForEhcHalt (
 986   IN USB2_HC_DEV             *HcDev,
 987   IN UINTN                   Timeout
 988   )
 989 /*++
 990
 991 Routine Description:
 992
 993   wait for Ehc halt or timeout
 994
 995 Arguments:
 996
 997   HcDev   - USB2_HC_DEV
 998   Timeout - timeout threshold
 999
1000 Returns:
1001
1002   EFI_SUCCESS    Success
1003   EFI_TIMEOUT    Timeout
1004
1005 --*/
1006 ;
1007
1008 EFI_STATUS
1009 WaitForEhcNotHalt (
1010   IN USB2_HC_DEV             *HcDev,
1011   IN UINTN                   Timeout
1012   )
1013 /*++
1014
1015 Routine Description:
1016
1017   wait for Ehc not halt or timeout
1018
1019 Arguments:
1020
1021   HcDev   - USB2_HC_DEV
1022   Timeout - timeout threshold
1023
1024 Returns:
1025
1026   EFI_SUCCESS    Success
1027   EFI_TIMEOUT    Timeout
1028
1029 --*/
1030 ;
1031
1032 EFI_STATUS
1033 WaitForEhcDoorbell (
1034   IN  USB2_HC_DEV            *HcDev,
1035   IN UINTN                   Timeout
1036   )
1037 /*++
1038
1039 Routine Description:
1040
1041   Wait for periodic schedule disable or timeout
1042
1043 Arguments:
1044
1045   HcDev   - USB2_HC_DEV
1046   Timeout - timeout threshold
1047
1048 Returns:
1049
1050   EFI_SUCCESS    Success
1051   EFI_TIMEOUT    Timeout
1052
1053 --*/
1054 ;
1055
1056 EFI_STATUS
1057 WaitForAsyncScheduleEnable (
1058   IN USB2_HC_DEV             *HcDev,
1059   IN UINTN                   Timeout
1060   )
1061 /*++
1062
1063 Routine Description:
1064
1065   Wait for Ehc asynchronous schedule enable or timeout
1066
1067 Arguments:
1068
1069   HcDev   - USB2_HC_DEV
1070   Timeout - timeout threshold
1071
1072 Returns:
1073
1074   EFI_SUCCESS    Success
1075   EFI_TIMEOUT    Timeout
1076
1077 --*/
1078 ;
1079
1080 EFI_STATUS
1081 WaitForAsyncScheduleDisable (
1082   IN USB2_HC_DEV             *HcDev,
1083   IN UINTN                   Timeout
1084   )
1085 /*++
1086
1087 Routine Description:
1088
1089   Wait for Ehc asynchronous schedule disable or timeout
1090
1091 Arguments:
1092
1093   HcDev   - USB2_HC_DEV
1094   Timeout - timeout threshold
1095
1096 Returns:
1097
1098   EFI_SUCCESS    Success
1099   EFI_TIMEOUT    Timeout
1100
1101 --*/
1102 ;
1103
1104 EFI_STATUS
1105 WaitForPeriodicScheduleEnable (
1106   IN USB2_HC_DEV             *HcDev,
1107   IN UINTN                   Timeout
1108   )
1109 /*++
1110
1111 Routine Description:
1112
1113   Wait for Ehc periodic schedule enable or timeout
1114
1115 Arguments:
1116
1117   HcDev   - USB2_HC_DEV
1118   Timeout - timeout threshold
1119
1120 Returns:
1121
1122   EFI_SUCCESS    Success
1123   EFI_TIMEOUT    Timeout
1124
1125 --*/
1126 ;
1127
1128 EFI_STATUS
1129 WaitForPeriodicScheduleDisable (
1130   IN USB2_HC_DEV             *HcDev,
1131   IN UINTN                   Timeout
1132   )
1133 /*++
1134
1135 Routine Description:
1136
1137   Wait for periodic schedule disable or timeout
1138
1139 Arguments:
1140
1141   HcDev   - USB2_HC_DEV
1142   Timeout - timeout threshold
1143
1144 Returns:
1145
1146   EFI_SUCCESS    Success
1147   EFI_TIMEOUT    Timeout
1148
1149 --*/
1150 ;
1151
1152 EFI_STATUS
1153 GetCapabilityLen (
1154   IN USB2_HC_DEV     *HcDev
1155   )
1156 /*++
1157
1158 Routine Description:
1159
1160   Get the length of capability register
1161
1162 Arguments:
1163
1164   HcDev - USB2_HC_DEV
1165
1166 Returns:
1167
1168   EFI_SUCCESS       Success
1169   EFI_DEVICE_ERROR  Fail
1170
1171 --*/
1172 ;
1173
1174 EFI_STATUS
1175 SetFrameListBaseAddr (
1176   IN USB2_HC_DEV     *HcDev,
1177   IN UINT32          FrameBuffer
1178   )
1179 /*++
1180
1181 Routine Description:
1182
1183   Set base address of frame list first entry
1184
1185 Arguments:
1186
1187   HcDev       - USB2_HC_DEV
1188   FrameBuffer - base address of first entry of frame list
1189
1190 Returns:
1191
1192   EFI_SUCCESS       Success
1193   EFI_DEVICE_ERROR  Fail
1194
1195 --*/
1196 ;
1197
1198 EFI_STATUS
1199 SetAsyncListAddr (
1200   IN USB2_HC_DEV        *HcDev,
1201   IN EHCI_QH_ENTITY     *QhPtr
1202   )
1203 /*++
1204
1205 Routine Description:
1206
1207   Set address of first Async schedule Qh
1208
1209 Arguments:
1210
1211   HcDev    - USB2_HC_DEV
1212   QhPtr    - A pointer to first Qh in the Async schedule
1213
1214 Returns:
1215
1216   EFI_SUCCESS       Success
1217   EFI_DEVICE_ERROR  Fail
1218
1219 --*/
1220 ;
1221
1222 EFI_STATUS
1223 SetCtrlDataStructSeg (
1224   IN USB2_HC_DEV     *HcDev
1225   )
1226 /*++
1227
1228 Routine Description:
1229
1230   Set address of first Async schedule Qh
1231
1232 Arguments:
1233
1234   HcDev    - USB2_HC_DEV
1235   QhPtr    - A pointer to first Qh in the Async schedule
1236
1237 Returns:
1238
1239   EFI_SUCCESS       Success
1240   EFI_DEVICE_ERROR  Fail
1241
1242 --*/
1243 ;
1244
1245 EFI_STATUS
1246 SetPortRoutingEhc (
1247   IN USB2_HC_DEV     *HcDev
1248   )
1249 /*++
1250
1251 Routine Description:
1252
1253   Set Ehc port routing bit
1254
1255 Arguments:
1256
1257   HcDev - USB2_HC_DEV
1258
1259 Returns:
1260
1261   EFI_SUCCESS       Success
1262   EFI_DEVICE_ERROR  Fail
1263
1264 --*/
1265 ;
1266
1267 EFI_STATUS
1268 EnablePeriodicSchedule (
1269   IN  USB2_HC_DEV     *HcDev
1270   )
1271 /*++
1272
1273 Routine Description:
1274
1275   Enable periodic schedule
1276
1277 Arguments:
1278
1279   HcDev - USB2_HC_DEV
1280
1281 Returns:
1282
1283   EFI_SUCCESS       Success
1284   EFI_DEVICE_ERROR  Fail
1285
1286 --*/
1287 ;
1288
1289 EFI_STATUS
1290 DisablePeriodicSchedule (
1291   IN  USB2_HC_DEV     *HcDev
1292   )
1293 /*++
1294
1295 Routine Description:
1296
1297   Disable periodic schedule
1298
1299 Arguments:
1300
1301   HcDev - USB2_HC_DEV
1302
1303 Returns:
1304
1305   EFI_SUCCESS       Success
1306   EFI_DEVICE_ERROR  Fail
1307
1308 --*/
1309 ;
1310
1311 EFI_STATUS
1312 EnableAsynchronousSchedule (
1313   IN  USB2_HC_DEV     *HcDev
1314   )
1315 /*++
1316
1317 Routine Description:
1318
1319   Enable asynchrounous schedule
1320
1321 Arguments:
1322
1323   HcDev - USB2_HC_DEV
1324
1325 Returns:
1326
1327   EFI_SUCCESS       Success
1328   EFI_DEVICE_ERROR  Fail
1329
1330 --*/
1331 ;
1332
1333 EFI_STATUS
1334 DisableAsynchronousSchedule (
1335   IN  USB2_HC_DEV     *HcDev
1336   )
1337 /*++
1338
1339 Routine Description:
1340
1341   Disable asynchrounous schedule
1342
1343 Arguments:
1344
1345   HcDev - USB2_HC_DEV
1346
1347 Returns:
1348
1349   EFI_SUCCESS       Success
1350   EFI_DEVICE_ERROR  Fail
1351
1352 --*/
1353 ;
1354
1355 EFI_STATUS
1356 StartScheduleExecution (
1357   IN  USB2_HC_DEV     *HcDev
1358   )
1359 /*++
1360
1361 Routine Description:
1362
1363   Start Ehc schedule execution
1364
1365 Arguments:
1366
1367   HcDev - USB2_HC_DEV
1368
1369 Returns:
1370
1371   EFI_SUCCESS       Success
1372   EFI_DEVICE_ERROR  Fail
1373
1374 --*/
1375 ;
1376
1377 EFI_STATUS
1378 ResetEhc (
1379   IN  USB2_HC_DEV     *HcDev
1380   )
1381 /*++
1382
1383 Routine Description:
1384
1385   Reset Ehc
1386
1387 Arguments:
1388
1389   HcDev - USB2_HC_DEV
1390
1391 Returns:
1392
1393   EFI_SUCCESS       Success
1394   EFI_DEVICE_ERROR  Fail
1395
1396 --*/
1397 ;
1398
1399 EFI_STATUS
1400 ClearEhcAllStatus (
1401   IN  USB2_HC_DEV     *HcDev
1402   )
1403 /*++
1404
1405 Routine Description:
1406
1407   Clear Ehc all status bits
1408
1409 Arguments:
1410
1411   HcDev - USB2_HC_DEV
1412
1413 Returns:
1414
1415   EFI_SUCCESS        Success
1416   EFI_DEVICE_ERROR   Fail
1417
1418 --*/
1419 ;
1420
1421 //
1422 // EhciSched Functions
1423 //
1424 EFI_STATUS
1425 InitialPeriodicFrameList (
1426   IN USB2_HC_DEV      *HcDev,
1427   IN UINTN            Length
1428   )
1429 /*++
1430
1431 Routine Description:
1432
1433   Initialize Periodic Schedule Frame List
1434
1435 Arguments:
1436
1437   HcDev   - USB2_HC_DEV
1438   Length  - Frame List Length
1439
1440 Returns:
1441
1442   EFI_SUCCESS        Success
1443   EFI_DEVICE_ERROR   Fail
1444
1445 --*/
1446 ;
1447
1448 VOID
1449 DeinitialPeriodicFrameList (
1450   IN  USB2_HC_DEV     *HcDev
1451   )
1452 /*++
1453
1454 Routine Description:
1455
1456   Deinitialize Periodic Schedule Frame List
1457
1458 Arguments:
1459
1460   HcDev - USB2_HC_DEV
1461
1462 Returns:
1463
1464   VOID
1465
1466 --*/
1467 ;
1468
1469 EFI_STATUS
1470 CreatePollingTimer (
1471   IN  USB2_HC_DEV      *HcDev,
1472   IN  EFI_EVENT_NOTIFY NotifyFunction
1473   )
1474 /*++
1475
1476 Routine Description:
1477
1478   Create Async Request Polling Timer
1479
1480 Arguments:
1481
1482   HcDev          - USB2_HC_DEV
1483   NotifyFunction - Timer Notify Function
1484
1485 Returns:
1486
1487   EFI_SUCCESS        Success
1488   EFI_DEVICE_ERROR   Fail
1489
1490 --*/
1491 ;
1492
1493 EFI_STATUS
1494 DestoryPollingTimer (
1495   IN  USB2_HC_DEV *HcDev
1496   )
1497 /*++
1498
1499 Routine Description:
1500
1501   Destory Async Request Polling Timer
1502
1503 Arguments:
1504
1505   HcDev - USB2_HC_DEV
1506
1507 Returns:
1508
1509   EFI_SUCCESS        Success
1510   EFI_DEVICE_ERROR   Fail
1511
1512 --*/
1513 ;
1514
1515 EFI_STATUS
1516 StartPollingTimer (
1517   IN  USB2_HC_DEV *HcDev
1518   )
1519 /*++
1520
1521 Routine Description:
1522
1523   Start Async Request Polling Timer
1524
1525 Arguments:
1526
1527   HcDev - USB2_HC_DEV
1528
1529 Returns:
1530
1531   EFI_SUCCESS        Success
1532   EFI_DEVICE_ERROR   Fail
1533
1534 --*/
1535 ;
1536
1537 EFI_STATUS
1538 StopPollingTimer (
1539   IN  USB2_HC_DEV *HcDev
1540   )
1541 /*++
1542
1543 Routine Description:
1544
1545   Stop Async Request Polling Timer
1546
1547 Arguments:
1548
1549   HcDev - USB2_HC_DEV
1550
1551 Returns:
1552
1553   EFI_SUCCESS        Success
1554   EFI_DEVICE_ERROR   Fail
1555
1556 --*/
1557 ;
1558
1559 EFI_STATUS
1560 CreateQh (
1561   IN  USB2_HC_DEV         *HcDev,
1562   IN  UINT8               DeviceAddr,
1563   IN  UINT8               Endpoint,
1564   IN  UINT8               DeviceSpeed,
1565   IN  UINTN               MaxPacketLen,
1566   OUT EHCI_QH_ENTITY      **QhPtrPtr
1567   )
1568 /*++
1569
1570 Routine Description:
1571
1572   Create Qh Structure and Pre-Initialize
1573
1574 Arguments:
1575
1576   HcDev          - USB2_HC_DEV
1577   DeviceAddr     - Address of Device
1578   Endpoint       - Endpoint Number
1579   DeviceSpeed    - Device Speed
1580   MaxPacketLen   - Max Length of one Packet
1581   QhPtrPtr       - A pointer of pointer to Qh for return
1582
1583 Returns:
1584
1585   EFI_SUCCESS       Success
1586   EFI_DEVICE_ERROR  Fail
1587
1588 --*/
1589 ;
1590
1591 EFI_STATUS
1592 CreateControlQh (
1593   IN  USB2_HC_DEV                       *HcDev,
1594   IN  UINT8                             DeviceAddr,
1595   IN  UINT8                             DeviceSpeed,
1596   IN UINTN                              MaxPacketLen,
1597   IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1598   OUT EHCI_QH_ENTITY                    **QhPtrPtr
1599   )
1600 /*++
1601
1602 Routine Description:
1603
1604   Create Qh for Control Transfer
1605
1606 Arguments:
1607
1608   HcDev         - USB2_HC_DEV
1609   DeviceAddr    - Address of Device
1610   DeviceSpeed   - Device Speed
1611   MaxPacketLen  - Max Length of one Packet
1612   Translator    - Translator Transaction for SplitX
1613   QhPtrPtr      - A pointer of pointer to Qh for return
1614
1615 Returns:
1616
1617   EFI_SUCCESS       Success
1618   EFI_DEVICE_ERROR  Fail
1619
1620 --*/
1621 ;
1622
1623 EFI_STATUS
1624 CreateBulkQh (
1625   IN  USB2_HC_DEV                         *HcDev,
1626   IN  UINT8                               DeviceAddr,
1627   IN  UINT8                               EndPointAddr,
1628   IN  UINT8                               DeviceSpeed,
1629   IN  UINT8                               DataToggle,
1630   IN  UINTN                               MaxPacketLen,
1631   IN  EFI_USB2_HC_TRANSACTION_TRANSLATOR  *Translator,
1632   OUT EHCI_QH_ENTITY                      **QhPtrPtr
1633   )
1634 /*++
1635
1636 Routine Description:
1637
1638   Create Qh for Bulk Transfer
1639
1640 Arguments:
1641
1642   HcDev         - USB2_HC_DEV
1643   DeviceAddr    - Address of Device
1644   EndPointAddr  - Address of Endpoint
1645   DeviceSpeed   - Device Speed
1646   MaxPacketLen  - Max Length of one Packet
1647   Translator    - Translator Transaction for SplitX
1648   QhPtrPtr      - A pointer of pointer to Qh for return
1649
1650 Returns:
1651
1652   EFI_SUCCESS       Success
1653   EFI_DEVICE_ERROR  Fail
1654
1655 --*/
1656 ;
1657
1658 EFI_STATUS
1659 CreateInterruptQh (
1660   IN  USB2_HC_DEV                        *HcDev,
1661   IN  UINT8                              DeviceAddr,
1662   IN  UINT8                              EndPointAddr,
1663   IN  UINT8                              DeviceSpeed,
1664   IN  UINT8                              DataToggle,
1665   IN  UINTN                              MaxPacketLen,
1666   IN  UINTN                              Interval,
1667   IN  EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1668   OUT EHCI_QH_ENTITY                     **QhPtrPtr
1669   )
1670 /*++
1671
1672 Routine Description:
1673
1674   Create Qh for Control Transfer
1675
1676 Arguments:
1677
1678   HcDev        - USB2_HC_DEV
1679   DeviceAddr   - Address of Device
1680   EndPointAddr - Address of Endpoint
1681   DeviceSpeed  - Device Speed
1682   MaxPacketLen - Max Length of one Packet
1683   Interval     - value of interval
1684   Translator   - Translator Transaction for SplitX
1685   QhPtrPtr     - A pointer of pointer to Qh for return
1686
1687 Returns:
1688
1689   EFI_SUCCESS       Success
1690   EFI_DEVICE_ERROR  Fail
1691
1692 --*/
1693 ;
1694
1695 VOID
1696 DestoryQh (
1697   IN  USB2_HC_DEV        *HcDev,
1698   IN EHCI_QH_ENTITY      *QhPtr
1699   )
1700 /*++
1701
1702 Routine Description:
1703
1704   Destory Qh Structure
1705
1706 Arguments:
1707
1708   HcDev - USB2_HC_DEV
1709   QhPtr - A pointer to Qh
1710
1711 Returns:
1712
1713   VOID
1714
1715 --*/
1716 ;
1717
1718 EFI_STATUS
1719 CreateQtd (
1720   IN  USB2_HC_DEV          *HcDev,
1721   IN  UINT8                *DataPtr,
1722   IN  UINTN                DataLen,
1723   IN  UINT8                PktId,
1724   IN  UINT8                Toggle,
1725   IN  UINT8                QtdStatus,
1726   OUT EHCI_QTD_ENTITY      **QtdPtrPtr
1727   )
1728 /*++
1729
1730 Routine Description:
1731
1732   Create Qtd Structure and Pre-Initialize it
1733
1734 Arguments:
1735
1736   HcDev       - USB2_HC_DEV
1737   DataPtr     - A pointer to user data buffer to transfer
1738   DataLen     - Length of user data to transfer
1739   PktId       - Packet Identification of this Qtd
1740   Toggle      - Data Toggle of this Qtd
1741   QtdStatus   - Default value of status of this Qtd
1742   QtdPtrPtr   - A pointer of pointer to Qtd for return
1743
1744 Returns:
1745
1746   EFI_SUCCESS            Success
1747   EFI_OUT_OF_RESOURCES   Cannot allocate resources
1748
1749 --*/
1750 ;
1751
1752 EFI_STATUS
1753 CreateSetupQtd (
1754   IN  USB2_HC_DEV          *HcDev,
1755   IN  UINT8                *DevReqPtr,
1756   OUT EHCI_QTD_ENTITY      **QtdPtrPtr
1757   )
1758 /*++
1759
1760 Routine Description:
1761
1762   Create Qtd Structure for Setup
1763
1764 Arguments:
1765
1766   HcDev      - USB2_HC_DEV
1767   DevReqPtr  - A pointer to Device Request Data
1768   QtdPtrPtr  - A pointer of pointer to Qtd for return
1769
1770 Returns:
1771
1772   EFI_SUCCESS            Success
1773   EFI_OUT_OF_RESOURCES   Cannot allocate resources
1774
1775 --*/
1776 ;
1777
1778 EFI_STATUS
1779 CreateDataQtd (
1780   IN  USB2_HC_DEV           *HcDev,
1781   IN  UINT8                 *DataPtr,
1782   IN  UINTN                 DataLen,
1783   IN  UINT8                 PktId,
1784   IN  UINT8                 Toggle,
1785   OUT EHCI_QTD_ENTITY       **QtdPtrPtr
1786   )
1787 /*++
1788
1789 Routine Description:
1790
1791   Create Qtd Structure for data
1792
1793 Arguments:
1794
1795   HcDev       - USB2_HC_DEV
1796   DataPtr     - A pointer to user data buffer to transfer
1797   DataLen     - Length of user data to transfer
1798   PktId       - Packet Identification of this Qtd
1799   Toggle      - Data Toggle of this Qtd
1800   QtdPtrPtr   - A pointer of pointer to Qtd for return
1801
1802 Returns:
1803
1804   EFI_SUCCESS            Success
1805   EFI_OUT_OF_RESOURCES   Cannot allocate resources
1806
1807 --*/
1808 ;
1809
1810 EFI_STATUS
1811 CreateStatusQtd (
1812   IN  USB2_HC_DEV           *HcDev,
1813   IN  UINT8                 PktId,
1814   OUT EHCI_QTD_ENTITY       **QtdPtrPtr
1815   )
1816 /*++
1817
1818 Routine Description:
1819
1820   Create Qtd Structure for status
1821
1822 Arguments:
1823
1824   HcDev       - USB2_HC_DEV
1825   PktId       - Packet Identification of this Qtd
1826   QtdPtrPtr   - A pointer of pointer to Qtd for return
1827
1828 Returns:
1829
1830   EFI_SUCCESS            Success
1831   EFI_OUT_OF_RESOURCES   Cannot allocate resources
1832
1833 --*/
1834 ;
1835
1836 EFI_STATUS
1837 CreateAltQtd (
1838   IN  USB2_HC_DEV           *HcDev,
1839   IN  UINT8                 PktId,
1840   OUT EHCI_QTD_ENTITY       **QtdPtrPtr
1841   )
1842 /*++
1843
1844 Routine Description:
1845
1846   Create Qtd Structure for Alternative
1847
1848 Arguments:
1849
1850   HcDev      - USB2_HC_DEV
1851   PktId      - Packet Identification of this Qtd
1852   QtdPtrPtr  - A pointer of pointer to Qtd for return
1853
1854 Returns:
1855
1856   EFI_SUCCESS            Success
1857   EFI_OUT_OF_RESOURCES   Cannot allocate resources
1858
1859 --*/
1860 ;
1861
1862 EFI_STATUS
1863 CreateControlQtds (
1864   IN  USB2_HC_DEV                         *HcDev,
1865   IN UINT8                                DataPktId,
1866   IN UINT8                                *RequestCursor,
1867   IN UINT8                                *DataCursor,
1868   IN UINTN                                DataLen,
1869   IN  EFI_USB2_HC_TRANSACTION_TRANSLATOR  *Translator,
1870   OUT EHCI_QTD_ENTITY                     **ControlQtdsHead
1871   )
1872 /*++
1873
1874 Routine Description:
1875
1876   Create Qtds list for Control Transfer
1877
1878 Arguments:
1879
1880   HcDev           - USB2_HC_DEV
1881   DataPktId       - Packet Identification of Data Qtds
1882   RequestCursor   - A pointer to request structure buffer to transfer
1883   DataCursor      - A pointer to user data buffer to transfer
1884   DataLen         - Length of user data to transfer
1885   ControlQtdsHead - A pointer of pointer to first Qtd for control tranfer for return
1886
1887 Returns:
1888
1889   EFI_SUCCESS       Success
1890   EFI_DEVICE_ERROR  Fail
1891
1892 --*/
1893 ;
1894
1895 EFI_STATUS
1896 CreateBulkOrInterruptQtds (
1897   IN  USB2_HC_DEV                          *HcDev,
1898   IN  UINT8                                PktId,
1899   IN  UINT8                                *DataCursor,
1900   IN  UINTN                                DataLen,
1901   IN  EFI_USB2_HC_TRANSACTION_TRANSLATOR   *Translator,
1902   OUT EHCI_QTD_ENTITY                      **QtdsHead
1903   )
1904 /*++
1905
1906 Routine Description:
1907
1908   Create Qtds list for Bulk or Interrupt Transfer
1909
1910 Arguments:
1911
1912   HcDev        - USB2_HC_DEV
1913   PktId        - Packet Identification of Qtds
1914   DataCursor   - A pointer to user data buffer to transfer
1915   DataLen      - Length of user data to transfer
1916   DataToggle   - Data Toggle to start
1917   Translator   - Translator Transaction for SplitX
1918   QtdsHead     - A pointer of pointer to first Qtd for control tranfer for return
1919
1920 Returns:
1921
1922   EFI_SUCCESS       Success
1923   EFI_DEVICE_ERROR  Fail
1924
1925 --*/
1926 ;
1927
1928 VOID
1929 DestoryQtds (
1930   IN USB2_HC_DEV          *HcDev,
1931   IN EHCI_QTD_ENTITY      *FirstQtdPtr
1932   )
1933 /*++
1934
1935 Routine Description:
1936
1937   Destory all Qtds in the list
1938
1939 Arguments:
1940
1941   HcDev        - USB2_HC_DEV
1942   FirstQtdPtr  - A pointer to first Qtd in the list
1943
1944 Returns:
1945
1946   VOID
1947
1948 --*/
1949 ;
1950
1951 VOID
1952 LinkQtdToQtd (
1953   IN EHCI_QTD_ENTITY     *PreQtdPtr,
1954   IN EHCI_QTD_ENTITY     *QtdPtr
1955   )
1956 /*++
1957
1958 Routine Description:
1959
1960   Link Qtds together
1961
1962 Arguments:
1963
1964   PreQtdPtr  - A pointer to pre Qtd
1965   QtdPtr     - A pointer to next Qtd
1966
1967 Returns:
1968
1969   VOID
1970
1971 --*/
1972 ;
1973
1974 VOID
1975 LinkQtdsToAltQtd (
1976   IN EHCI_QTD_ENTITY     *FirstQtdPtr,
1977   IN EHCI_QTD_ENTITY     *AltQtdPtr
1978   )
1979 /*++
1980
1981 Routine Description:
1982
1983   Link AlterQtds together
1984
1985 Arguments:
1986
1987   FirstQtdPtr - A pointer to first Qtd in the list
1988   AltQtdPtr - A pointer to alternative Qtd
1989
1990 Returns:
1991   VOID
1992
1993 --*/
1994 ;
1995
1996 VOID
1997 LinkQtdToQh (
1998   IN EHCI_QH_ENTITY      *QhPtr,
1999   IN EHCI_QTD_ENTITY     *QtdEntryPtr
2000   )
2001 /*++
2002
2003 Routine Description:
2004
2005   Link Qtds list to Qh
2006
2007 Arguments:
2008
2009   QhPtr   - A pointer to Qh
2010   QtdPtr  - A pointer to first Qtd in the list
2011
2012 Returns:
2013
2014   VOID
2015
2016 --*/
2017 ;
2018
2019 EFI_STATUS
2020 LinkQhToAsyncList (
2021   IN  USB2_HC_DEV       *HcDev,
2022   IN EHCI_QH_ENTITY     *QhPtr
2023   )
2024 /*++
2025
2026 Routine Description:
2027
2028   Link Qh to Async Schedule List
2029
2030 Arguments:
2031
2032   HcDev - USB2_HC_DEV
2033   QhPtr - A pointer to Qh
2034
2035 Returns:
2036
2037   EFI_SUCCESS       Success
2038   EFI_DEVICE_ERROR  Fail
2039
2040 --*/
2041 ;
2042
2043 EFI_STATUS
2044 UnlinkQhFromAsyncList (
2045   IN USB2_HC_DEV         *HcDev,
2046   IN EHCI_QH_ENTITY      *QhPtr
2047   )
2048 /*++
2049
2050 Routine Description:
2051
2052   Unlink Qh from Async Schedule List
2053
2054 Arguments:
2055
2056   HcDev   - USB2_HC_DEV
2057   QhPtr   - A pointer to Qh
2058
2059 Returns:
2060
2061   EFI_SUCCESS       Success
2062   EFI_DEVICE_ERROR  Fail
2063
2064 --*/
2065 ;
2066
2067 VOID
2068 LinkQhToPeriodicList (
2069   IN USB2_HC_DEV        *HcDev,
2070   IN EHCI_QH_ENTITY     *QhPtr
2071   )
2072 /*++
2073
2074 Routine Description:
2075
2076   Link Qh to Periodic Schedule List
2077
2078 Arguments:
2079
2080   HcDev   - USB2_HC_DEV
2081   QhPtr   - A pointer to Qh
2082
2083 Returns:
2084
2085   VOID
2086
2087 --*/
2088 ;
2089
2090 VOID
2091 UnlinkQhFromPeriodicList (
2092   IN USB2_HC_DEV         *HcDev,
2093   IN EHCI_QH_ENTITY      *QhPtr,
2094   IN UINTN                Interval
2095   )
2096 /*++
2097
2098 Routine Description:
2099
2100   Unlink Qh from Periodic Schedule List
2101
2102 Arguments:
2103
2104   HcDev     - USB2_HC_DEV
2105   QhPtr     - A pointer to Qh
2106   Interval  - Interval of this periodic transfer
2107
2108 Returns:
2109
2110   VOID
2111
2112 --*/
2113 ;
2114
2115 VOID
2116 LinkToAsyncReqeust (
2117   IN  USB2_HC_DEV        *HcDev,
2118   IN  EHCI_ASYNC_REQUEST *AsyncRequestPtr
2119   )
2120 /*++
2121
2122 Routine Description:
2123
2124   Llink AsyncRequest Entry to Async Request List
2125
2126 Arguments:
2127
2128   HcDev           - USB2_HC_DEV
2129   AsyncRequestPtr - A pointer to Async Request Entry
2130
2131 Returns:
2132
2133   VOID
2134
2135 --*/
2136 ;
2137
2138 VOID
2139 UnlinkFromAsyncReqeust (
2140   IN  USB2_HC_DEV        *HcDev,
2141   IN  EHCI_ASYNC_REQUEST *AsyncRequestPtr
2142   )
2143 /*++
2144
2145 Routine Description:
2146
2147   Unlink AsyncRequest Entry from Async Request List
2148
2149 Arguments:
2150
2151   HcDev           - USB2_HC_DEV
2152   AsyncRequestPtr - A pointer to Async Request Entry
2153
2154 Returns:
2155
2156   VOID
2157
2158 --*/
2159 ;
2160
2161 UINTN
2162 GetNumberOfQtd (
2163   IN EHCI_QTD_ENTITY    *FirstQtdPtr
2164   )
2165 /*++
2166
2167 Routine Description:
2168
2169   Number of Qtds in the list
2170
2171 Arguments:
2172
2173   FirstQtdPtr - A pointer to first Qtd in the list
2174
2175 Returns:
2176
2177   Number of Qtds in the list
2178
2179 --*/
2180 ;
2181
2182
2183
2184 UINTN
2185 GetCapacityOfQtd (
2186   IN UINT8    *BufferCursor
2187   )
2188 /*++
2189
2190 Routine Description:
2191
2192   Get Capacity of Qtd
2193
2194 Arguments:
2195
2196   BufferCursor  - BufferCursor of the Qtd
2197
2198 Returns:
2199
2200   Capacity of Qtd
2201
2202 --*/
2203 ;
2204
2205 UINTN
2206 GetApproxiOfInterval (
2207   IN UINTN  Interval
2208   )
2209 /*++
2210
2211 Routine Description:
2212
2213   Get the approximate value in the 2 index sequence
2214
2215 Arguments:
2216
2217   Interval - the value of interval
2218
2219 Returns:
2220
2221   approximate value of interval in the 2 index sequence
2222
2223 --*/
2224 ;
2225
2226 EHCI_QTD_HW *
2227 GetQtdNextPointer (
2228   IN EHCI_QTD_HW *HwQtdPtr
2229   )
2230 /*++
2231
2232 Routine Description:
2233
2234   Get Qtd next pointer field
2235
2236 Arguments:
2237
2238   HwQtdPtr - A pointer to hardware Qtd structure
2239
2240 Returns:
2241
2242   A pointer to next hardware Qtd structure
2243
2244 --*/
2245 ;
2246
2247 BOOLEAN
2248 IsQtdStatusActive (
2249   IN EHCI_QTD_HW *HwQtdPtr
2250   )
2251 /*++
2252
2253 Routine Description:
2254
2255   Whether Qtd status is active or not
2256
2257 Arguments:
2258
2259   HwQtdPtr - A pointer to hardware Qtd structure
2260
2261 Returns:
2262
2263   TRUE    Active
2264   FALSE   Inactive
2265
2266 --*/
2267 ;
2268
2269 BOOLEAN
2270 IsQtdStatusHalted (
2271   IN EHCI_QTD_HW *HwQtdPtr
2272   )
2273 /*++
2274
2275 Routine Description:
2276
2277   Whether Qtd status is halted or not
2278
2279 Arguments:
2280
2281   HwQtdPtr - A pointer to hardware Qtd structure
2282
2283 Returns:
2284
2285   TRUE    Halted
2286   FALSE   Not halted
2287
2288 --*/
2289 ;
2290
2291 BOOLEAN
2292 IsQtdStatusBufferError (
2293   IN EHCI_QTD_HW *HwQtdPtr
2294   )
2295 /*++
2296
2297 Routine Description:
2298
2299   Whether Qtd status is buffer error or not
2300
2301 Arguments:
2302
2303   HwQtdPtr - A pointer to hardware Qtd structure
2304
2305 Returns:
2306
2307   TRUE    Buffer error
2308   FALSE   No buffer error
2309
2310 --*/
2311 ;
2312
2313 BOOLEAN
2314 IsQtdStatusBabbleError (
2315   IN EHCI_QTD_HW *HwQtdPtr
2316   )
2317 /*++
2318
2319 Routine Description:
2320
2321   Whether Qtd status is babble error or not
2322
2323 Arguments:
2324
2325   HwQtdPtr - A pointer to hardware Qtd structure
2326
2327 Returns:
2328
2329   TRUE    Babble error
2330   FALSE   No babble error
2331
2332 --*/
2333 ;
2334
2335 BOOLEAN
2336 IsQtdStatusTransactionError (
2337   IN EHCI_QTD_HW *HwQtdPtr
2338   )
2339 /*++
2340
2341 Routine Description:
2342
2343   Whether Qtd status is transaction error or not
2344
2345 Arguments:
2346
2347   HwQtdPtr - A pointer to hardware Qtd structure
2348
2349 Returns:
2350
2351   TRUE    Transaction error
2352   FALSE   No transaction error
2353
2354 --*/
2355 ;
2356
2357 BOOLEAN
2358 IsDataInTransfer (
2359   IN  UINT8     EndPointAddress
2360   )
2361 /*++
2362
2363 Routine Description:
2364
2365   Whether is a DataIn direction transfer
2366
2367 Arguments:
2368
2369   EndPointAddress - address of the endpoint
2370
2371 Returns:
2372
2373   TRUE    DataIn
2374   FALSE   DataOut
2375
2376 --*/
2377 ;
2378
2379 EFI_STATUS
2380 MapDataBuffer (
2381   IN  USB2_HC_DEV             *HcDev,
2382   IN  EFI_USB_DATA_DIRECTION  TransferDirection,
2383   IN  OUT VOID                *Data,
2384   IN  OUT UINTN               *DataLength,
2385   OUT UINT8                   *PktId,
2386   OUT UINT8                   **DataCursor,
2387   OUT VOID                    **DataMap
2388   )
2389 /*++
2390
2391 Routine Description:
2392
2393   Map address of user data buffer
2394
2395 Arguments:
2396
2397   HcDev             - USB2_HC_DEV
2398   TransferDirection - direction of transfer
2399   Data              - A pointer to user data buffer
2400   DataLength        - length of user data
2401   PktId             - Packte Identificaion
2402   DataCursor        - mapped address to return
2403   DataMap           - identificaion of this mapping to return
2404
2405 Returns:
2406
2407   EFI_SUCCESS        Success
2408   EFI_DEVICE_ERROR   Fail
2409
2410 --*/
2411 ;
2412
2413 EFI_STATUS
2414 MapRequestBuffer (
2415   IN  USB2_HC_DEV             *HcDev,
2416   IN  OUT VOID                *Request,
2417   OUT UINT8                   **RequestCursor,
2418   OUT VOID                    **RequestMap
2419   )
2420 /*++
2421
2422 Routine Description:
2423
2424   Map address of request structure buffer
2425
2426 Arguments:
2427
2428   HcDev           - USB2_HC_DEV
2429   Request         - A pointer to request structure
2430   RequestCursor   - Mapped address of request structure to return
2431   RequestMap      - Identificaion of this mapping to return
2432
2433 Returns:
2434
2435   EFI_SUCCESS        Success
2436   EFI_DEVICE_ERROR   Fail
2437
2438 --*/
2439 ;
2440
2441 VOID
2442 SetQtdBufferPointer (
2443   IN EHCI_QTD_HW *QtdHwPtr,
2444   IN VOID        *DataPtr,
2445   IN UINTN       DataLen
2446   )
2447 /*++
2448
2449 Routine Description:
2450
2451   Set data buffer pointers in Qtd
2452
2453 Arguments:
2454
2455   QtdHwPtr  - A pointer to Qtd hardware structure
2456   DataPtr   - A pointer to user data buffer
2457   DataLen   - Length of the user data buffer
2458
2459 Returns:
2460
2461   VOID
2462
2463 --*/
2464 ;
2465
2466 EHCI_QTD_HW *
2467 GetQtdAlternateNextPointer (
2468   IN EHCI_QTD_HW *HwQtdPtr
2469   )
2470 /*++
2471
2472 Routine Description:
2473
2474   Get Qtd alternate next pointer field
2475
2476 Arguments:
2477
2478   HwQtdPtr - A pointer to hardware Qtd structure
2479
2480 Returns:
2481
2482   A pointer to hardware alternate Qtd
2483
2484 --*/
2485 ;
2486
2487 VOID
2488 ZeroOutQhOverlay (
2489   IN EHCI_QH_ENTITY *QhPtr
2490   )
2491 /*++
2492
2493 Routine Description:
2494
2495   Zero out the fields in Qh structure
2496
2497 Arguments:
2498
2499   QhPtr - A pointer to Qh structure
2500
2501 Returns:
2502
2503   VOID
2504
2505 --*/
2506 ;
2507
2508 VOID
2509 UpdateAsyncRequestTransfer (
2510   IN EHCI_ASYNC_REQUEST *AsyncRequestPtr,
2511   IN UINT32             TransferResult,
2512   IN UINTN              ErrTDPos
2513   )
2514 /*++
2515
2516 Routine Description:
2517
2518   Update asynchronous request transfer
2519
2520 Arguments:
2521
2522   AsyncRequestPtr  - A pointer to async request
2523   TransferResult   - transfer result
2524   ErrQtdPos        - postion of error Qtd
2525
2526 Returns:
2527
2528   VOID
2529
2530 --*/
2531 ;
2532
2533
2534 EFI_STATUS
2535 DeleteAsyncRequestTransfer (
2536   IN  USB2_HC_DEV     *HcDev,
2537   IN  UINT8           DeviceAddress,
2538   IN  UINT8           EndPointAddress,
2539   OUT UINT8           *DataToggle
2540   )
2541 /*++
2542
2543 Routine Description:
2544
2545   Delete all asynchronous request transfer
2546
2547 Arguments:
2548
2549   HcDev           - USB2_HC_DEV
2550   DeviceAddress   - address of usb device
2551   EndPointAddress - address of endpoint
2552   DataToggle      - stored data toggle
2553
2554 Returns:
2555
2556   EFI_SUCCESS        Success
2557   EFI_DEVICE_ERROR   Fail
2558
2559 --*/
2560 ;
2561
2562 VOID
2563 CleanUpAllAsyncRequestTransfer (
2564   IN  USB2_HC_DEV *HcDev
2565   )
2566 /*++
2567
2568 Routine Description:
2569
2570   Clean up all asynchronous request transfer
2571
2572 Arguments:
2573
2574   HcDev - USB2_HC_DEV
2575
2576 Returns:
2577   VOID
2578
2579 --*/
2580 ;
2581
2582 EFI_STATUS
2583 ExecuteTransfer (
2584   IN  USB2_HC_DEV         *HcDev,
2585   IN BOOLEAN              IsControl,
2586   IN  EHCI_QH_ENTITY      *QhPtr,
2587   IN OUT UINTN            *ActualLen,
2588   OUT UINT8               *DataToggle,
2589   IN  UINTN               TimeOut,
2590   OUT UINT32              *TransferResult
2591   )
2592 /*++
2593
2594 Routine Description:
2595
2596   Execute Bulk or SyncInterrupt Transfer
2597
2598 Arguments:
2599
2600   HcDev            - USB2_HC_DEV
2601   IsControl        - Is control transfer or not
2602   QhPtr            - A pointer to Qh
2603   ActualLen        - Actual transfered Len
2604   DataToggle       - Data Toggle
2605   TimeOut          - TimeOut threshold
2606   TransferResult   - Transfer result
2607
2608 Returns:
2609
2610   EFI_SUCCESS        Sucess
2611   EFI_DEVICE_ERROR   Error
2612
2613 --*/
2614 ;
2615
2616 BOOLEAN
2617 CheckQtdsTransferResult (
2618   IN BOOLEAN             IsControl,
2619   IN  EHCI_QH_ENTITY     *QhPtr,
2620   OUT UINT32             *Result,
2621   OUT UINTN              *ErrQtdPos,
2622   OUT UINTN              *ActualLen
2623   )
2624 /*++
2625
2626 Routine Description:
2627
2628   Check transfer result of Qtds
2629
2630 Arguments:
2631
2632   IsControl     - Is control transfer or not
2633   QhPtr         - A pointer to Qh
2634   Result        - Transfer result
2635   ErrQtdPos     - Error TD Position
2636   ActualLen     - Actual Transfer Size
2637
2638 Returns:
2639
2640   TRUE    Qtds finished
2641   FALSE   Not finish
2642
2643 --*/
2644 ;
2645
2646 EFI_STATUS
2647 AsyncRequestMoniter (
2648   IN EFI_EVENT     Event,
2649   IN VOID          *Context
2650   )
2651 /*++
2652
2653 Routine Description:
2654
2655   Interrupt transfer periodic check handler
2656
2657 Arguments:
2658
2659   Event     - Interrupt event
2660   Context   - Pointer to USB2_HC_DEV
2661
2662 Returns:
2663
2664   EFI_SUCCESS        Success
2665   EFI_DEVICE_ERROR   Fail
2666
2667 --*/
2668 ;
2669
2670
2671 EFI_STATUS
2672 CreateNULLQH (
2673   IN  USB2_HC_DEV     *HcDev
2674   )
2675 /*++
2676
2677 Routine Description:
2678
2679   Create the NULL QH to make it as the Async QH header
2680
2681 Arguments:
2682
2683   HcDev   - USB2_HC_DEV
2684
2685 Returns:
2686
2687   EFI_SUCCESS        Success
2688 --*/
2689 ;
2690
2691 VOID
2692 DestroyNULLQH (
2693   IN  USB2_HC_DEV     *HcDev
2694   );
2695
2696 VOID
2697 ClearLegacySupport (
2698   IN USB2_HC_DEV     *HcDev
2699   );
2700
2701 VOID
2702 HostReset (
2703   IN USB2_HC_DEV    *HcDev
2704   );
2705
2706
2707 VOID
2708 DumpEHCIPortsStatus (
2709   IN USB2_HC_DEV    *HcDev
2710   );
2711
2712
2713 #endif