EdkModulePkg/Bus/Pci/Ehci/Dxe/Ehci.h

   1 /*++
   2
   3 Copyright (c) 2006, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 Module Name:
  13
  14     Ehci.h
  15
  16 Abstract:
  17
  18
  19 Revision History
  20 --*/
  21
  22 #ifndef _EHCI_H
  23 #define _EHCI_H
  24
  25 //
  26 // Universal Host Controller Interface data structures and defines
  27 //
  28 #include <IndustryStandard/pci22.h>
  29
  30 #ifdef EFI_DEBUG
  31 extern UINTN  gEHCDebugLevel;
  32 extern UINTN  gEHCErrorLevel;
  33 #endif
  34
  35 #define STALL_1_MACRO_SECOND              1
  36 #define STALL_1_MILLI_SECOND              1000 * STALL_1_MACRO_SECOND
  37 #define STALL_1_SECOND                    1000 * STALL_1_MILLI_SECOND
  38
  39 #define SETUP_PACKET_PID_CODE             0x02
  40 #define INPUT_PACKET_PID_CODE             0x01
  41 #define OUTPUT_PACKET_PID_CODE            0x0
  42
  43 #define ITD_SELECT_TYPE                   0x0
  44 #define QH_SELECT_TYPE                    0x01
  45 #define SITD_SELECT_TYPE                  0x02
  46 #define FSTN_SELECT_TYPE                  0x03
  47
  48 #define EHCI_SET_PORT_RESET_RECOVERY_TIME     50 * STALL_1_MILLI_SECOND
  49 #define EHCI_CLEAR_PORT_RESET_RECOVERY_TIME   STALL_1_MILLI_SECOND
  50 #define EHCI_GENERIC_TIMEOUT                  50 * STALL_1_MILLI_SECOND
  51 #define EHCI_GENERIC_RECOVERY_TIME            50 * STALL_1_MACRO_SECOND
  52 #define EHCI_SYNC_REQUEST_POLLING_TIME        50 * STALL_1_MACRO_SECOND
  53 #define EHCI_ASYNC_REQUEST_POLLING_TIME       50 * STALL_1_MILLI_SECOND
  54
  55 #define USB_BAR_INDEX                     0 /* how many bytes away from USB_BASE to 0x10 */
  56
  57 #define NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES 1
  58
  59 #define EHCI_MIN_PACKET_SIZE              8
  60 #define EHCI_MAX_PACKET_SIZE              1024
  61 #define EHCI_MAX_FRAME_LIST_LENGTH        1024
  62 #define EHCI_BLOCK_SIZE_WITH_TT           64
  63 #define EHCI_BLOCK_SIZE                   512
  64 #define EHCI_MAX_QTD_CAPACITY             (EFI_PAGE_SIZE * 5)
  65
  66 #define NAK_COUNT_RELOAD                  3
  67 #define QTD_ERROR_COUNTER                 1
  68 #define HIGH_BANDWIDTH_PIPE_MULTIPLIER    1
  69
  70 #define QTD_STATUS_ACTIVE                 0x80
  71 #define QTD_STATUS_HALTED                 0x40
  72 #define QTD_STATUS_BUFFER_ERR             0x20
  73 #define QTD_STATUS_BABBLE_ERR             0x10
  74 #define QTD_STATUS_TRANSACTION_ERR        0x08
  75 #define QTD_STATUS_DO_STOP_SPLIT          0x02
  76 #define QTD_STATUS_DO_START_SPLIT         0
  77 #define QTD_STATUS_DO_PING                0x01
  78 #define QTD_STATUS_DO_OUT                 0
  79
  80 #define DATA0                             0
  81 #define DATA1                             1
  82
  83 #define MICRO_FRAME_0_CHANNEL             0x01
  84 #define MICRO_FRAME_1_CHANNEL             0x02
  85 #define MICRO_FRAME_2_CHANNEL             0x04
  86 #define MICRO_FRAME_3_CHANNEL             0x08
  87 #define MICRO_FRAME_4_CHANNEL             0x10
  88 #define MICRO_FRAME_5_CHANNEL             0x20
  89 #define MICRO_FRAME_6_CHANNEL             0x40
  90 #define MICRO_FRAME_7_CHANNEL             0x80
  91
  92 #define CONTROL_TRANSFER                  0x01
  93 #define BULK_TRANSFER                     0x02
  94 #define SYNC_INTERRUPT_TRANSFER           0x04
  95 #define ASYNC_INTERRUPT_TRANSFER          0x08
  96 #define SYNC_ISOCHRONOUS_TRANSFER         0x10
  97 #define ASYNC_ISOCHRONOUS_TRANSFER        0x20
  98
  99
 100 //
 101 // Enhanced Host Controller Registers definitions
 102 //
 103 extern UINT32                       mUsbCapabilityLen;
 104 extern EFI_DRIVER_BINDING_PROTOCOL  gEhciDriverBinding;
 105 extern EFI_COMPONENT_NAME_PROTOCOL  gEhciComponentName;
 106
 107 #define USBCMD            0x0     /* Command Register Offset 00-03h */
 108 #define USBCMD_RS         0x01    /* Run / Stop */
 109 #define USBCMD_HCRESET    0x02    /* Host controller reset */
 110 #define USBCMD_FLS_512    0x04    /* 512 elements (2048bytes) in Frame List */
 111 #define USBCMD_FLS_256    0x08    /* 256 elements (1024bytes) in Frame List */
 112 #define USBCMD_PSE        0x10    /* Periodic schedule enable */
 113 #define USBCMD_ASE        0x20    /* Asynchronous schedule enable */
 114 #define USBCMD_IAAD       0x40    /* Interrupt on async advance doorbell */
 115
 116 #define USBSTS            0x04    /* Statue Register Offset 04-07h */
 117 #define USBSTS_HSE        0x10    /* Host system error */
 118 #define USBSTS_IAA        0x20    /* Interrupt on async advance */
 119 #define USBSTS_HCH        0x1000  /* Host controller halted */
 120 #define USBSTS_PSS        0x4000  /* Periodic schedule status */
 121 #define USBSTS_ASS        0x8000  /* Asynchronous schedule status */
 122
 123 #define USBINTR           0x08    /* Command Register Offset 08-0bh */
 124
 125 #define FRINDEX           0x0c    /* Frame Index Offset 0c-0fh */
 126
 127 #define CTRLDSSGMENT      0x10    /* 4G Segment Selector Offset 10-13h */
 128
 129 #define PERIODICLISTBASE  0x14    /* Frame List Base Address Offset 14-17h */
 130
 131 #define ASYNCLISTADDR     0x18    /* Next Asynchronous List Address Offset 18-1bh */
 132
 133 #define CONFIGFLAG        0x40    /* Configured Flag Register Offset 40-43h */
 134 #define CONFIGFLAG_CF     0x01    /* Configure Flag */
 135
 136 #define PORTSC            0x44    /* Port Status/Control Offset 44-47h */
 137 #define PORTSC_CCS        0x01    /* Current Connect Status*/
 138 #define PORTSC_CSC        0x02    /* Connect Status Change */
 139 #define PORTSC_PED        0x04    /* Port Enable / Disable */
 140 #define PORTSC_PEDC       0x08    /* Port Enable / Disable Change */
 141 #define PORTSC_OCA        0x10    /* Over current Active */
 142 #define PORTSC_OCC        0x20    /* Over current Change */
 143 #define PORTSC_FPR        0x40    /* Force Port Resume */
 144 #define PORTSC_SUSP       0x80    /* Port Suspend State */
 145 #define PORTSC_PR         0x100   /* Port Reset */
 146 #define PORTSC_LS_KSTATE  0x400   /* Line Status K-state */
 147 #define PORTSC_LS_JSTATE  0x800   /* Line Status J-state */
 148 #define PORTSC_PP         0x1000  /* Port Power */
 149 #define PORTSC_PO         0x2000  /* Port Owner */
 150
 151 #define CAPLENGTH         0       /* Capability Register Length 00h */
 152
 153 #define HCIVERSION        0x02    /* Interface Version Number  02-03h */
 154
 155 #define HCSPARAMS         0x04    /* Structural Parameters 04-07h */
 156 #define HCSP_NPORTS       0x0f    /* Number of physical downstream ports on host controller */
 157
 158 #define HCCPARAMS         0x08    /* Capability Parameters 08-0bh */
 159 #define HCCP_64BIT        0x01    /* 64-bit Addressing Capability */
 160 #define HCCP_PFLF         0x02    /* Programmable Frame List Flag */
 161 #define HCCP_EECP         0xff00  /* EHCI Extemded Capabilities Pointer */
 162
 163 #define HCSPPORTROUTE     0x0c    /* Companion Port Route Description 60b */
 164
 165 #define CLASSC            0x09    /* Class Code 09-0bh */
 166
 167 #define USBBASE           0x10    /* Base Address to Memory-mapped Host Controller Register Space 10-13h */
 168
 169 #define SBRN              0x60    /* Serial Bus Release Number 60h */
 170
 171 #define FLADJ             0x61    /* Frame Length Adjustment Register 61h */
 172
 173 #define PORTWAKECAP       0x62    /* Port wake capablilities register(OPIONAL)  61-62h */
 174
 175 //
 176 // PCI Configuration Registers
 177 //
 178 #define EHCI_PCI_CLASSC         0x09
 179 #define EHCI_PCI_MEMORY_BASE    0x10
 180
 181 //
 182 // Memory Offset Registers
 183 //
 184 #define EHCI_MEMORY_CAPLENGTH   0x0
 185 #define EHCI_MEMORY_CONFIGFLAG  0x40
 186
 187 //
 188 // USB Base Class Code,Sub-Class Code and Programming Interface
 189 //
 190 #define PCI_CLASSC_PI_EHCI      0x20
 191
 192 #define SETUP_PACKET_ID         0x2D
 193 #define INPUT_PACKET_ID         0x69
 194 #define OUTPUT_PACKET_ID        0xE1
 195 #define ERROR_PACKET_ID         0x55
 196
 197 #define bit(a)                1 << (a)
 198
 199 #define GET_0B_TO_31B(Addr)   (((UINTN) Addr) & (0xffffffff))
 200 #define GET_32B_TO_63B(Addr)  ((((UINTN) Addr) >> 32) & (0xffffffff))
 201
 202
 203 //
 204 // Ehci Data and Ctrl Structures
 205 //
 206 #pragma pack(1)
 207
 208 typedef struct {
 209   UINT8 PI;
 210   UINT8 SubClassCode;
 211   UINT8 BaseCode;
 212 } USB_CLASSC;
 213
 214 typedef struct {
 215   UINT32  NextQtdTerminate : 1;
 216   UINT32  Rsvd1 : 4;
 217   UINT32  NextQtdPointer : 27;
 218
 219   UINT32  AltNextQtdTerminate : 1;
 220   UINT32  Rsvd2 : 4;
 221   UINT32  AltNextQtdPointer : 27;
 222
 223   UINT32  Status : 8;
 224   UINT32  PidCode : 2;
 225   UINT32  ErrorCount : 2;
 226   UINT32  CurrentPage : 3;
 227   UINT32  InterruptOnComplete : 1;
 228   UINT32  TotalBytes : 15;
 229   UINT32  DataToggle : 1;
 230
 231   UINT32  CurrentOffset : 12;
 232   UINT32  BufferPointer0 : 20;
 233
 234   UINT32  Rsvd3 : 12;
 235   UINT32  BufferPointer1 : 20;
 236
 237   UINT32  Rsvd4 : 12;
 238   UINT32  BufferPointer2 : 20;
 239
 240   UINT32  Rsvd5 : 12;
 241   UINT32  BufferPointer3 : 20;
 242
 243   UINT32  Rsvd6 : 12;
 244   UINT32  BufferPointer4 : 20;
 245
 246   UINT32  ExtBufferPointer0;
 247   UINT32  ExtBufferPointer1;
 248   UINT32  ExtBufferPointer2;
 249   UINT32  ExtBufferPointer3;
 250   UINT32  ExtBufferPointer4;
 251 } EHCI_QTD_HW;
 252
 253 typedef struct {
 254   UINT32  QhTerminate : 1;
 255   UINT32  SelectType : 2;
 256   UINT32  Rsvd1 : 2;
 257   UINT32  QhHorizontalPointer : 27;
 258
 259   UINT32  DeviceAddr : 7;
 260   UINT32  Inactive : 1;
 261   UINT32  EndpointNum : 4;
 262   UINT32  EndpointSpeed : 2;
 263   UINT32  DataToggleControl : 1;
 264   UINT32  HeadReclamationFlag : 1;
 265   UINT32  MaxPacketLen : 11;
 266   UINT32  ControlEndpointFlag : 1;
 267   UINT32  NakCountReload : 4;
 268
 269   UINT32  InerruptScheduleMask : 8;
 270   UINT32  SplitComletionMask : 8;
 271   UINT32  HubAddr : 7;
 272   UINT32  PortNum : 7;
 273   UINT32  Multiplier : 2;
 274
 275   UINT32  Rsvd2 : 5;
 276   UINT32  CurrentQtdPointer : 27;
 277
 278   UINT32  NextQtdTerminate : 1;
 279   UINT32  Rsvd3 : 4;
 280   UINT32  NextQtdPointer : 27;
 281
 282   UINT32  AltNextQtdTerminate : 1;
 283   UINT32  NakCount : 4;
 284   UINT32  AltNextQtdPointer : 27;
 285
 286   UINT32  Status : 8;
 287   UINT32  PidCode : 2;
 288   UINT32  ErrorCount : 2;
 289   UINT32  CurrentPage : 3;
 290   UINT32  InterruptOnComplete : 1;
 291   UINT32  TotalBytes : 15;
 292   UINT32  DataToggle : 1;
 293
 294   UINT32  CurrentOffset : 12;
 295   UINT32  BufferPointer0 : 20;
 296
 297   UINT32  CompleteSplitMask : 8;
 298   UINT32  Rsvd4 : 4;
 299   UINT32  BufferPointer1 : 20;
 300
 301   UINT32  FrameTag : 5;
 302   UINT32  SplitBytes : 7;
 303   UINT32  BufferPointer2 : 20;
 304
 305   UINT32  Rsvd5 : 12;
 306   UINT32  BufferPointer3 : 20;
 307
 308   UINT32  Rsvd6 : 12;
 309   UINT32  BufferPointer4 : 20;
 310
 311   UINT32  ExtBufferPointer0;
 312   UINT32  ExtBufferPointer1;
 313   UINT32  ExtBufferPointer2;
 314   UINT32  ExtBufferPointer3;
 315   UINT32  ExtBufferPointer4;
 316 } EHCI_QH_HW;
 317
 318 typedef struct {
 319   UINT32  LinkTerminate : 1;
 320   UINT32  SelectType : 2;
 321   UINT32  Rsvd : 2;
 322   UINT32  LinkPointer : 27;
 323 } FRAME_LIST_ENTRY;
 324
 325 #pragma pack()
 326
 327 typedef struct _EHCI_QTD_ENTITY     EHCI_QTD_ENTITY;
 328 typedef struct _EHCI_QH_ENTITY      EHCI_QH_ENTITY;
 329 typedef struct _EHCI_ASYNC_REQUEST  EHCI_ASYNC_REQUEST;
 330
 331 typedef struct _EHCI_QTD_ENTITY {
 332   EHCI_QTD_HW     Qtd;
 333   UINT32          TotalBytes;
 334   UINT32          StaticTotalBytes;
 335   UINT32          StaticCurrentOffset;
 336   EHCI_QTD_ENTITY *Prev;
 337   EHCI_QTD_ENTITY *Next;
 338   EHCI_QTD_ENTITY *AltNext;
 339   EHCI_QH_ENTITY  *SelfQh;
 340 } EHCI_QTD_ENTITY;
 341
 342 typedef struct _EHCI_QH_ENTITY {
 343   EHCI_QH_HW      Qh;
 344   EHCI_QH_ENTITY  *Next;
 345   EHCI_QH_ENTITY  *Prev;
 346   EHCI_QTD_ENTITY *FirstQtdPtr;
 347   EHCI_QTD_ENTITY *LastQtdPtr;
 348   EHCI_QTD_ENTITY *AltQtdPtr;
 349   UINTN           Interval;
 350   UINT8           TransferType;
 351 } EHCI_QH_ENTITY;
 352
 353 #define GET_QH_ENTITY_ADDR(a)   ((EHCI_QH_ENTITY *) a)
 354 #define GET_QTD_ENTITY_ADDR(a)  ((EHCI_QTD_ENTITY *) a)
 355
 356
 357 //
 358 // Ehci Managment Structures
 359 //
 360 #define USB2_HC_DEV_FROM_THIS(a)  CR (a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)
 361
 362 #define USB2_HC_DEV_SIGNATURE     EFI_SIGNATURE_32 ('e', 'h', 'c', 'i')
 363
 364 typedef struct _LIST_HEAD {
 365   struct _LIST_HEAD *pre;
 366   struct _LIST_HEAD *next;
 367 } LIST_HEAD;
 368
 369 typedef struct _EHCI_ASYNC_REQUEST {
 370   UINT8                           TransferType;
 371   EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunc;
 372   VOID                            *Context;
 373   EHCI_ASYNC_REQUEST              *Prev;
 374   EHCI_ASYNC_REQUEST              *Next;
 375   EHCI_QH_ENTITY                  *QhPtr;
 376 } EHCI_ASYNC_REQUEST;
 377
 378 typedef struct _MEMORY_MANAGE_HEADER {
 379   UINT8                         *BitArrayPtr;
 380   UINTN                         BitArraySizeInBytes;
 381   UINT8                         *MemoryBlockPtr;
 382   UINTN                         MemoryBlockSizeInBytes;
 383   VOID                          *Mapping;
 384   struct _MEMORY_MANAGE_HEADER  *Next;
 385 } MEMORY_MANAGE_HEADER;
 386
 387 typedef struct _USB2_HC_DEV {
 388   UINTN                     Signature;
 389   EFI_PCI_IO_PROTOCOL       *PciIo;
 390   EFI_USB2_HC_PROTOCOL      Usb2Hc;
 391   UINTN                     PeriodicFrameListLength;
 392   VOID                      *PeriodicFrameListBuffer;
 393   VOID                      *PeriodicFrameListMap;
 394   VOID                      *AsyncList;
 395   EHCI_ASYNC_REQUEST        *AsyncRequestList;
 396   EFI_EVENT                 AsyncRequestEvent;
 397   EFI_UNICODE_STRING_TABLE  *ControllerNameTable;
 398   MEMORY_MANAGE_HEADER      *MemoryHeader;
 399   UINT8                                         Is64BitCapable;
 400   UINT32                    High32BitAddr;
 401 } USB2_HC_DEV;
 402
 403
 404 //
 405 // Internal Functions Declaration
 406 //
 407
 408 //
 409 // EhciMem Functions
 410 //
 411 EFI_STATUS
 412 CreateMemoryBlock (
 413   IN  USB2_HC_DEV               *HcDev,
 414   OUT MEMORY_MANAGE_HEADER      **MemoryHeader,
 415   IN  UINTN                     MemoryBlockSizeInPages
 416   )
 417 /*++
 418
 419 Routine Description:
 420
 421   Use PciIo->AllocateBuffer to allocate common buffer for the memory block,
 422   and use PciIo->Map to map the common buffer for Bus Master Read/Write.
 423
 424 Arguments:
 425
 426   HcDev                  - USB2_HC_DEV
 427   MemoryHeader           - MEMORY_MANAGE_HEADER to output
 428   MemoryBlockSizeInPages - MemoryBlockSizeInPages
 429
 430 Returns:
 431
 432   EFI_SUCCESS           Success
 433   EFI_OUT_OF_RESOURCES  Fail for no resources
 434   EFI_UNSUPPORTED       Unsupported currently
 435
 436 --*/
 437 ;
 438
 439 EFI_STATUS
 440 FreeMemoryHeader (
 441   IN USB2_HC_DEV               *HcDev,
 442   IN MEMORY_MANAGE_HEADER      *MemoryHeader
 443   )
 444 /*++
 445
 446 Routine Description:
 447
 448   Free Memory Header
 449
 450 Arguments:
 451
 452   HcDev         - USB2_HC_DEV
 453   MemoryHeader  - MemoryHeader to be freed
 454
 455 Returns:
 456
 457   EFI_SUCCESS            Success
 458   EFI_INVALID_PARAMETER  Parameter is error
 459
 460 --*/
 461 ;
 462
 463 VOID
 464 InsertMemoryHeaderToList (
 465   IN MEMORY_MANAGE_HEADER     *MemoryHeader,
 466   IN MEMORY_MANAGE_HEADER     *NewMemoryHeader
 467   )
 468 /*++
 469
 470 Routine Description:
 471
 472   Insert Memory Header To List
 473
 474 Arguments:
 475
 476   MemoryHeader    - MEMORY_MANAGE_HEADER
 477   NewMemoryHeader - MEMORY_MANAGE_HEADER
 478
 479 Returns:
 480
 481   VOID
 482
 483 --*/
 484 ;
 485
 486 EFI_STATUS
 487 AllocMemInMemoryBlock (
 488   IN  MEMORY_MANAGE_HEADER     *MemoryHeader,
 489   OUT VOID                     **Pool,
 490   IN  UINTN                    NumberOfMemoryUnit
 491   )
 492 /*++
 493
 494 Routine Description:
 495
 496   Alloc Memory In MemoryBlock
 497
 498 Arguments:
 499
 500   MemoryHeader        - MEMORY_MANAGE_HEADER
 501   Pool                - Place to store pointer to memory
 502   NumberOfMemoryUnit  - Number Of Memory Unit
 503
 504 Returns:
 505
 506   EFI_SUCCESS    Success
 507   EFI_NOT_FOUND  Can't find the free memory
 508
 509 --*/
 510 ;
 511
 512 BOOLEAN
 513 IsMemoryBlockEmptied (
 514   IN MEMORY_MANAGE_HEADER     *MemoryHeaderPtr
 515   )
 516 /*++
 517
 518 Routine Description:
 519
 520   Is Memory Block Emptied
 521
 522 Arguments:
 523
 524   MemoryHeaderPtr - MEMORY_MANAGE_HEADER
 525
 526 Returns:
 527
 528   TRUE    Empty
 529   FALSE   Not Empty
 530
 531 --*/
 532 ;
 533
 534 VOID
 535 DelinkMemoryBlock (
 536   IN MEMORY_MANAGE_HEADER     *FirstMemoryHeader,
 537   IN MEMORY_MANAGE_HEADER     *NeedFreeMemoryHeader
 538   )
 539 /*++
 540
 541 Routine Description:
 542
 543   Delink Memory Block
 544
 545 Arguments:
 546
 547   FirstMemoryHeader     - MEMORY_MANAGE_HEADER
 548   NeedFreeMemoryHeader  - MEMORY_MANAGE_HEADER
 549
 550 Returns:
 551
 552   VOID
 553
 554 --*/
 555 ;
 556
 557 EFI_STATUS
 558 InitialMemoryManagement (
 559   IN USB2_HC_DEV     *HcDev
 560   )
 561 /*++
 562
 563 Routine Description:
 564
 565   Initialize Memory Management
 566
 567 Arguments:
 568
 569   HcDev - USB2_HC_DEV
 570
 571 Returns:
 572
 573   EFI_SUCCESS        Success
 574   EFI_DEVICE_ERROR   Fail
 575
 576 --*/
 577 ;
 578
 579 EFI_STATUS
 580 DeinitialMemoryManagement (
 581   IN USB2_HC_DEV     *HcDev
 582   )
 583 /*++
 584
 585 Routine Description:
 586
 587   Deinitialize Memory Management
 588
 589 Arguments:
 590
 591   HcDev - USB2_HC_DEV
 592
 593 Returns:
 594
 595   EFI_SUCCESS        Success
 596   EFI_DEVICE_ERROR   Fail
 597
 598 --*/
 599 ;
 600
 601 EFI_STATUS
 602 EhciAllocatePool (
 603   IN  USB2_HC_DEV     *HcDev,
 604   OUT UINT8           **Pool,
 605   IN  UINTN           AllocSize
 606   )
 607 /*++
 608
 609 Routine Description:
 610
 611   Ehci Allocate Pool
 612
 613 Arguments:
 614
 615   HcDev     - USB2_HC_DEV
 616   Pool      - Place to store pointer to the memory buffer
 617   AllocSize - Alloc Size
 618
 619 Returns:
 620
 621   EFI_SUCCESS        Success
 622   EFI_DEVICE_ERROR   Fail
 623
 624 --*/
 625 ;
 626
 627 VOID
 628 EhciFreePool (
 629   IN USB2_HC_DEV     *HcDev,
 630   IN UINT8           *Pool,
 631   IN UINTN           AllocSize
 632   )
 633 /*++
 634
 635 Routine Description:
 636
 637   Uhci Free Pool
 638
 639 Arguments:
 640
 641   HcDev     - USB_HC_DEV
 642   Pool      - Pool to free
 643   AllocSize - Pool size
 644
 645 Returns:
 646
 647   VOID
 648
 649 --*/
 650 ;
 651
 652 //
 653 // EhciReg Functions
 654 //
 655 EFI_STATUS
 656 ReadEhcCapabiltiyReg (
 657   IN USB2_HC_DEV             *HcDev,
 658   IN UINT32                  CapabiltiyRegAddr,
 659   IN OUT UINT32              *Data
 660   )
 661 /*++
 662
 663 Routine Description:
 664
 665   Read  Ehc Capabitlity register
 666
 667 Arguments:
 668
 669   HcDev             - USB2_HC_DEV
 670   CapabiltiyRegAddr - Ehc Capability register address
 671   Data              - A pointer to data read from register
 672
 673 Returns:
 674
 675   EFI_SUCCESS        Success
 676   EFI_DEVICE_ERROR   Fail
 677
 678 --*/
 679 ;
 680
 681 EFI_STATUS
 682 ReadEhcOperationalReg (
 683   IN USB2_HC_DEV             *HcDev,
 684   IN UINT32                  OperationalRegAddr,
 685   IN OUT UINT32              *Data
 686   )
 687 /*++
 688
 689 Routine Description:
 690
 691   Read  Ehc Operation register
 692
 693 Arguments:
 694
 695   HcDev                - USB2_HC_DEV
 696   OperationalRegAddr   - Ehc Operation register address
 697   Data                 - A pointer to data read from register
 698
 699 Returns:
 700
 701   EFI_SUCCESS        Success
 702   EFI_DEVICE_ERROR   Fail
 703
 704 --*/
 705 ;
 706
 707 EFI_STATUS
 708 WriteEhcOperationalReg (
 709   IN USB2_HC_DEV             *HcDev,
 710   IN UINT32                  OperationalRegAddr,
 711   IN UINT32                  Data
 712   )
 713 /*++
 714
 715 Routine Description:
 716
 717   Write  Ehc Operation register
 718
 719 Arguments:
 720
 721   HcDev                - USB2_HC_DEV
 722   OperationalRegAddr   - Ehc Operation register address
 723   Data                 - 32bit write to register
 724
 725 Returns:
 726
 727   EFI_SUCCESS        Success
 728   EFI_DEVICE_ERROR   Fail
 729
 730 --*/
 731 ;
 732
 733 EFI_STATUS
 734 SetEhcDoorbell (
 735   IN  USB2_HC_DEV     *HcDev
 736   )
 737 /*++
 738
 739 Routine Description:
 740
 741   Set Ehc door bell bit
 742
 743 Arguments:
 744
 745   HcDev - USB2_HC_DEV
 746
 747 Returns:
 748
 749   EFI_SUCCESS       Success
 750   EFI_DEVICE_ERROR  Fail
 751
 752 --*/
 753 ;
 754
 755 EFI_STATUS
 756 SetFrameListLen (
 757   IN USB2_HC_DEV     *HcDev,
 758   IN UINTN           Length
 759   )
 760 /*++
 761
 762 Routine Description:
 763
 764   Set the length of Frame List
 765
 766 Arguments:
 767
 768   HcDev    - USB2_HC_DEV
 769   Length   - the required length of frame list
 770
 771 Returns:
 772
 773   EFI_SUCCESS            Success
 774   EFI_INVALID_PARAMETER  Invalid parameter
 775   EFI_DEVICE_ERROR       Fail
 776
 777 --*/
 778 ;
 779
 780 BOOLEAN
 781 IsFrameListProgrammable (
 782   IN  USB2_HC_DEV     *HcDev
 783   )
 784 /*++
 785
 786 Routine Description:
 787
 788   Whether frame list is programmable
 789
 790 Arguments:
 791
 792   HcDev - USB2_HC_DEV
 793
 794 Returns:
 795
 796   TRUE   Programmable
 797   FALSE  Unprogrammable
 798
 799 --*/
 800 ;
 801
 802 BOOLEAN
 803 IsPeriodicScheduleEnabled (
 804   IN  USB2_HC_DEV     *HcDev
 805   )
 806 /*++
 807
 808 Routine Description:
 809
 810   Whether periodic schedule is enabled
 811
 812 Arguments:
 813
 814   HcDev - USB2_HC_DEV
 815
 816 Returns:
 817
 818   TRUE   Enabled
 819   FALSE  Disabled
 820
 821 --*/
 822 ;
 823
 824 BOOLEAN
 825 IsAsyncScheduleEnabled (
 826   IN  USB2_HC_DEV     *HcDev
 827   )
 828 /*++
 829
 830 Routine Description:
 831
 832   Whether asynchronous schedule is enabled
 833
 834 Arguments:
 835
 836   HcDev - USB2_HC_DEV
 837
 838 Returns:
 839
 840   TRUE   Enabled
 841   FALSE  Disabled
 842
 843 --*/
 844 ;
 845
 846 BOOLEAN
 847 IsEhcPortEnabled (
 848   IN  USB2_HC_DEV     *HcDev,
 849   IN  UINT8           PortNum
 850   )
 851 /*++
 852
 853 Routine Description:
 854
 855   Whether port is enabled
 856
 857 Arguments:
 858
 859   HcDev - USB2_HC_DEV
 860
 861 Returns:
 862
 863   TRUE   Enabled
 864   FALSE  Disabled
 865
 866 --*/
 867 ;
 868
 869 BOOLEAN
 870 IsEhcReseted (
 871   IN  USB2_HC_DEV     *HcDev
 872   )
 873 /*++
 874
 875 Routine Description:
 876
 877   Whether Ehc is halted
 878
 879 Arguments:
 880
 881   HcDev - USB2_HC_DEV
 882
 883 Returns:
 884
 885   TRUE   Reseted
 886   FALSE  Unreseted
 887
 888 --*/
 889 ;
 890
 891 BOOLEAN
 892 IsEhcHalted (
 893   IN  USB2_HC_DEV     *HcDev
 894   )
 895 /*++
 896
 897 Routine Description:
 898
 899   Whether Ehc is halted
 900
 901 Arguments:
 902
 903   HcDev  - USB2_HC_DEV
 904
 905 Returns:
 906
 907   TRUE   Halted
 908   FALSE  Not halted
 909
 910 --*/
 911 ;
 912
 913 BOOLEAN
 914 IsEhcSysError (
 915   IN  USB2_HC_DEV     *HcDev
 916   )
 917 /*++
 918
 919 Routine Description:
 920
 921   Whether Ehc is system error
 922
 923 Arguments:
 924
 925   HcDev  - USB2_HC_DEV
 926
 927 Returns:
 928
 929   TRUE   System error
 930   FALSE  No system error
 931
 932 --*/
 933 ;
 934
 935 BOOLEAN
 936 IsHighSpeedDevice (
 937   IN EFI_USB2_HC_PROTOCOL *This,
 938   IN UINT8                PortNum
 939   )
 940 /*++
 941
 942 Routine Description:
 943
 944   Whether high speed device attached
 945
 946 Arguments:
 947
 948   HcDev - USB2_HC_DEV
 949
 950 Returns:
 951
 952   TRUE   High speed
 953   FALSE  Full speed
 954
 955 --*/
 956 ;
 957
 958 EFI_STATUS
 959 WaitForEhcReset (
 960   IN USB2_HC_DEV             *HcDev,
 961   IN UINTN                   Timeout
 962   )
 963 /*++
 964
 965 Routine Description:
 966
 967   wait for Ehc reset or timeout
 968
 969 Arguments:
 970
 971   HcDev   - USB2_HC_DEV
 972   Timeout - timeout threshold
 973
 974 Returns:
 975
 976   EFI_SUCCESS    Success
 977   EFI_TIMEOUT    Timeout
 978
 979 --*/
 980 ;
 981
 982 EFI_STATUS
 983 WaitForEhcHalt (
 984   IN USB2_HC_DEV             *HcDev,
 985   IN UINTN                   Timeout
 986   )
 987 /*++
 988
 989 Routine Description:
 990
 991   wait for Ehc halt or timeout
 992
 993 Arguments:
 994
 995   HcDev   - USB2_HC_DEV
 996   Timeout - timeout threshold
 997
 998 Returns:
 999
1000   EFI_SUCCESS    Success
1001   EFI_TIMEOUT    Timeout
1002
1003 --*/
1004 ;
1005
1006 EFI_STATUS
1007 WaitForEhcNotHalt (
1008   IN USB2_HC_DEV             *HcDev,
1009   IN UINTN                   Timeout
1010   )
1011 /*++
1012
1013 Routine Description:
1014
1015   wait for Ehc not halt or timeout
1016
1017 Arguments:
1018
1019   HcDev   - USB2_HC_DEV
1020   Timeout - timeout threshold
1021
1022 Returns:
1023
1024   EFI_SUCCESS    Success
1025   EFI_TIMEOUT    Timeout
1026
1027 --*/
1028 ;
1029
1030 EFI_STATUS
1031 WaitForEhcDoorbell (
1032   IN  USB2_HC_DEV            *HcDev,
1033   IN UINTN                   Timeout
1034   )
1035 /*++
1036
1037 Routine Description:
1038
1039   Wait for periodic schedule disable or timeout
1040
1041 Arguments:
1042
1043   HcDev   - USB2_HC_DEV
1044   Timeout - timeout threshold
1045
1046 Returns:
1047
1048   EFI_SUCCESS    Success
1049   EFI_TIMEOUT    Timeout
1050
1051 --*/
1052 ;
1053
1054 EFI_STATUS
1055 WaitForAsyncScheduleEnable (
1056   IN USB2_HC_DEV             *HcDev,
1057   IN UINTN                   Timeout
1058   )
1059 /*++
1060
1061 Routine Description:
1062
1063   Wait for Ehc asynchronous schedule enable or timeout
1064
1065 Arguments:
1066
1067   HcDev   - USB2_HC_DEV
1068   Timeout - timeout threshold
1069
1070 Returns:
1071
1072   EFI_SUCCESS    Success
1073   EFI_TIMEOUT    Timeout
1074
1075 --*/
1076 ;
1077
1078 EFI_STATUS
1079 WaitForAsyncScheduleDisable (
1080   IN USB2_HC_DEV             *HcDev,
1081   IN UINTN                   Timeout
1082   )
1083 /*++
1084
1085 Routine Description:
1086
1087   Wait for Ehc asynchronous schedule disable or timeout
1088
1089 Arguments:
1090
1091   HcDev   - USB2_HC_DEV
1092   Timeout - timeout threshold
1093
1094 Returns:
1095
1096   EFI_SUCCESS    Success
1097   EFI_TIMEOUT    Timeout
1098
1099 --*/
1100 ;
1101
1102 EFI_STATUS
1103 WaitForPeriodicScheduleEnable (
1104   IN USB2_HC_DEV             *HcDev,
1105   IN UINTN                   Timeout
1106   )
1107 /*++
1108
1109 Routine Description:
1110
1111   Wait for Ehc periodic schedule enable or timeout
1112
1113 Arguments:
1114
1115   HcDev   - USB2_HC_DEV
1116   Timeout - timeout threshold
1117
1118 Returns:
1119
1120   EFI_SUCCESS    Success
1121   EFI_TIMEOUT    Timeout
1122
1123 --*/
1124 ;
1125
1126 EFI_STATUS
1127 WaitForPeriodicScheduleDisable (
1128   IN USB2_HC_DEV             *HcDev,
1129   IN UINTN                   Timeout
1130   )
1131 /*++
1132
1133 Routine Description:
1134
1135   Wait for periodic schedule disable or timeout
1136
1137 Arguments:
1138
1139   HcDev   - USB2_HC_DEV
1140   Timeout - timeout threshold
1141
1142 Returns:
1143
1144   EFI_SUCCESS    Success
1145   EFI_TIMEOUT    Timeout
1146
1147 --*/
1148 ;
1149
1150 EFI_STATUS
1151 GetCapabilityLen (
1152   IN USB2_HC_DEV     *HcDev
1153   )
1154 /*++
1155
1156 Routine Description:
1157
1158   Get the length of capability register
1159
1160 Arguments:
1161
1162   HcDev - USB2_HC_DEV
1163
1164 Returns:
1165
1166   EFI_SUCCESS       Success
1167   EFI_DEVICE_ERROR  Fail
1168
1169 --*/
1170 ;
1171
1172 EFI_STATUS
1173 SetFrameListBaseAddr (
1174   IN USB2_HC_DEV     *HcDev,
1175   IN UINT32          FrameBuffer
1176   )
1177 /*++
1178
1179 Routine Description:
1180
1181   Set base address of frame list first entry
1182
1183 Arguments:
1184
1185   HcDev       - USB2_HC_DEV
1186   FrameBuffer - base address of first entry of frame list
1187
1188 Returns:
1189
1190   EFI_SUCCESS       Success
1191   EFI_DEVICE_ERROR  Fail
1192
1193 --*/
1194 ;
1195
1196 EFI_STATUS
1197 SetAsyncListAddr (
1198   IN USB2_HC_DEV        *HcDev,
1199   IN EHCI_QH_ENTITY     *QhPtr
1200   )
1201 /*++
1202
1203 Routine Description:
1204
1205   Set address of first Async schedule Qh
1206
1207 Arguments:
1208
1209   HcDev    - USB2_HC_DEV
1210   QhPtr    - A pointer to first Qh in the Async schedule
1211
1212 Returns:
1213
1214   EFI_SUCCESS       Success
1215   EFI_DEVICE_ERROR  Fail
1216
1217 --*/
1218 ;
1219
1220 EFI_STATUS
1221 SetCtrlDataStructSeg (
1222   IN USB2_HC_DEV     *HcDev
1223   )
1224 /*++
1225
1226 Routine Description:
1227
1228   Set address of first Async schedule Qh
1229
1230 Arguments:
1231
1232   HcDev    - USB2_HC_DEV
1233   QhPtr    - A pointer to first Qh in the Async schedule
1234
1235 Returns:
1236
1237   EFI_SUCCESS       Success
1238   EFI_DEVICE_ERROR  Fail
1239
1240 --*/
1241 ;
1242
1243 EFI_STATUS
1244 SetPortRoutingEhc (
1245   IN USB2_HC_DEV     *HcDev
1246   )
1247 /*++
1248
1249 Routine Description:
1250
1251   Set Ehc port routing bit
1252
1253 Arguments:
1254
1255   HcDev - USB2_HC_DEV
1256
1257 Returns:
1258
1259   EFI_SUCCESS       Success
1260   EFI_DEVICE_ERROR  Fail
1261
1262 --*/
1263 ;
1264
1265 EFI_STATUS
1266 EnablePeriodicSchedule (
1267   IN  USB2_HC_DEV     *HcDev
1268   )
1269 /*++
1270
1271 Routine Description:
1272
1273   Enable periodic schedule
1274
1275 Arguments:
1276
1277   HcDev - USB2_HC_DEV
1278
1279 Returns:
1280
1281   EFI_SUCCESS       Success
1282   EFI_DEVICE_ERROR  Fail
1283
1284 --*/
1285 ;
1286
1287 EFI_STATUS
1288 DisablePeriodicSchedule (
1289   IN  USB2_HC_DEV     *HcDev
1290   )
1291 /*++
1292
1293 Routine Description:
1294
1295   Disable periodic schedule
1296
1297 Arguments:
1298
1299   HcDev - USB2_HC_DEV
1300
1301 Returns:
1302
1303   EFI_SUCCESS       Success
1304   EFI_DEVICE_ERROR  Fail
1305
1306 --*/
1307 ;
1308
1309 EFI_STATUS
1310 EnableAsynchronousSchedule (
1311   IN  USB2_HC_DEV     *HcDev
1312   )
1313 /*++
1314
1315 Routine Description:
1316
1317   Enable asynchrounous schedule
1318
1319 Arguments:
1320
1321   HcDev - USB2_HC_DEV
1322
1323 Returns:
1324
1325   EFI_SUCCESS       Success
1326   EFI_DEVICE_ERROR  Fail
1327
1328 --*/
1329 ;
1330
1331 EFI_STATUS
1332 DisableAsynchronousSchedule (
1333   IN  USB2_HC_DEV     *HcDev
1334   )
1335 /*++
1336
1337 Routine Description:
1338
1339   Disable asynchrounous schedule
1340
1341 Arguments:
1342
1343   HcDev - USB2_HC_DEV
1344
1345 Returns:
1346
1347   EFI_SUCCESS       Success
1348   EFI_DEVICE_ERROR  Fail
1349
1350 --*/
1351 ;
1352
1353 EFI_STATUS
1354 StartScheduleExecution (
1355   IN  USB2_HC_DEV     *HcDev
1356   )
1357 /*++
1358
1359 Routine Description:
1360
1361   Start Ehc schedule execution
1362
1363 Arguments:
1364
1365   HcDev - USB2_HC_DEV
1366
1367 Returns:
1368
1369   EFI_SUCCESS       Success
1370   EFI_DEVICE_ERROR  Fail
1371
1372 --*/
1373 ;
1374
1375 EFI_STATUS
1376 ResetEhc (
1377   IN  USB2_HC_DEV     *HcDev
1378   )
1379 /*++
1380
1381 Routine Description:
1382
1383   Reset Ehc
1384
1385 Arguments:
1386
1387   HcDev - USB2_HC_DEV
1388
1389 Returns:
1390
1391   EFI_SUCCESS       Success
1392   EFI_DEVICE_ERROR  Fail
1393
1394 --*/
1395 ;
1396
1397 EFI_STATUS
1398 ClearEhcAllStatus (
1399   IN  USB2_HC_DEV     *HcDev
1400   )
1401 /*++
1402
1403 Routine Description:
1404
1405   Clear Ehc all status bits
1406
1407 Arguments:
1408
1409   HcDev - USB2_HC_DEV
1410
1411 Returns:
1412
1413   EFI_SUCCESS        Success
1414   EFI_DEVICE_ERROR   Fail
1415
1416 --*/
1417 ;
1418
1419 //
1420 // EhciSched Functions
1421 //
1422 EFI_STATUS
1423 InitialPeriodicFrameList (
1424   IN USB2_HC_DEV      *HcDev,
1425   IN UINTN            Length
1426   )
1427 /*++
1428
1429 Routine Description:
1430
1431   Initialize Periodic Schedule Frame List
1432
1433 Arguments:
1434
1435   HcDev   - USB2_HC_DEV
1436   Length  - Frame List Length
1437
1438 Returns:
1439
1440   EFI_SUCCESS        Success
1441   EFI_DEVICE_ERROR   Fail
1442
1443 --*/
1444 ;
1445
1446 VOID
1447 DeinitialPeriodicFrameList (
1448   IN  USB2_HC_DEV     *HcDev
1449   )
1450 /*++
1451
1452 Routine Description:
1453
1454   Deinitialize Periodic Schedule Frame List
1455
1456 Arguments:
1457
1458   HcDev - USB2_HC_DEV
1459
1460 Returns:
1461
1462   VOID
1463
1464 --*/
1465 ;
1466
1467 EFI_STATUS
1468 CreatePollingTimer (
1469   IN  USB2_HC_DEV      *HcDev,
1470   IN  EFI_EVENT_NOTIFY NotifyFunction
1471   )
1472 /*++
1473
1474 Routine Description:
1475
1476   Create Async Request Polling Timer
1477
1478 Arguments:
1479
1480   HcDev          - USB2_HC_DEV
1481   NotifyFunction - Timer Notify Function
1482
1483 Returns:
1484
1485   EFI_SUCCESS        Success
1486   EFI_DEVICE_ERROR   Fail
1487
1488 --*/
1489 ;
1490
1491 EFI_STATUS
1492 DestoryPollingTimer (
1493   IN  USB2_HC_DEV *HcDev
1494   )
1495 /*++
1496
1497 Routine Description:
1498
1499   Destory Async Request Polling Timer
1500
1501 Arguments:
1502
1503   HcDev - USB2_HC_DEV
1504
1505 Returns:
1506
1507   EFI_SUCCESS        Success
1508   EFI_DEVICE_ERROR   Fail
1509
1510 --*/
1511 ;
1512
1513 EFI_STATUS
1514 StartPollingTimer (
1515   IN  USB2_HC_DEV *HcDev
1516   )
1517 /*++
1518
1519 Routine Description:
1520
1521   Start Async Request Polling Timer
1522
1523 Arguments:
1524
1525   HcDev - USB2_HC_DEV
1526
1527 Returns:
1528
1529   EFI_SUCCESS        Success
1530   EFI_DEVICE_ERROR   Fail
1531
1532 --*/
1533 ;
1534
1535 EFI_STATUS
1536 StopPollingTimer (
1537   IN  USB2_HC_DEV *HcDev
1538   )
1539 /*++
1540
1541 Routine Description:
1542
1543   Stop Async Request Polling Timer
1544
1545 Arguments:
1546
1547   HcDev - USB2_HC_DEV
1548
1549 Returns:
1550
1551   EFI_SUCCESS        Success
1552   EFI_DEVICE_ERROR   Fail
1553
1554 --*/
1555 ;
1556
1557 EFI_STATUS
1558 CreateQh (
1559   IN  USB2_HC_DEV         *HcDev,
1560   IN  UINT8               DeviceAddr,
1561   IN  UINT8               Endpoint,
1562   IN  UINT8               DeviceSpeed,
1563   IN  UINTN               MaxPacketLen,
1564   OUT EHCI_QH_ENTITY      **QhPtrPtr
1565   )
1566 /*++
1567
1568 Routine Description:
1569
1570   Create Qh Structure and Pre-Initialize
1571
1572 Arguments:
1573
1574   HcDev          - USB2_HC_DEV
1575   DeviceAddr     - Address of Device
1576   Endpoint       - Endpoint Number
1577   DeviceSpeed    - Device Speed
1578   MaxPacketLen   - Max Length of one Packet
1579   QhPtrPtr       - A pointer of pointer to Qh for return
1580
1581 Returns:
1582
1583   EFI_SUCCESS       Success
1584   EFI_DEVICE_ERROR  Fail
1585
1586 --*/
1587 ;
1588
1589 EFI_STATUS
1590 CreateControlQh (
1591   IN  USB2_HC_DEV                       *HcDev,
1592   IN  UINT8                             DeviceAddr,
1593   IN  UINT8                             DeviceSpeed,
1594   IN UINTN                              MaxPacketLen,
1595   IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1596   OUT EHCI_QH_ENTITY                    **QhPtrPtr
1597   )
1598 /*++
1599
1600 Routine Description:
1601
1602   Create Qh for Control Transfer
1603
1604 Arguments:
1605
1606   HcDev         - USB2_HC_DEV
1607   DeviceAddr    - Address of Device
1608   DeviceSpeed   - Device Speed
1609   MaxPacketLen  - Max Length of one Packet
1610   Translator    - Translator Transaction for SplitX
1611   QhPtrPtr      - A pointer of pointer to Qh for return
1612
1613 Returns:
1614
1615   EFI_SUCCESS       Success
1616   EFI_DEVICE_ERROR  Fail
1617
1618 --*/
1619 ;
1620
1621 EFI_STATUS
1622 CreateBulkQh (
1623   IN  USB2_HC_DEV                         *HcDev,
1624   IN  UINT8                               DeviceAddr,
1625   IN  UINT8                               EndPointAddr,
1626   IN  UINT8                               DeviceSpeed,
1627   IN  UINT8                               DataToggle,
1628   IN  UINTN                               MaxPacketLen,
1629   IN  EFI_USB2_HC_TRANSACTION_TRANSLATOR  *Translator,
1630   OUT EHCI_QH_ENTITY                      **QhPtrPtr
1631   )
1632 /*++
1633
1634 Routine Description:
1635
1636   Create Qh for Bulk Transfer
1637
1638 Arguments:
1639
1640   HcDev         - USB2_HC_DEV
1641   DeviceAddr    - Address of Device
1642   EndPointAddr  - Address of Endpoint
1643   DeviceSpeed   - Device Speed
1644   MaxPacketLen  - Max Length of one Packet
1645   Translator    - Translator Transaction for SplitX
1646   QhPtrPtr      - A pointer of pointer to Qh for return
1647
1648 Returns:
1649
1650   EFI_SUCCESS       Success
1651   EFI_DEVICE_ERROR  Fail
1652
1653 --*/
1654 ;
1655
1656 EFI_STATUS
1657 CreateInterruptQh (
1658   IN  USB2_HC_DEV                        *HcDev,
1659   IN  UINT8                              DeviceAddr,
1660   IN  UINT8                              EndPointAddr,
1661   IN  UINT8                              DeviceSpeed,
1662   IN  UINT8                              DataToggle,
1663   IN  UINTN                              MaxPacketLen,
1664   IN  UINTN                              Interval,
1665   IN  EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1666   OUT EHCI_QH_ENTITY                     **QhPtrPtr
1667   )
1668 /*++
1669
1670 Routine Description:
1671
1672   Create Qh for Control Transfer
1673
1674 Arguments:
1675
1676   HcDev        - USB2_HC_DEV
1677   DeviceAddr   - Address of Device
1678   EndPointAddr - Address of Endpoint
1679   DeviceSpeed  - Device Speed
1680   MaxPacketLen - Max Length of one Packet
1681   Interval     - value of interval
1682   Translator   - Translator Transaction for SplitX
1683   QhPtrPtr     - A pointer of pointer to Qh for return
1684
1685 Returns:
1686
1687   EFI_SUCCESS       Success
1688   EFI_DEVICE_ERROR  Fail
1689
1690 --*/
1691 ;
1692
1693 VOID
1694 DestoryQh (
1695   IN  USB2_HC_DEV        *HcDev,
1696   IN EHCI_QH_ENTITY      *QhPtr
1697   )
1698 /*++
1699
1700 Routine Description:
1701
1702   Destory Qh Structure
1703
1704 Arguments:
1705
1706   HcDev - USB2_HC_DEV
1707   QhPtr - A pointer to Qh
1708
1709 Returns:
1710
1711   VOID
1712
1713 --*/
1714 ;
1715
1716 EFI_STATUS
1717 CreateQtd (
1718   IN  USB2_HC_DEV          *HcDev,
1719   IN  UINT8                *DataPtr,
1720   IN  UINTN                DataLen,
1721   IN  UINT8                PktId,
1722   IN  UINT8                Toggle,
1723   IN  UINT8                QtdStatus,
1724   OUT EHCI_QTD_ENTITY      **QtdPtrPtr
1725   )
1726 /*++
1727
1728 Routine Description:
1729
1730   Create Qtd Structure and Pre-Initialize it
1731
1732 Arguments:
1733
1734   HcDev       - USB2_HC_DEV
1735   DataPtr     - A pointer to user data buffer to transfer
1736   DataLen     - Length of user data to transfer
1737   PktId       - Packet Identification of this Qtd
1738   Toggle      - Data Toggle of this Qtd
1739   QtdStatus   - Default value of status of this Qtd
1740   QtdPtrPtr   - A pointer of pointer to Qtd for return
1741
1742 Returns:
1743
1744   EFI_SUCCESS            Success
1745   EFI_OUT_OF_RESOURCES   Cannot allocate resources
1746
1747 --*/
1748 ;
1749
1750 EFI_STATUS
1751 CreateSetupQtd (
1752   IN  USB2_HC_DEV          *HcDev,
1753   IN  UINT8                *DevReqPtr,
1754   OUT EHCI_QTD_ENTITY      **QtdPtrPtr
1755   )
1756 /*++
1757
1758 Routine Description:
1759
1760   Create Qtd Structure for Setup
1761
1762 Arguments:
1763
1764   HcDev      - USB2_HC_DEV
1765   DevReqPtr  - A pointer to Device Request Data
1766   QtdPtrPtr  - A pointer of pointer to Qtd for return
1767
1768 Returns:
1769
1770   EFI_SUCCESS            Success
1771   EFI_OUT_OF_RESOURCES   Cannot allocate resources
1772
1773 --*/
1774 ;
1775
1776 EFI_STATUS
1777 CreateDataQtd (
1778   IN  USB2_HC_DEV           *HcDev,
1779   IN  UINT8                 *DataPtr,
1780   IN  UINTN                 DataLen,
1781   IN  UINT8                 PktId,
1782   IN  UINT8                 Toggle,
1783   OUT EHCI_QTD_ENTITY       **QtdPtrPtr
1784   )
1785 /*++
1786
1787 Routine Description:
1788
1789   Create Qtd Structure for data
1790
1791 Arguments:
1792
1793   HcDev       - USB2_HC_DEV
1794   DataPtr     - A pointer to user data buffer to transfer
1795   DataLen     - Length of user data to transfer
1796   PktId       - Packet Identification of this Qtd
1797   Toggle      - Data Toggle of this Qtd
1798   QtdPtrPtr   - A pointer of pointer to Qtd for return
1799
1800 Returns:
1801
1802   EFI_SUCCESS            Success
1803   EFI_OUT_OF_RESOURCES   Cannot allocate resources
1804
1805 --*/
1806 ;
1807
1808 EFI_STATUS
1809 CreateStatusQtd (
1810   IN  USB2_HC_DEV           *HcDev,
1811   IN  UINT8                 PktId,
1812   OUT EHCI_QTD_ENTITY       **QtdPtrPtr
1813   )
1814 /*++
1815
1816 Routine Description:
1817
1818   Create Qtd Structure for status
1819
1820 Arguments:
1821
1822   HcDev       - USB2_HC_DEV
1823   PktId       - Packet Identification of this Qtd
1824   QtdPtrPtr   - A pointer of pointer to Qtd for return
1825
1826 Returns:
1827
1828   EFI_SUCCESS            Success
1829   EFI_OUT_OF_RESOURCES   Cannot allocate resources
1830
1831 --*/
1832 ;
1833
1834 EFI_STATUS
1835 CreateAltQtd (
1836   IN  USB2_HC_DEV           *HcDev,
1837   IN  UINT8                 PktId,
1838   OUT EHCI_QTD_ENTITY       **QtdPtrPtr
1839   )
1840 /*++
1841
1842 Routine Description:
1843
1844   Create Qtd Structure for Alternative
1845
1846 Arguments:
1847
1848   HcDev      - USB2_HC_DEV
1849   PktId      - Packet Identification of this Qtd
1850   QtdPtrPtr  - A pointer of pointer to Qtd for return
1851
1852 Returns:
1853
1854   EFI_SUCCESS            Success
1855   EFI_OUT_OF_RESOURCES   Cannot allocate resources
1856
1857 --*/
1858 ;
1859
1860 EFI_STATUS
1861 CreateControlQtds (
1862   IN  USB2_HC_DEV                         *HcDev,
1863   IN UINT8                                DataPktId,
1864   IN UINT8                                *RequestCursor,
1865   IN UINT8                                *DataCursor,
1866   IN UINTN                                DataLen,
1867   IN  EFI_USB2_HC_TRANSACTION_TRANSLATOR  *Translator,
1868   OUT EHCI_QTD_ENTITY                     **ControlQtdsHead
1869   )
1870 /*++
1871
1872 Routine Description:
1873
1874   Create Qtds list for Control Transfer
1875
1876 Arguments:
1877
1878   HcDev           - USB2_HC_DEV
1879   DataPktId       - Packet Identification of Data Qtds
1880   RequestCursor   - A pointer to request structure buffer to transfer
1881   DataCursor      - A pointer to user data buffer to transfer
1882   DataLen         - Length of user data to transfer
1883   ControlQtdsHead - A pointer of pointer to first Qtd for control tranfer for return
1884
1885 Returns:
1886
1887   EFI_SUCCESS       Success
1888   EFI_DEVICE_ERROR  Fail
1889
1890 --*/
1891 ;
1892
1893 EFI_STATUS
1894 CreateBulkOrInterruptQtds (
1895   IN  USB2_HC_DEV                          *HcDev,
1896   IN  UINT8                                PktId,
1897   IN  UINT8                                *DataCursor,
1898   IN  UINTN                                DataLen,
1899   IN  EFI_USB2_HC_TRANSACTION_TRANSLATOR   *Translator,
1900   OUT EHCI_QTD_ENTITY                      **QtdsHead
1901   )
1902 /*++
1903
1904 Routine Description:
1905
1906   Create Qtds list for Bulk or Interrupt Transfer
1907
1908 Arguments:
1909
1910   HcDev        - USB2_HC_DEV
1911   PktId        - Packet Identification of Qtds
1912   DataCursor   - A pointer to user data buffer to transfer
1913   DataLen      - Length of user data to transfer
1914   DataToggle   - Data Toggle to start
1915   Translator   - Translator Transaction for SplitX
1916   QtdsHead     - A pointer of pointer to first Qtd for control tranfer for return
1917
1918 Returns:
1919
1920   EFI_SUCCESS       Success
1921   EFI_DEVICE_ERROR  Fail
1922
1923 --*/
1924 ;
1925
1926 VOID
1927 DestoryQtds (
1928   IN USB2_HC_DEV          *HcDev,
1929   IN EHCI_QTD_ENTITY      *FirstQtdPtr
1930   )
1931 /*++
1932
1933 Routine Description:
1934
1935   Destory all Qtds in the list
1936
1937 Arguments:
1938
1939   HcDev        - USB2_HC_DEV
1940   FirstQtdPtr  - A pointer to first Qtd in the list
1941
1942 Returns:
1943
1944   VOID
1945
1946 --*/
1947 ;
1948
1949 VOID
1950 LinkQtdToQtd (
1951   IN EHCI_QTD_ENTITY     *PreQtdPtr,
1952   IN EHCI_QTD_ENTITY     *QtdPtr
1953   )
1954 /*++
1955
1956 Routine Description:
1957
1958   Link Qtds together
1959
1960 Arguments:
1961
1962   PreQtdPtr  - A pointer to pre Qtd
1963   QtdPtr     - A pointer to next Qtd
1964
1965 Returns:
1966
1967   VOID
1968
1969 --*/
1970 ;
1971
1972 VOID
1973 LinkQtdsToAltQtd (
1974   IN EHCI_QTD_ENTITY     *FirstQtdPtr,
1975   IN EHCI_QTD_ENTITY     *AltQtdPtr
1976   )
1977 /*++
1978
1979 Routine Description:
1980
1981   Link AlterQtds together
1982
1983 Arguments:
1984
1985   FirstQtdPtr - A pointer to first Qtd in the list
1986   AltQtdPtr - A pointer to alternative Qtd
1987
1988 Returns:
1989   VOID
1990
1991 --*/
1992 ;
1993
1994 VOID
1995 LinkQtdToQh (
1996   IN EHCI_QH_ENTITY      *QhPtr,
1997   IN EHCI_QTD_ENTITY     *QtdEntryPtr
1998   )
1999 /*++
2000
2001 Routine Description:
2002
2003   Link Qtds list to Qh
2004
2005 Arguments:
2006
2007   QhPtr   - A pointer to Qh
2008   QtdPtr  - A pointer to first Qtd in the list
2009
2010 Returns:
2011
2012   VOID
2013
2014 --*/
2015 ;
2016
2017 EFI_STATUS
2018 LinkQhToAsyncList (
2019   IN  USB2_HC_DEV       *HcDev,
2020   IN EHCI_QH_ENTITY     *QhPtr
2021   )
2022 /*++
2023
2024 Routine Description:
2025
2026   Link Qh to Async Schedule List
2027
2028 Arguments:
2029
2030   HcDev - USB2_HC_DEV
2031   QhPtr - A pointer to Qh
2032
2033 Returns:
2034
2035   EFI_SUCCESS       Success
2036   EFI_DEVICE_ERROR  Fail
2037
2038 --*/
2039 ;
2040
2041 EFI_STATUS
2042 UnlinkQhFromAsyncList (
2043   IN USB2_HC_DEV         *HcDev,
2044   IN EHCI_QH_ENTITY      *QhPtr
2045   )
2046 /*++
2047
2048 Routine Description:
2049
2050   Unlink Qh from Async Schedule List
2051
2052 Arguments:
2053
2054   HcDev   - USB2_HC_DEV
2055   QhPtr   - A pointer to Qh
2056
2057 Returns:
2058
2059   EFI_SUCCESS       Success
2060   EFI_DEVICE_ERROR  Fail
2061
2062 --*/
2063 ;
2064
2065 VOID
2066 LinkQhToPeriodicList (
2067   IN USB2_HC_DEV        *HcDev,
2068   IN EHCI_QH_ENTITY     *QhPtr
2069   )
2070 /*++
2071
2072 Routine Description:
2073
2074   Link Qh to Periodic Schedule List
2075
2076 Arguments:
2077
2078   HcDev   - USB2_HC_DEV
2079   QhPtr   - A pointer to Qh
2080
2081 Returns:
2082
2083   VOID
2084
2085 --*/
2086 ;
2087
2088 VOID
2089 UnlinkQhFromPeriodicList (
2090   IN USB2_HC_DEV         *HcDev,
2091   IN EHCI_QH_ENTITY      *QhPtr,
2092   IN UINTN                Interval
2093   )
2094 /*++
2095
2096 Routine Description:
2097
2098   Unlink Qh from Periodic Schedule List
2099
2100 Arguments:
2101
2102   HcDev     - USB2_HC_DEV
2103   QhPtr     - A pointer to Qh
2104   Interval  - Interval of this periodic transfer
2105
2106 Returns:
2107
2108   VOID
2109
2110 --*/
2111 ;
2112
2113 VOID
2114 LinkToAsyncReqeust (
2115   IN  USB2_HC_DEV        *HcDev,
2116   IN  EHCI_ASYNC_REQUEST *AsyncRequestPtr
2117   )
2118 /*++
2119
2120 Routine Description:
2121
2122   Llink AsyncRequest Entry to Async Request List
2123
2124 Arguments:
2125
2126   HcDev           - USB2_HC_DEV
2127   AsyncRequestPtr - A pointer to Async Request Entry
2128
2129 Returns:
2130
2131   VOID
2132
2133 --*/
2134 ;
2135
2136 VOID
2137 UnlinkFromAsyncReqeust (
2138   IN  USB2_HC_DEV        *HcDev,
2139   IN  EHCI_ASYNC_REQUEST *AsyncRequestPtr
2140   )
2141 /*++
2142
2143 Routine Description:
2144
2145   Unlink AsyncRequest Entry from Async Request List
2146
2147 Arguments:
2148
2149   HcDev           - USB2_HC_DEV
2150   AsyncRequestPtr - A pointer to Async Request Entry
2151
2152 Returns:
2153
2154   VOID
2155
2156 --*/
2157 ;
2158
2159 UINTN
2160 GetNumberOfQtd (
2161   IN EHCI_QTD_ENTITY    *FirstQtdPtr
2162   )
2163 /*++
2164
2165 Routine Description:
2166
2167   Number of Qtds in the list
2168
2169 Arguments:
2170
2171   FirstQtdPtr - A pointer to first Qtd in the list
2172
2173 Returns:
2174
2175   Number of Qtds in the list
2176
2177 --*/
2178 ;
2179
2180 UINTN
2181 GetNumberOfTransaction (
2182   IN UINTN    SizeOfData,
2183   IN UINTN    SizeOfTransaction
2184   )
2185 /*++
2186
2187 Routine Description:
2188
2189   Number of Transactions in one Qtd
2190
2191 Arguments:
2192
2193   SizeOfData           - Size of one Qtd
2194   SizeOfTransaction    - Size of one Transaction
2195
2196 Returns:
2197
2198   Number of Transactions in this Qtd
2199
2200 --*/
2201 ;
2202
2203 UINTN
2204 GetCapacityOfQtd (
2205   IN UINT8    *BufferCursor
2206   )
2207 /*++
2208
2209 Routine Description:
2210
2211   Get Capacity of Qtd
2212
2213 Arguments:
2214
2215   BufferCursor  - BufferCursor of the Qtd
2216
2217 Returns:
2218
2219   Capacity of Qtd
2220
2221 --*/
2222 ;
2223
2224 UINTN
2225 GetApproxiOfInterval (
2226   IN UINTN  Interval
2227   )
2228 /*++
2229
2230 Routine Description:
2231
2232   Get the approximate value in the 2 index sequence
2233
2234 Arguments:
2235
2236   Interval - the value of interval
2237
2238 Returns:
2239
2240   approximate value of interval in the 2 index sequence
2241
2242 --*/
2243 ;
2244
2245 EHCI_QTD_HW *
2246 GetQtdNextPointer (
2247   IN EHCI_QTD_HW *HwQtdPtr
2248   )
2249 /*++
2250
2251 Routine Description:
2252
2253   Get Qtd next pointer field
2254
2255 Arguments:
2256
2257   HwQtdPtr - A pointer to hardware Qtd structure
2258
2259 Returns:
2260
2261   A pointer to next hardware Qtd structure
2262
2263 --*/
2264 ;
2265
2266 BOOLEAN
2267 IsQtdStatusActive (
2268   IN EHCI_QTD_HW *HwQtdPtr
2269   )
2270 /*++
2271
2272 Routine Description:
2273
2274   Whether Qtd status is active or not
2275
2276 Arguments:
2277
2278   HwQtdPtr - A pointer to hardware Qtd structure
2279
2280 Returns:
2281
2282   TRUE    Active
2283   FALSE   Inactive
2284
2285 --*/
2286 ;
2287
2288 BOOLEAN
2289 IsQtdStatusHalted (
2290   IN EHCI_QTD_HW *HwQtdPtr
2291   )
2292 /*++
2293
2294 Routine Description:
2295
2296   Whether Qtd status is halted or not
2297
2298 Arguments:
2299
2300   HwQtdPtr - A pointer to hardware Qtd structure
2301
2302 Returns:
2303
2304   TRUE    Halted
2305   FALSE   Not halted
2306
2307 --*/
2308 ;
2309
2310 BOOLEAN
2311 IsQtdStatusBufferError (
2312   IN EHCI_QTD_HW *HwQtdPtr
2313   )
2314 /*++
2315
2316 Routine Description:
2317
2318   Whether Qtd status is buffer error or not
2319
2320 Arguments:
2321
2322   HwQtdPtr - A pointer to hardware Qtd structure
2323
2324 Returns:
2325
2326   TRUE    Buffer error
2327   FALSE   No buffer error
2328
2329 --*/
2330 ;
2331
2332 BOOLEAN
2333 IsQtdStatusBabbleError (
2334   IN EHCI_QTD_HW *HwQtdPtr
2335   )
2336 /*++
2337
2338 Routine Description:
2339
2340   Whether Qtd status is babble error or not
2341
2342 Arguments:
2343
2344   HwQtdPtr - A pointer to hardware Qtd structure
2345
2346 Returns:
2347
2348   TRUE    Babble error
2349   FALSE   No babble error
2350
2351 --*/
2352 ;
2353
2354 BOOLEAN
2355 IsQtdStatusTransactionError (
2356   IN EHCI_QTD_HW *HwQtdPtr
2357   )
2358 /*++
2359
2360 Routine Description:
2361
2362   Whether Qtd status is transaction error or not
2363
2364 Arguments:
2365
2366   HwQtdPtr - A pointer to hardware Qtd structure
2367
2368 Returns:
2369
2370   TRUE    Transaction error
2371   FALSE   No transaction error
2372
2373 --*/
2374 ;
2375
2376 BOOLEAN
2377 IsDataInTransfer (
2378   IN  UINT8     EndPointAddress
2379   )
2380 /*++
2381
2382 Routine Description:
2383
2384   Whether is a DataIn direction transfer
2385
2386 Arguments:
2387
2388   EndPointAddress - address of the endpoint
2389
2390 Returns:
2391
2392   TRUE    DataIn
2393   FALSE   DataOut
2394
2395 --*/
2396 ;
2397
2398 EFI_STATUS
2399 MapDataBuffer (
2400   IN  USB2_HC_DEV             *HcDev,
2401   IN  EFI_USB_DATA_DIRECTION  TransferDirection,
2402   IN  OUT VOID                *Data,
2403   IN  OUT UINTN               *DataLength,
2404   OUT UINT8                   *PktId,
2405   OUT UINT8                   **DataCursor,
2406   OUT VOID                    **DataMap
2407   )
2408 /*++
2409
2410 Routine Description:
2411
2412   Map address of user data buffer
2413
2414 Arguments:
2415
2416   HcDev             - USB2_HC_DEV
2417   TransferDirection - direction of transfer
2418   Data              - A pointer to user data buffer
2419   DataLength        - length of user data
2420   PktId             - Packte Identificaion
2421   DataCursor        - mapped address to return
2422   DataMap           - identificaion of this mapping to return
2423
2424 Returns:
2425
2426   EFI_SUCCESS        Success
2427   EFI_DEVICE_ERROR   Fail
2428
2429 --*/
2430 ;
2431
2432 EFI_STATUS
2433 MapRequestBuffer (
2434   IN  USB2_HC_DEV             *HcDev,
2435   IN  OUT VOID                *Request,
2436   OUT UINT8                   **RequestCursor,
2437   OUT VOID                    **RequestMap
2438   )
2439 /*++
2440
2441 Routine Description:
2442
2443   Map address of request structure buffer
2444
2445 Arguments:
2446
2447   HcDev           - USB2_HC_DEV
2448   Request         - A pointer to request structure
2449   RequestCursor   - Mapped address of request structure to return
2450   RequestMap      - Identificaion of this mapping to return
2451
2452 Returns:
2453
2454   EFI_SUCCESS        Success
2455   EFI_DEVICE_ERROR   Fail
2456
2457 --*/
2458 ;
2459
2460 VOID
2461 SetQtdBufferPointer (
2462   IN EHCI_QTD_HW *QtdHwPtr,
2463   IN VOID        *DataPtr,
2464   IN UINTN       DataLen
2465   )
2466 /*++
2467
2468 Routine Description:
2469
2470   Set data buffer pointers in Qtd
2471
2472 Arguments:
2473
2474   QtdHwPtr  - A pointer to Qtd hardware structure
2475   DataPtr   - A pointer to user data buffer
2476   DataLen   - Length of the user data buffer
2477
2478 Returns:
2479
2480   VOID
2481
2482 --*/
2483 ;
2484
2485 EHCI_QTD_HW *
2486 GetQtdAlternateNextPointer (
2487   IN EHCI_QTD_HW *HwQtdPtr
2488   )
2489 /*++
2490
2491 Routine Description:
2492
2493   Get Qtd alternate next pointer field
2494
2495 Arguments:
2496
2497   HwQtdPtr - A pointer to hardware Qtd structure
2498
2499 Returns:
2500
2501   A pointer to hardware alternate Qtd
2502
2503 --*/
2504 ;
2505
2506 VOID
2507 ZeroOutQhOverlay (
2508   IN EHCI_QH_ENTITY *QhPtr
2509   )
2510 /*++
2511
2512 Routine Description:
2513
2514   Zero out the fields in Qh structure
2515
2516 Arguments:
2517
2518   QhPtr - A pointer to Qh structure
2519
2520 Returns:
2521
2522   VOID
2523
2524 --*/
2525 ;
2526
2527 VOID
2528 UpdateAsyncRequestTransfer (
2529   IN EHCI_ASYNC_REQUEST *AsyncRequestPtr,
2530   IN UINT32             TransferResult,
2531   IN UINTN              ErrTDPos
2532   )
2533 /*++
2534
2535 Routine Description:
2536
2537   Update asynchronous request transfer
2538
2539 Arguments:
2540
2541   AsyncRequestPtr  - A pointer to async request
2542   TransferResult   - transfer result
2543   ErrQtdPos        - postion of error Qtd
2544
2545 Returns:
2546
2547   VOID
2548
2549 --*/
2550 ;
2551
2552
2553 EFI_STATUS
2554 DeleteAsyncRequestTransfer (
2555   IN  USB2_HC_DEV     *HcDev,
2556   IN  UINT8           DeviceAddress,
2557   IN  UINT8           EndPointAddress,
2558   OUT UINT8           *DataToggle
2559   )
2560 /*++
2561
2562 Routine Description:
2563
2564   Delete all asynchronous request transfer
2565
2566 Arguments:
2567
2568   HcDev           - USB2_HC_DEV
2569   DeviceAddress   - address of usb device
2570   EndPointAddress - address of endpoint
2571   DataToggle      - stored data toggle
2572
2573 Returns:
2574
2575   EFI_SUCCESS        Success
2576   EFI_DEVICE_ERROR   Fail
2577
2578 --*/
2579 ;
2580
2581 VOID
2582 CleanUpAllAsyncRequestTransfer (
2583   IN  USB2_HC_DEV *HcDev
2584   )
2585 /*++
2586
2587 Routine Description:
2588
2589   Clean up all asynchronous request transfer
2590
2591 Arguments:
2592
2593   HcDev - USB2_HC_DEV
2594
2595 Returns:
2596   VOID
2597
2598 --*/
2599 ;
2600
2601 EFI_STATUS
2602 ExecuteTransfer (
2603   IN  USB2_HC_DEV         *HcDev,
2604   IN BOOLEAN              IsControl,
2605   IN  EHCI_QH_ENTITY      *QhPtr,
2606   IN OUT UINTN            *ActualLen,
2607   OUT UINT8               *DataToggle,
2608   IN  UINTN               TimeOut,
2609   OUT UINT32              *TransferResult
2610   )
2611 /*++
2612
2613 Routine Description:
2614
2615   Execute Bulk or SyncInterrupt Transfer
2616
2617 Arguments:
2618
2619   HcDev            - USB2_HC_DEV
2620   IsControl        - Is control transfer or not
2621   QhPtr            - A pointer to Qh
2622   ActualLen        - Actual transfered Len
2623   DataToggle       - Data Toggle
2624   TimeOut          - TimeOut threshold
2625   TransferResult   - Transfer result
2626
2627 Returns:
2628
2629   EFI_SUCCESS        Sucess
2630   EFI_DEVICE_ERROR   Error
2631
2632 --*/
2633 ;
2634
2635 BOOLEAN
2636 CheckQtdsTransferResult (
2637   IN BOOLEAN             IsControl,
2638   IN  EHCI_QH_ENTITY     *QhPtr,
2639   OUT UINT32             *Result,
2640   OUT UINTN              *ErrQtdPos,
2641   OUT UINTN              *ActualLen
2642   )
2643 /*++
2644
2645 Routine Description:
2646
2647   Check transfer result of Qtds
2648
2649 Arguments:
2650
2651   IsControl     - Is control transfer or not
2652   QhPtr         - A pointer to Qh
2653   Result        - Transfer result
2654   ErrQtdPos     - Error TD Position
2655   ActualLen     - Actual Transfer Size
2656
2657 Returns:
2658
2659   TRUE    Qtds finished
2660   FALSE   Not finish
2661
2662 --*/
2663 ;
2664
2665 EFI_STATUS
2666 AsyncRequestMoniter (
2667   IN EFI_EVENT     Event,
2668   IN VOID          *Context
2669   )
2670 /*++
2671
2672 Routine Description:
2673
2674   Interrupt transfer periodic check handler
2675
2676 Arguments:
2677
2678   Event     - Interrupt event
2679   Context   - Pointer to USB2_HC_DEV
2680
2681 Returns:
2682
2683   EFI_SUCCESS        Success
2684   EFI_DEVICE_ERROR   Fail
2685
2686 --*/
2687 ;
2688
2689 #endif