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1 /*++
2
3 Copyright (c) 2006, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
8
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11
12 Module Name:
13
14 Ehci.h
15
16 Abstract:
17
18
19 Revision History
20 --*/
21
22 #ifndef _EHCI_H
23 #define _EHCI_H
24
25 //
26 // Universal Host Controller Interface data structures and defines
27 //
28 #include <IndustryStandard/pci22.h>
29
30
31 extern UINTN gEHCDebugLevel;
32 extern UINTN gEHCErrorLevel;
33
34
35 #define STALL_1_MACRO_SECOND 1
36 #define STALL_1_MILLI_SECOND 1000 * STALL_1_MACRO_SECOND
37 #define STALL_1_SECOND 1000 * STALL_1_MILLI_SECOND
38
39 #define MEM_UNIT_SIZE 128
40
41
42 #define SETUP_PACKET_PID_CODE 0x02
43 #define INPUT_PACKET_PID_CODE 0x01
44 #define OUTPUT_PACKET_PID_CODE 0x0
45
46 #define ITD_SELECT_TYPE 0x0
47 #define QH_SELECT_TYPE 0x01
48 #define SITD_SELECT_TYPE 0x02
49 #define FSTN_SELECT_TYPE 0x03
50
51 #define EHCI_SET_PORT_RESET_RECOVERY_TIME 50 * STALL_1_MILLI_SECOND
52 #define EHCI_CLEAR_PORT_RESET_RECOVERY_TIME STALL_1_MILLI_SECOND
53 #define EHCI_GENERIC_TIMEOUT 50 * STALL_1_MILLI_SECOND
54 #define EHCI_GENERIC_RECOVERY_TIME 50 * STALL_1_MACRO_SECOND
55 #define EHCI_SYNC_REQUEST_POLLING_TIME 50 * STALL_1_MACRO_SECOND
56 #define EHCI_ASYNC_REQUEST_POLLING_TIME 50 * STALL_1_MILLI_SECOND
57
58 #define USB_BAR_INDEX 0 /* how many bytes away from USB_BASE to 0x10 */
59
60 #define NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES 16
61
62 #define EHCI_MIN_PACKET_SIZE 8
63 #define EHCI_MAX_PACKET_SIZE 1024
64 #define EHCI_MAX_FRAME_LIST_LENGTH 1024
65 #define EHCI_BLOCK_SIZE_WITH_TT 64
66 #define EHCI_BLOCK_SIZE 512
67 #define EHCI_MAX_QTD_CAPACITY (EFI_PAGE_SIZE * 5)
68
69 #define NAK_COUNT_RELOAD 3
70 #define QTD_ERROR_COUNTER 3
71 #define HIGH_BANDWIDTH_PIPE_MULTIPLIER 1
72
73 #define QTD_STATUS_ACTIVE 0x80
74 #define QTD_STATUS_HALTED 0x40
75 #define QTD_STATUS_BUFFER_ERR 0x20
76 #define QTD_STATUS_BABBLE_ERR 0x10
77 #define QTD_STATUS_TRANSACTION_ERR 0x08
78 #define QTD_STATUS_DO_STOP_SPLIT 0x02
79 #define QTD_STATUS_DO_START_SPLIT 0
80 #define QTD_STATUS_DO_PING 0x01
81 #define QTD_STATUS_DO_OUT 0
82
83 #define DATA0 0
84 #define DATA1 1
85
86 #define MICRO_FRAME_0_CHANNEL 0x01
87 #define MICRO_FRAME_1_CHANNEL 0x02
88 #define MICRO_FRAME_2_CHANNEL 0x04
89 #define MICRO_FRAME_3_CHANNEL 0x08
90 #define MICRO_FRAME_4_CHANNEL 0x10
91 #define MICRO_FRAME_5_CHANNEL 0x20
92 #define MICRO_FRAME_6_CHANNEL 0x40
93 #define MICRO_FRAME_7_CHANNEL 0x80
94
95 #define CONTROL_TRANSFER 0x01
96 #define BULK_TRANSFER 0x02
97 #define SYNC_INTERRUPT_TRANSFER 0x04
98 #define ASYNC_INTERRUPT_TRANSFER 0x08
99 #define SYNC_ISOCHRONOUS_TRANSFER 0x10
100 #define ASYNC_ISOCHRONOUS_TRANSFER 0x20
101
102
103 //
104 // Enhanced Host Controller Registers definitions
105 //
106 extern EFI_DRIVER_BINDING_PROTOCOL gEhciDriverBinding;
107 extern EFI_COMPONENT_NAME_PROTOCOL gEhciComponentName;
108
109 #define USBCMD 0x0 /* Command Register Offset 00-03h */
110 #define USBCMD_RS 0x01 /* Run / Stop */
111 #define USBCMD_HCRESET 0x02 /* Host controller reset */
112 #define USBCMD_FLS_512 0x04 /* 512 elements (2048bytes) in Frame List */
113 #define USBCMD_FLS_256 0x08 /* 256 elements (1024bytes) in Frame List */
114 #define USBCMD_PSE 0x10 /* Periodic schedule enable */
115 #define USBCMD_ASE 0x20 /* Asynchronous schedule enable */
116 #define USBCMD_IAAD 0x40 /* Interrupt on async advance doorbell */
117
118 #define USBSTS 0x04 /* Statue Register Offset 04-07h */
119 #define USBSTS_HSE 0x10 /* Host system error */
120 #define USBSTS_IAA 0x20 /* Interrupt on async advance */
121 #define USBSTS_HCH 0x1000 /* Host controller halted */
122 #define USBSTS_PSS 0x4000 /* Periodic schedule status */
123 #define USBSTS_ASS 0x8000 /* Asynchronous schedule status */
124
125 #define USBINTR 0x08 /* Command Register Offset 08-0bh */
126
127 #define FRINDEX 0x0c /* Frame Index Offset 0c-0fh */
128
129 #define CTRLDSSGMENT 0x10 /* 4G Segment Selector Offset 10-13h */
130
131 #define PERIODICLISTBASE 0x14 /* Frame List Base Address Offset 14-17h */
132
133 #define ASYNCLISTADDR 0x18 /* Next Asynchronous List Address Offset 18-1bh */
134
135 #define CONFIGFLAG 0x40 /* Configured Flag Register Offset 40-43h */
136 #define CONFIGFLAG_CF 0x01 /* Configure Flag */
137
138 #define PORTSC 0x44 /* Port Status/Control Offset 44-47h */
139 #define PORTSC_CCS 0x01 /* Current Connect Status*/
140 #define PORTSC_CSC 0x02 /* Connect Status Change */
141 #define PORTSC_PED 0x04 /* Port Enable / Disable */
142 #define PORTSC_PEDC 0x08 /* Port Enable / Disable Change */
143 #define PORTSC_OCA 0x10 /* Over current Active */
144 #define PORTSC_OCC 0x20 /* Over current Change */
145 #define PORTSC_FPR 0x40 /* Force Port Resume */
146 #define PORTSC_SUSP 0x80 /* Port Suspend State */
147 #define PORTSC_PR 0x100 /* Port Reset */
148 #define PORTSC_LS_KSTATE 0x400 /* Line Status K-state */
149 #define PORTSC_LS_JSTATE 0x800 /* Line Status J-state */
150 #define PORTSC_PP 0x1000 /* Port Power */
151 #define PORTSC_PO 0x2000 /* Port Owner */
152
153 #define CAPLENGTH 0 /* Capability Register Length 00h */
154
155 #define HCIVERSION 0x02 /* Interface Version Number 02-03h */
156
157 #define HCSPARAMS 0x04 /* Structural Parameters 04-07h */
158 #define HCSP_NPORTS 0x0f /* Number of physical downstream ports on host controller */
159
160 #define HCCPARAMS 0x08 /* Capability Parameters 08-0bh */
161 #define HCCP_64BIT 0x01 /* 64-bit Addressing Capability */
162 #define HCCP_PFLF 0x02 /* Programmable Frame List Flag */
163 #define HCCP_EECP 0xff00 /* EHCI Extemded Capabilities Pointer */
164
165 #define HCSPPORTROUTE 0x0c /* Companion Port Route Description 60b */
166
167 #define CLASSC 0x09 /* Class Code 09-0bh */
168
169 #define USBBASE 0x10 /* Base Address to Memory-mapped Host Controller Register Space 10-13h */
170
171 #define SBRN 0x60 /* Serial Bus Release Number 60h */
172
173 #define FLADJ 0x61 /* Frame Length Adjustment Register 61h */
174
175 #define PORTWAKECAP 0x62 /* Port wake capablilities register(OPIONAL) 61-62h */
176
177 //
178 // PCI Configuration Registers
179 //
180 #define EHCI_PCI_CLASSC 0x09
181 #define EHCI_PCI_MEMORY_BASE 0x10
182
183 //
184 // Memory Offset Registers
185 //
186 #define EHCI_MEMORY_CAPLENGTH 0x0
187 #define EHCI_MEMORY_CONFIGFLAG 0x40
188
189 //
190 // USB Base Class Code,Sub-Class Code and Programming Interface
191 //
192 #define PCI_CLASSC_PI_EHCI 0x20
193
194 #define SETUP_PACKET_ID 0x2D
195 #define INPUT_PACKET_ID 0x69
196 #define OUTPUT_PACKET_ID 0xE1
197 #define ERROR_PACKET_ID 0x55
198
199 #define bit(a) (1 << (a))
200
201 #define GET_0B_TO_31B(Addr) (((UINTN) Addr) & (0xffffffff))
202 #define GET_32B_TO_63B(Addr) ((UINTN)RShiftU64((UINTN) Addr, 32) & (0xffffffff))
203
204
205 //
206 // Ehci Data and Ctrl Structures
207 //
208 #pragma pack(1)
209
210 typedef struct {
211 UINT8 PI;
212 UINT8 SubClassCode;
213 UINT8 BaseCode;
214 } USB_CLASSC;
215
216 //
217 //32 Bytes Aligned
218 //
219 typedef struct {
220 UINT32 NextQtdTerminate : 1;
221 UINT32 Rsvd1 : 4;
222 UINT32 NextQtdPointer : 27;
223
224 UINT32 AltNextQtdTerminate : 1;
225 UINT32 Rsvd2 : 4;
226 UINT32 AltNextQtdPointer : 27;
227
228 UINT32 Status : 8;
229 UINT32 PidCode : 2;
230 UINT32 ErrorCount : 2;
231 UINT32 CurrentPage : 3;
232 UINT32 InterruptOnComplete : 1;
233 UINT32 TotalBytes : 15;
234 UINT32 DataToggle : 1;
235
236 UINT32 CurrentOffset : 12;
237 UINT32 BufferPointer0 : 20;
238
239 UINT32 Rsvd3 : 12;
240 UINT32 BufferPointer1 : 20;
241
242 UINT32 Rsvd4 : 12;
243 UINT32 BufferPointer2 : 20;
244
245 UINT32 Rsvd5 : 12;
246 UINT32 BufferPointer3 : 20;
247
248 UINT32 Rsvd6 : 12;
249 UINT32 BufferPointer4 : 20;
250
251 UINT32 PAD[5];
252 } EHCI_QTD_HW;
253
254 //
255 //32 Bytes Aligned
256 //
257 typedef struct {
258 UINT32 QhTerminate : 1;
259 UINT32 SelectType : 2;
260 UINT32 Rsvd1 : 2;
261 UINT32 QhHorizontalPointer : 27;
262
263 UINT32 DeviceAddr : 7;
264 UINT32 Inactive : 1;
265 UINT32 EndpointNum : 4;
266 UINT32 EndpointSpeed : 2;
267 UINT32 DataToggleControl : 1;
268 UINT32 HeadReclamationFlag : 1;
269 UINT32 MaxPacketLen : 11;
270 UINT32 ControlEndpointFlag : 1;
271 UINT32 NakCountReload : 4;
272
273 UINT32 InerruptScheduleMask : 8;
274 UINT32 SplitComletionMask : 8;
275 UINT32 HubAddr : 7;
276 UINT32 PortNum : 7;
277 UINT32 Multiplier : 2;
278
279 UINT32 Rsvd2 : 5;
280 UINT32 CurrentQtdPointer : 27;
281
282 UINT32 NextQtdTerminate : 1;
283 UINT32 Rsvd3 : 4;
284 UINT32 NextQtdPointer : 27;
285
286 UINT32 AltNextQtdTerminate : 1;
287 UINT32 NakCount : 4;
288 UINT32 AltNextQtdPointer : 27;
289
290 UINT32 Status : 8;
291 UINT32 PidCode : 2;
292 UINT32 ErrorCount : 2;
293 UINT32 CurrentPage : 3;
294 UINT32 InterruptOnComplete : 1;
295 UINT32 TotalBytes : 15;
296 UINT32 DataToggle : 1;
297
298 UINT32 CurrentOffset : 12;
299 UINT32 BufferPointer0 : 20;
300
301 UINT32 CompleteSplitMask : 8;
302 UINT32 Rsvd4 : 4;
303 UINT32 BufferPointer1 : 20;
304
305 UINT32 FrameTag : 5;
306 UINT32 SplitBytes : 7;
307 UINT32 BufferPointer2 : 20;
308
309 UINT32 Rsvd5 : 12;
310 UINT32 BufferPointer3 : 20;
311
312 UINT32 Rsvd6 : 12;
313 UINT32 BufferPointer4 : 20;
314
315 UINT32 Pad[5];
316 } EHCI_QH_HW;
317
318 typedef struct {
319 UINT32 LinkTerminate : 1;
320 UINT32 SelectType : 2;
321 UINT32 Rsvd : 2;
322 UINT32 LinkPointer : 27;
323 } FRAME_LIST_ENTRY;
324
325 #pragma pack()
326
327 typedef struct _EHCI_QTD_ENTITY EHCI_QTD_ENTITY;
328 typedef struct _EHCI_QH_ENTITY EHCI_QH_ENTITY;
329 typedef struct _EHCI_ASYNC_REQUEST EHCI_ASYNC_REQUEST;
330 //
331 //Aligan On 32 Bytes
332 //
333 struct _EHCI_QTD_ENTITY {
334 EHCI_QTD_HW Qtd;
335 UINT32 TotalBytes;
336 UINT32 StaticTotalBytes;
337 UINT32 StaticCurrentOffset;
338 EHCI_QTD_ENTITY *Prev;
339 EHCI_QTD_ENTITY *Next;
340 EHCI_QTD_ENTITY *AltNext;
341 EHCI_QH_ENTITY *SelfQh;
342 };
343 //
344 //Aligan On 32 Bytes
345 //
346 struct _EHCI_QH_ENTITY {
347 EHCI_QH_HW Qh;
348 EHCI_QH_ENTITY *Next;
349 EHCI_QH_ENTITY *Prev;
350 EHCI_QTD_ENTITY *FirstQtdPtr;
351 EHCI_QTD_ENTITY *LastQtdPtr;
352 EHCI_QTD_ENTITY *AltQtdPtr;
353 UINTN Interval;
354 UINT8 TransferType;
355 };
356
357 #define GET_QH_ENTITY_ADDR(a) ((EHCI_QH_ENTITY *) a)
358 #define GET_QTD_ENTITY_ADDR(a) ((EHCI_QTD_ENTITY *) a)
359
360
361 //
362 // Ehci Managment Structures
363 //
364 #define USB2_HC_DEV_FROM_THIS(a) CR (a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)
365
366 #define USB2_HC_DEV_SIGNATURE EFI_SIGNATURE_32 ('e', 'h', 'c', 'i')
367
368 struct _EHCI_ASYNC_REQUEST {
369 UINT8 TransferType;
370 EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunc;
371 VOID *Context;
372 EHCI_ASYNC_REQUEST *Prev;
373 EHCI_ASYNC_REQUEST *Next;
374 EHCI_QH_ENTITY *QhPtr;
375 };
376
377 typedef struct _MEMORY_MANAGE_HEADER {
378 UINT8 *BitArrayPtr;
379 UINTN BitArraySizeInBytes;
380 UINT8 *MemoryBlockPtr;
381 UINTN MemoryBlockSizeInBytes;
382 VOID *Mapping;
383 struct _MEMORY_MANAGE_HEADER *Next;
384 } MEMORY_MANAGE_HEADER;
385
386 typedef struct _USB2_HC_DEV {
387 UINTN Signature;
388 EFI_PCI_IO_PROTOCOL *PciIo;
389 EFI_USB2_HC_PROTOCOL Usb2Hc;
390 UINTN PeriodicFrameListLength;
391 VOID *PeriodicFrameListBuffer;
392 VOID *PeriodicFrameListMap;
393 VOID *AsyncList;
394 EHCI_ASYNC_REQUEST *AsyncRequestList;
395 EFI_EVENT AsyncRequestEvent;
396 EFI_UNICODE_STRING_TABLE *ControllerNameTable;
397 MEMORY_MANAGE_HEADER *MemoryHeader;
398 UINT8 Is64BitCapable;
399 UINT32 High32BitAddr;
400 EHCI_QH_ENTITY *NULLQH;
401 UINT32 UsbCapabilityLen;
402 UINT16 DeviceSpeed[16];
403 } USB2_HC_DEV;
404
405
406 //
407 // Prototypes
408 // Driver model protocol interface
409 //
410
411 EFI_STATUS
412 EFIAPI
413 EhciDriverBindingSupported (
414 IN EFI_DRIVER_BINDING_PROTOCOL *This,
415 IN EFI_HANDLE Controller,
416 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
417 );
418
419 EFI_STATUS
420 EFIAPI
421 EhciDriverBindingStart (
422 IN EFI_DRIVER_BINDING_PROTOCOL *This,
423 IN EFI_HANDLE Controller,
424 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
425 );
426
427 EFI_STATUS
428 EFIAPI
429 EhciDriverBindingStop (
430 IN EFI_DRIVER_BINDING_PROTOCOL *This,
431 IN EFI_HANDLE Controller,
432 IN UINTN NumberOfChildren,
433 IN EFI_HANDLE *ChildHandleBuffer
434 );
435
436 //
437 // Ehci protocol interface
438 //
439 EFI_STATUS
440 EFIAPI
441 EhciGetCapability (
442 IN EFI_USB2_HC_PROTOCOL *This,
443 OUT UINT8 *MaxSpeed,
444 OUT UINT8 *PortNumber,
445 OUT UINT8 *Is64BitCapable
446 );
447
448 EFI_STATUS
449 EFIAPI
450 EhciReset (
451 IN EFI_USB2_HC_PROTOCOL *This,
452 IN UINT16 Attributes
453 );
454
455 EFI_STATUS
456 EFIAPI
457 EhciGetState (
458 IN EFI_USB2_HC_PROTOCOL *This,
459 OUT EFI_USB_HC_STATE *State
460 );
461
462 EFI_STATUS
463 EFIAPI
464 EhciSetState (
465 IN EFI_USB2_HC_PROTOCOL *This,
466 IN EFI_USB_HC_STATE State
467 );
468
469 EFI_STATUS
470 EFIAPI
471 EhciControlTransfer (
472 IN EFI_USB2_HC_PROTOCOL *This,
473 IN UINT8 DeviceAddress,
474 IN UINT8 DeviceSpeed,
475 IN UINTN MaximumPacketLength,
476 IN EFI_USB_DEVICE_REQUEST *Request,
477 IN EFI_USB_DATA_DIRECTION TransferDirection,
478 IN OUT VOID *Data,
479 IN OUT UINTN *DataLength,
480 IN UINTN TimeOut,
481 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
482 OUT UINT32 *TransferResult
483 );
484
485 EFI_STATUS
486 EFIAPI
487 EhciBulkTransfer (
488 IN EFI_USB2_HC_PROTOCOL *This,
489 IN UINT8 DeviceAddress,
490 IN UINT8 EndPointAddress,
491 IN UINT8 DeviceSpeed,
492 IN UINTN MaximumPacketLength,
493 IN UINT8 DataBuffersNumber,
494 IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],
495 IN OUT UINTN *DataLength,
496 IN OUT UINT8 *DataToggle,
497 IN UINTN TimeOut,
498 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
499 OUT UINT32 *TransferResult
500 );
501
502 EFI_STATUS
503 EFIAPI
504 EhciAsyncInterruptTransfer (
505 IN EFI_USB2_HC_PROTOCOL * This,
506 IN UINT8 DeviceAddress,
507 IN UINT8 EndPointAddress,
508 IN UINT8 DeviceSpeed,
509 IN UINTN MaxiumPacketLength,
510 IN BOOLEAN IsNewTransfer,
511 IN OUT UINT8 *DataToggle,
512 IN UINTN PollingInterval,
513 IN UINTN DataLength,
514 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
515 IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,
516 IN VOID *Context OPTIONAL
517 );
518
519 EFI_STATUS
520 EFIAPI
521 EhciSyncInterruptTransfer (
522 IN EFI_USB2_HC_PROTOCOL *This,
523 IN UINT8 DeviceAddress,
524 IN UINT8 EndPointAddress,
525 IN UINT8 DeviceSpeed,
526 IN UINTN MaximumPacketLength,
527 IN OUT VOID *Data,
528 IN OUT UINTN *DataLength,
529 IN OUT UINT8 *DataToggle,
530 IN UINTN TimeOut,
531 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
532 OUT UINT32 *TransferResult
533 );
534
535 EFI_STATUS
536 EFIAPI
537 EhciIsochronousTransfer (
538 IN EFI_USB2_HC_PROTOCOL *This,
539 IN UINT8 DeviceAddress,
540 IN UINT8 EndPointAddress,
541 IN UINT8 DeviceSpeed,
542 IN UINTN MaximumPacketLength,
543 IN UINT8 DataBuffersNumber,
544 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
545 IN UINTN DataLength,
546 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
547 OUT UINT32 *TransferResult
548 );
549
550 EFI_STATUS
551 EFIAPI
552 EhciAsyncIsochronousTransfer (
553 IN EFI_USB2_HC_PROTOCOL *This,
554 IN UINT8 DeviceAddress,
555 IN UINT8 EndPointAddress,
556 IN UINT8 DeviceSpeed,
557 IN UINTN MaximumPacketLength,
558 IN UINT8 DataBuffersNumber,
559 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
560 IN UINTN DataLength,
561 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
562 IN EFI_ASYNC_USB_TRANSFER_CALLBACK IsochronousCallBack,
563 IN VOID *Context
564 );
565
566 EFI_STATUS
567 EFIAPI
568 EhciGetRootHubPortStatus (
569 IN EFI_USB2_HC_PROTOCOL *This,
570 IN UINT8 PortNumber,
571 OUT EFI_USB_PORT_STATUS *PortStatus
572 );
573
574 EFI_STATUS
575 EFIAPI
576 EhciSetRootHubPortFeature (
577 IN EFI_USB2_HC_PROTOCOL *This,
578 IN UINT8 PortNumber,
579 IN EFI_USB_PORT_FEATURE PortFeature
580 );
581
582 EFI_STATUS
583 EFIAPI
584 EhciClearRootHubPortFeature (
585 IN EFI_USB2_HC_PROTOCOL *This,
586 IN UINT8 PortNumber,
587 IN EFI_USB_PORT_FEATURE PortFeature
588 );
589
590 //
591 // EFI Component Name Functions
592 //
593 EFI_STATUS
594 EFIAPI
595 EhciComponentNameGetDriverName (
596 IN EFI_COMPONENT_NAME_PROTOCOL *This,
597 IN CHAR8 *Language,
598 OUT CHAR16 **DriverName
599 );
600
601 EFI_STATUS
602 EFIAPI
603 EhciComponentNameGetControllerName (
604 IN EFI_COMPONENT_NAME_PROTOCOL *This,
605 IN EFI_HANDLE ControllerHandle,
606 IN EFI_HANDLE ChildHandle, OPTIONAL
607 IN CHAR8 *Language,
608 OUT CHAR16 **ControllerName
609 );
610
611 //
612 // Internal Functions Declaration
613 //
614
615 //
616 // EhciMem Functions
617 //
618 EFI_STATUS
619 CreateMemoryBlock (
620 IN USB2_HC_DEV *HcDev,
621 OUT MEMORY_MANAGE_HEADER **MemoryHeader,
622 IN UINTN MemoryBlockSizeInPages
623 )
624 /*++
625
626 Routine Description:
627
628 Use PciIo->AllocateBuffer to allocate common buffer for the memory block,
629 and use PciIo->Map to map the common buffer for Bus Master Read/Write.
630
631 Arguments:
632
633 HcDev - USB2_HC_DEV
634 MemoryHeader - MEMORY_MANAGE_HEADER to output
635 MemoryBlockSizeInPages - MemoryBlockSizeInPages
636
637 Returns:
638
639 EFI_SUCCESS Success
640 EFI_OUT_OF_RESOURCES Fail for no resources
641 EFI_UNSUPPORTED Unsupported currently
642
643 --*/
644 ;
645
646 EFI_STATUS
647 FreeMemoryHeader (
648 IN USB2_HC_DEV *HcDev,
649 IN MEMORY_MANAGE_HEADER *MemoryHeader
650 )
651 /*++
652
653 Routine Description:
654
655 Free Memory Header
656
657 Arguments:
658
659 HcDev - USB2_HC_DEV
660 MemoryHeader - MemoryHeader to be freed
661
662 Returns:
663
664 EFI_SUCCESS Success
665 EFI_INVALID_PARAMETER Parameter is error
666
667 --*/
668 ;
669
670 VOID
671 InsertMemoryHeaderToList (
672 IN MEMORY_MANAGE_HEADER *MemoryHeader,
673 IN MEMORY_MANAGE_HEADER *NewMemoryHeader
674 )
675 /*++
676
677 Routine Description:
678
679 Insert Memory Header To List
680
681 Arguments:
682
683 MemoryHeader - MEMORY_MANAGE_HEADER
684 NewMemoryHeader - MEMORY_MANAGE_HEADER
685
686 Returns:
687
688 VOID
689
690 --*/
691 ;
692
693 EFI_STATUS
694 AllocMemInMemoryBlock (
695 IN MEMORY_MANAGE_HEADER *MemoryHeader,
696 OUT VOID **Pool,
697 IN UINTN NumberOfMemoryUnit
698 )
699 /*++
700
701 Routine Description:
702
703 Alloc Memory In MemoryBlock
704
705 Arguments:
706
707 MemoryHeader - MEMORY_MANAGE_HEADER
708 Pool - Place to store pointer to memory
709 NumberOfMemoryUnit - Number Of Memory Unit
710
711 Returns:
712
713 EFI_SUCCESS Success
714 EFI_NOT_FOUND Can't find the free memory
715
716 --*/
717 ;
718
719 BOOLEAN
720 IsMemoryBlockEmptied (
721 IN MEMORY_MANAGE_HEADER *MemoryHeaderPtr
722 )
723 /*++
724
725 Routine Description:
726
727 Is Memory Block Emptied
728
729 Arguments:
730
731 MemoryHeaderPtr - MEMORY_MANAGE_HEADER
732
733 Returns:
734
735 TRUE Empty
736 FALSE Not Empty
737
738 --*/
739 ;
740
741 VOID
742 DelinkMemoryBlock (
743 IN MEMORY_MANAGE_HEADER *FirstMemoryHeader,
744 IN MEMORY_MANAGE_HEADER *NeedFreeMemoryHeader
745 )
746 /*++
747
748 Routine Description:
749
750 Delink Memory Block
751
752 Arguments:
753
754 FirstMemoryHeader - MEMORY_MANAGE_HEADER
755 NeedFreeMemoryHeader - MEMORY_MANAGE_HEADER
756
757 Returns:
758
759 VOID
760
761 --*/
762 ;
763
764 EFI_STATUS
765 InitialMemoryManagement (
766 IN USB2_HC_DEV *HcDev
767 )
768 /*++
769
770 Routine Description:
771
772 Initialize Memory Management
773
774 Arguments:
775
776 HcDev - USB2_HC_DEV
777
778 Returns:
779
780 EFI_SUCCESS Success
781 EFI_DEVICE_ERROR Fail
782
783 --*/
784 ;
785
786 EFI_STATUS
787 DeinitialMemoryManagement (
788 IN USB2_HC_DEV *HcDev
789 )
790 /*++
791
792 Routine Description:
793
794 Deinitialize Memory Management
795
796 Arguments:
797
798 HcDev - USB2_HC_DEV
799
800 Returns:
801
802 EFI_SUCCESS Success
803 EFI_DEVICE_ERROR Fail
804
805 --*/
806 ;
807
808 EFI_STATUS
809 EhciAllocatePool (
810 IN USB2_HC_DEV *HcDev,
811 OUT UINT8 **Pool,
812 IN UINTN AllocSize
813 )
814 /*++
815
816 Routine Description:
817
818 Ehci Allocate Pool
819
820 Arguments:
821
822 HcDev - USB2_HC_DEV
823 Pool - Place to store pointer to the memory buffer
824 AllocSize - Alloc Size
825
826 Returns:
827
828 EFI_SUCCESS Success
829 EFI_DEVICE_ERROR Fail
830
831 --*/
832 ;
833
834 VOID
835 EhciFreePool (
836 IN USB2_HC_DEV *HcDev,
837 IN UINT8 *Pool,
838 IN UINTN AllocSize
839 )
840 /*++
841
842 Routine Description:
843
844 Uhci Free Pool
845
846 Arguments:
847
848 HcDev - USB_HC_DEV
849 Pool - Pool to free
850 AllocSize - Pool size
851
852 Returns:
853
854 VOID
855
856 --*/
857 ;
858
859 //
860 // EhciReg Functions
861 //
862 EFI_STATUS
863 ReadEhcCapabiltiyReg (
864 IN USB2_HC_DEV *HcDev,
865 IN UINT32 CapabiltiyRegAddr,
866 IN OUT UINT32 *Data
867 )
868 /*++
869
870 Routine Description:
871
872 Read Ehc Capabitlity register
873
874 Arguments:
875
876 HcDev - USB2_HC_DEV
877 CapabiltiyRegAddr - Ehc Capability register address
878 Data - A pointer to data read from register
879
880 Returns:
881
882 EFI_SUCCESS Success
883 EFI_DEVICE_ERROR Fail
884
885 --*/
886 ;
887
888 EFI_STATUS
889 ReadEhcOperationalReg (
890 IN USB2_HC_DEV *HcDev,
891 IN UINT32 OperationalRegAddr,
892 IN OUT UINT32 *Data
893 )
894 /*++
895
896 Routine Description:
897
898 Read Ehc Operation register
899
900 Arguments:
901
902 HcDev - USB2_HC_DEV
903 OperationalRegAddr - Ehc Operation register address
904 Data - A pointer to data read from register
905
906 Returns:
907
908 EFI_SUCCESS Success
909 EFI_DEVICE_ERROR Fail
910
911 --*/
912 ;
913
914 EFI_STATUS
915 WriteEhcOperationalReg (
916 IN USB2_HC_DEV *HcDev,
917 IN UINT32 OperationalRegAddr,
918 IN UINT32 Data
919 )
920 /*++
921
922 Routine Description:
923
924 Write Ehc Operation register
925
926 Arguments:
927
928 HcDev - USB2_HC_DEV
929 OperationalRegAddr - Ehc Operation register address
930 Data - 32bit write to register
931
932 Returns:
933
934 EFI_SUCCESS Success
935 EFI_DEVICE_ERROR Fail
936
937 --*/
938 ;
939
940 EFI_STATUS
941 SetEhcDoorbell (
942 IN USB2_HC_DEV *HcDev
943 )
944 /*++
945
946 Routine Description:
947
948 Set Ehc door bell bit
949
950 Arguments:
951
952 HcDev - USB2_HC_DEV
953
954 Returns:
955
956 EFI_SUCCESS Success
957 EFI_DEVICE_ERROR Fail
958
959 --*/
960 ;
961
962 EFI_STATUS
963 SetFrameListLen (
964 IN USB2_HC_DEV *HcDev,
965 IN UINTN Length
966 )
967 /*++
968
969 Routine Description:
970
971 Set the length of Frame List
972
973 Arguments:
974
975 HcDev - USB2_HC_DEV
976 Length - the required length of frame list
977
978 Returns:
979
980 EFI_SUCCESS Success
981 EFI_INVALID_PARAMETER Invalid parameter
982 EFI_DEVICE_ERROR Fail
983
984 --*/
985 ;
986
987 BOOLEAN
988 IsFrameListProgrammable (
989 IN USB2_HC_DEV *HcDev
990 )
991 /*++
992
993 Routine Description:
994
995 Whether frame list is programmable
996
997 Arguments:
998
999 HcDev - USB2_HC_DEV
1000
1001 Returns:
1002
1003 TRUE Programmable
1004 FALSE Unprogrammable
1005
1006 --*/
1007 ;
1008
1009 BOOLEAN
1010 IsPeriodicScheduleEnabled (
1011 IN USB2_HC_DEV *HcDev
1012 )
1013 /*++
1014
1015 Routine Description:
1016
1017 Whether periodic schedule is enabled
1018
1019 Arguments:
1020
1021 HcDev - USB2_HC_DEV
1022
1023 Returns:
1024
1025 TRUE Enabled
1026 FALSE Disabled
1027
1028 --*/
1029 ;
1030
1031 BOOLEAN
1032 IsAsyncScheduleEnabled (
1033 IN USB2_HC_DEV *HcDev
1034 )
1035 /*++
1036
1037 Routine Description:
1038
1039 Whether asynchronous schedule is enabled
1040
1041 Arguments:
1042
1043 HcDev - USB2_HC_DEV
1044
1045 Returns:
1046
1047 TRUE Enabled
1048 FALSE Disabled
1049
1050 --*/
1051 ;
1052
1053 BOOLEAN
1054 IsEhcPortEnabled (
1055 IN USB2_HC_DEV *HcDev,
1056 IN UINT8 PortNum
1057 )
1058 /*++
1059
1060 Routine Description:
1061
1062 Whether port is enabled
1063
1064 Arguments:
1065
1066 HcDev - USB2_HC_DEV
1067
1068 Returns:
1069
1070 TRUE Enabled
1071 FALSE Disabled
1072
1073 --*/
1074 ;
1075
1076 BOOLEAN
1077 IsEhcReseted (
1078 IN USB2_HC_DEV *HcDev
1079 )
1080 /*++
1081
1082 Routine Description:
1083
1084 Whether Ehc is halted
1085
1086 Arguments:
1087
1088 HcDev - USB2_HC_DEV
1089
1090 Returns:
1091
1092 TRUE Reseted
1093 FALSE Unreseted
1094
1095 --*/
1096 ;
1097
1098 BOOLEAN
1099 IsEhcHalted (
1100 IN USB2_HC_DEV *HcDev
1101 )
1102 /*++
1103
1104 Routine Description:
1105
1106 Whether Ehc is halted
1107
1108 Arguments:
1109
1110 HcDev - USB2_HC_DEV
1111
1112 Returns:
1113
1114 TRUE Halted
1115 FALSE Not halted
1116
1117 --*/
1118 ;
1119
1120 BOOLEAN
1121 IsEhcSysError (
1122 IN USB2_HC_DEV *HcDev
1123 )
1124 /*++
1125
1126 Routine Description:
1127
1128 Whether Ehc is system error
1129
1130 Arguments:
1131
1132 HcDev - USB2_HC_DEV
1133
1134 Returns:
1135
1136 TRUE System error
1137 FALSE No system error
1138
1139 --*/
1140 ;
1141
1142 BOOLEAN
1143 IsHighSpeedDevice (
1144 IN EFI_USB2_HC_PROTOCOL *This,
1145 IN UINT8 PortNum
1146 )
1147 /*++
1148
1149 Routine Description:
1150
1151 Whether high speed device attached
1152
1153 Arguments:
1154
1155 HcDev - USB2_HC_DEV
1156
1157 Returns:
1158
1159 TRUE High speed
1160 FALSE Full speed
1161
1162 --*/
1163 ;
1164
1165 EFI_STATUS
1166 WaitForEhcReset (
1167 IN USB2_HC_DEV *HcDev,
1168 IN UINTN Timeout
1169 )
1170 /*++
1171
1172 Routine Description:
1173
1174 wait for Ehc reset or timeout
1175
1176 Arguments:
1177
1178 HcDev - USB2_HC_DEV
1179 Timeout - timeout threshold
1180
1181 Returns:
1182
1183 EFI_SUCCESS Success
1184 EFI_TIMEOUT Timeout
1185
1186 --*/
1187 ;
1188
1189 EFI_STATUS
1190 WaitForEhcHalt (
1191 IN USB2_HC_DEV *HcDev,
1192 IN UINTN Timeout
1193 )
1194 /*++
1195
1196 Routine Description:
1197
1198 wait for Ehc halt or timeout
1199
1200 Arguments:
1201
1202 HcDev - USB2_HC_DEV
1203 Timeout - timeout threshold
1204
1205 Returns:
1206
1207 EFI_SUCCESS Success
1208 EFI_TIMEOUT Timeout
1209
1210 --*/
1211 ;
1212
1213 EFI_STATUS
1214 WaitForEhcNotHalt (
1215 IN USB2_HC_DEV *HcDev,
1216 IN UINTN Timeout
1217 )
1218 /*++
1219
1220 Routine Description:
1221
1222 wait for Ehc not halt or timeout
1223
1224 Arguments:
1225
1226 HcDev - USB2_HC_DEV
1227 Timeout - timeout threshold
1228
1229 Returns:
1230
1231 EFI_SUCCESS Success
1232 EFI_TIMEOUT Timeout
1233
1234 --*/
1235 ;
1236
1237 EFI_STATUS
1238 WaitForEhcDoorbell (
1239 IN USB2_HC_DEV *HcDev,
1240 IN UINTN Timeout
1241 )
1242 /*++
1243
1244 Routine Description:
1245
1246 Wait for periodic schedule disable or timeout
1247
1248 Arguments:
1249
1250 HcDev - USB2_HC_DEV
1251 Timeout - timeout threshold
1252
1253 Returns:
1254
1255 EFI_SUCCESS Success
1256 EFI_TIMEOUT Timeout
1257
1258 --*/
1259 ;
1260
1261 EFI_STATUS
1262 WaitForAsyncScheduleEnable (
1263 IN USB2_HC_DEV *HcDev,
1264 IN UINTN Timeout
1265 )
1266 /*++
1267
1268 Routine Description:
1269
1270 Wait for Ehc asynchronous schedule enable or timeout
1271
1272 Arguments:
1273
1274 HcDev - USB2_HC_DEV
1275 Timeout - timeout threshold
1276
1277 Returns:
1278
1279 EFI_SUCCESS Success
1280 EFI_TIMEOUT Timeout
1281
1282 --*/
1283 ;
1284
1285 EFI_STATUS
1286 WaitForAsyncScheduleDisable (
1287 IN USB2_HC_DEV *HcDev,
1288 IN UINTN Timeout
1289 )
1290 /*++
1291
1292 Routine Description:
1293
1294 Wait for Ehc asynchronous schedule disable or timeout
1295
1296 Arguments:
1297
1298 HcDev - USB2_HC_DEV
1299 Timeout - timeout threshold
1300
1301 Returns:
1302
1303 EFI_SUCCESS Success
1304 EFI_TIMEOUT Timeout
1305
1306 --*/
1307 ;
1308
1309 EFI_STATUS
1310 WaitForPeriodicScheduleEnable (
1311 IN USB2_HC_DEV *HcDev,
1312 IN UINTN Timeout
1313 )
1314 /*++
1315
1316 Routine Description:
1317
1318 Wait for Ehc periodic schedule enable or timeout
1319
1320 Arguments:
1321
1322 HcDev - USB2_HC_DEV
1323 Timeout - timeout threshold
1324
1325 Returns:
1326
1327 EFI_SUCCESS Success
1328 EFI_TIMEOUT Timeout
1329
1330 --*/
1331 ;
1332
1333 EFI_STATUS
1334 WaitForPeriodicScheduleDisable (
1335 IN USB2_HC_DEV *HcDev,
1336 IN UINTN Timeout
1337 )
1338 /*++
1339
1340 Routine Description:
1341
1342 Wait for periodic schedule disable or timeout
1343
1344 Arguments:
1345
1346 HcDev - USB2_HC_DEV
1347 Timeout - timeout threshold
1348
1349 Returns:
1350
1351 EFI_SUCCESS Success
1352 EFI_TIMEOUT Timeout
1353
1354 --*/
1355 ;
1356
1357 EFI_STATUS
1358 GetCapabilityLen (
1359 IN USB2_HC_DEV *HcDev
1360 )
1361 /*++
1362
1363 Routine Description:
1364
1365 Get the length of capability register
1366
1367 Arguments:
1368
1369 HcDev - USB2_HC_DEV
1370
1371 Returns:
1372
1373 EFI_SUCCESS Success
1374 EFI_DEVICE_ERROR Fail
1375
1376 --*/
1377 ;
1378
1379 EFI_STATUS
1380 SetFrameListBaseAddr (
1381 IN USB2_HC_DEV *HcDev,
1382 IN UINT32 FrameBuffer
1383 )
1384 /*++
1385
1386 Routine Description:
1387
1388 Set base address of frame list first entry
1389
1390 Arguments:
1391
1392 HcDev - USB2_HC_DEV
1393 FrameBuffer - base address of first entry of frame list
1394
1395 Returns:
1396
1397 EFI_SUCCESS Success
1398 EFI_DEVICE_ERROR Fail
1399
1400 --*/
1401 ;
1402
1403 EFI_STATUS
1404 SetAsyncListAddr (
1405 IN USB2_HC_DEV *HcDev,
1406 IN EHCI_QH_ENTITY *QhPtr
1407 )
1408 /*++
1409
1410 Routine Description:
1411
1412 Set address of first Async schedule Qh
1413
1414 Arguments:
1415
1416 HcDev - USB2_HC_DEV
1417 QhPtr - A pointer to first Qh in the Async schedule
1418
1419 Returns:
1420
1421 EFI_SUCCESS Success
1422 EFI_DEVICE_ERROR Fail
1423
1424 --*/
1425 ;
1426
1427 EFI_STATUS
1428 SetCtrlDataStructSeg (
1429 IN USB2_HC_DEV *HcDev
1430 )
1431 /*++
1432
1433 Routine Description:
1434
1435 Set address of first Async schedule Qh
1436
1437 Arguments:
1438
1439 HcDev - USB2_HC_DEV
1440 QhPtr - A pointer to first Qh in the Async schedule
1441
1442 Returns:
1443
1444 EFI_SUCCESS Success
1445 EFI_DEVICE_ERROR Fail
1446
1447 --*/
1448 ;
1449
1450 EFI_STATUS
1451 SetPortRoutingEhc (
1452 IN USB2_HC_DEV *HcDev
1453 )
1454 /*++
1455
1456 Routine Description:
1457
1458 Set Ehc port routing bit
1459
1460 Arguments:
1461
1462 HcDev - USB2_HC_DEV
1463
1464 Returns:
1465
1466 EFI_SUCCESS Success
1467 EFI_DEVICE_ERROR Fail
1468
1469 --*/
1470 ;
1471
1472 EFI_STATUS
1473 EnablePeriodicSchedule (
1474 IN USB2_HC_DEV *HcDev
1475 )
1476 /*++
1477
1478 Routine Description:
1479
1480 Enable periodic schedule
1481
1482 Arguments:
1483
1484 HcDev - USB2_HC_DEV
1485
1486 Returns:
1487
1488 EFI_SUCCESS Success
1489 EFI_DEVICE_ERROR Fail
1490
1491 --*/
1492 ;
1493
1494 EFI_STATUS
1495 DisablePeriodicSchedule (
1496 IN USB2_HC_DEV *HcDev
1497 )
1498 /*++
1499
1500 Routine Description:
1501
1502 Disable periodic schedule
1503
1504 Arguments:
1505
1506 HcDev - USB2_HC_DEV
1507
1508 Returns:
1509
1510 EFI_SUCCESS Success
1511 EFI_DEVICE_ERROR Fail
1512
1513 --*/
1514 ;
1515
1516 EFI_STATUS
1517 EnableAsynchronousSchedule (
1518 IN USB2_HC_DEV *HcDev
1519 )
1520 /*++
1521
1522 Routine Description:
1523
1524 Enable asynchrounous schedule
1525
1526 Arguments:
1527
1528 HcDev - USB2_HC_DEV
1529
1530 Returns:
1531
1532 EFI_SUCCESS Success
1533 EFI_DEVICE_ERROR Fail
1534
1535 --*/
1536 ;
1537
1538 EFI_STATUS
1539 DisableAsynchronousSchedule (
1540 IN USB2_HC_DEV *HcDev
1541 )
1542 /*++
1543
1544 Routine Description:
1545
1546 Disable asynchrounous schedule
1547
1548 Arguments:
1549
1550 HcDev - USB2_HC_DEV
1551
1552 Returns:
1553
1554 EFI_SUCCESS Success
1555 EFI_DEVICE_ERROR Fail
1556
1557 --*/
1558 ;
1559
1560 EFI_STATUS
1561 StartScheduleExecution (
1562 IN USB2_HC_DEV *HcDev
1563 )
1564 /*++
1565
1566 Routine Description:
1567
1568 Start Ehc schedule execution
1569
1570 Arguments:
1571
1572 HcDev - USB2_HC_DEV
1573
1574 Returns:
1575
1576 EFI_SUCCESS Success
1577 EFI_DEVICE_ERROR Fail
1578
1579 --*/
1580 ;
1581
1582 EFI_STATUS
1583 ResetEhc (
1584 IN USB2_HC_DEV *HcDev
1585 )
1586 /*++
1587
1588 Routine Description:
1589
1590 Reset Ehc
1591
1592 Arguments:
1593
1594 HcDev - USB2_HC_DEV
1595
1596 Returns:
1597
1598 EFI_SUCCESS Success
1599 EFI_DEVICE_ERROR Fail
1600
1601 --*/
1602 ;
1603
1604 EFI_STATUS
1605 ClearEhcAllStatus (
1606 IN USB2_HC_DEV *HcDev
1607 )
1608 /*++
1609
1610 Routine Description:
1611
1612 Clear Ehc all status bits
1613
1614 Arguments:
1615
1616 HcDev - USB2_HC_DEV
1617
1618 Returns:
1619
1620 EFI_SUCCESS Success
1621 EFI_DEVICE_ERROR Fail
1622
1623 --*/
1624 ;
1625
1626 //
1627 // EhciSched Functions
1628 //
1629 EFI_STATUS
1630 InitialPeriodicFrameList (
1631 IN USB2_HC_DEV *HcDev,
1632 IN UINTN Length
1633 )
1634 /*++
1635
1636 Routine Description:
1637
1638 Initialize Periodic Schedule Frame List
1639
1640 Arguments:
1641
1642 HcDev - USB2_HC_DEV
1643 Length - Frame List Length
1644
1645 Returns:
1646
1647 EFI_SUCCESS Success
1648 EFI_DEVICE_ERROR Fail
1649
1650 --*/
1651 ;
1652
1653 VOID
1654 DeinitialPeriodicFrameList (
1655 IN USB2_HC_DEV *HcDev
1656 )
1657 /*++
1658
1659 Routine Description:
1660
1661 Deinitialize Periodic Schedule Frame List
1662
1663 Arguments:
1664
1665 HcDev - USB2_HC_DEV
1666
1667 Returns:
1668
1669 VOID
1670
1671 --*/
1672 ;
1673
1674 EFI_STATUS
1675 CreatePollingTimer (
1676 IN USB2_HC_DEV *HcDev,
1677 IN EFI_EVENT_NOTIFY NotifyFunction
1678 )
1679 /*++
1680
1681 Routine Description:
1682
1683 Create Async Request Polling Timer
1684
1685 Arguments:
1686
1687 HcDev - USB2_HC_DEV
1688 NotifyFunction - Timer Notify Function
1689
1690 Returns:
1691
1692 EFI_SUCCESS Success
1693 EFI_DEVICE_ERROR Fail
1694
1695 --*/
1696 ;
1697
1698 EFI_STATUS
1699 DestoryPollingTimer (
1700 IN USB2_HC_DEV *HcDev
1701 )
1702 /*++
1703
1704 Routine Description:
1705
1706 Destory Async Request Polling Timer
1707
1708 Arguments:
1709
1710 HcDev - USB2_HC_DEV
1711
1712 Returns:
1713
1714 EFI_SUCCESS Success
1715 EFI_DEVICE_ERROR Fail
1716
1717 --*/
1718 ;
1719
1720 EFI_STATUS
1721 StartPollingTimer (
1722 IN USB2_HC_DEV *HcDev
1723 )
1724 /*++
1725
1726 Routine Description:
1727
1728 Start Async Request Polling Timer
1729
1730 Arguments:
1731
1732 HcDev - USB2_HC_DEV
1733
1734 Returns:
1735
1736 EFI_SUCCESS Success
1737 EFI_DEVICE_ERROR Fail
1738
1739 --*/
1740 ;
1741
1742 EFI_STATUS
1743 StopPollingTimer (
1744 IN USB2_HC_DEV *HcDev
1745 )
1746 /*++
1747
1748 Routine Description:
1749
1750 Stop Async Request Polling Timer
1751
1752 Arguments:
1753
1754 HcDev - USB2_HC_DEV
1755
1756 Returns:
1757
1758 EFI_SUCCESS Success
1759 EFI_DEVICE_ERROR Fail
1760
1761 --*/
1762 ;
1763
1764 EFI_STATUS
1765 CreateQh (
1766 IN USB2_HC_DEV *HcDev,
1767 IN UINT8 DeviceAddr,
1768 IN UINT8 Endpoint,
1769 IN UINT8 DeviceSpeed,
1770 IN UINTN MaxPacketLen,
1771 OUT EHCI_QH_ENTITY **QhPtrPtr
1772 )
1773 /*++
1774
1775 Routine Description:
1776
1777 Create Qh Structure and Pre-Initialize
1778
1779 Arguments:
1780
1781 HcDev - USB2_HC_DEV
1782 DeviceAddr - Address of Device
1783 Endpoint - Endpoint Number
1784 DeviceSpeed - Device Speed
1785 MaxPacketLen - Max Length of one Packet
1786 QhPtrPtr - A pointer of pointer to Qh for return
1787
1788 Returns:
1789
1790 EFI_SUCCESS Success
1791 EFI_DEVICE_ERROR Fail
1792
1793 --*/
1794 ;
1795
1796 EFI_STATUS
1797 CreateControlQh (
1798 IN USB2_HC_DEV *HcDev,
1799 IN UINT8 DeviceAddr,
1800 IN UINT8 DeviceSpeed,
1801 IN UINTN MaxPacketLen,
1802 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1803 OUT EHCI_QH_ENTITY **QhPtrPtr
1804 )
1805 /*++
1806
1807 Routine Description:
1808
1809 Create Qh for Control Transfer
1810
1811 Arguments:
1812
1813 HcDev - USB2_HC_DEV
1814 DeviceAddr - Address of Device
1815 DeviceSpeed - Device Speed
1816 MaxPacketLen - Max Length of one Packet
1817 Translator - Translator Transaction for SplitX
1818 QhPtrPtr - A pointer of pointer to Qh for return
1819
1820 Returns:
1821
1822 EFI_SUCCESS Success
1823 EFI_DEVICE_ERROR Fail
1824
1825 --*/
1826 ;
1827
1828 EFI_STATUS
1829 CreateBulkQh (
1830 IN USB2_HC_DEV *HcDev,
1831 IN UINT8 DeviceAddr,
1832 IN UINT8 EndPointAddr,
1833 IN UINT8 DeviceSpeed,
1834 IN UINT8 DataToggle,
1835 IN UINTN MaxPacketLen,
1836 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1837 OUT EHCI_QH_ENTITY **QhPtrPtr
1838 )
1839 /*++
1840
1841 Routine Description:
1842
1843 Create Qh for Bulk Transfer
1844
1845 Arguments:
1846
1847 HcDev - USB2_HC_DEV
1848 DeviceAddr - Address of Device
1849 EndPointAddr - Address of Endpoint
1850 DeviceSpeed - Device Speed
1851 MaxPacketLen - Max Length of one Packet
1852 Translator - Translator Transaction for SplitX
1853 QhPtrPtr - A pointer of pointer to Qh for return
1854
1855 Returns:
1856
1857 EFI_SUCCESS Success
1858 EFI_DEVICE_ERROR Fail
1859
1860 --*/
1861 ;
1862
1863 EFI_STATUS
1864 CreateInterruptQh (
1865 IN USB2_HC_DEV *HcDev,
1866 IN UINT8 DeviceAddr,
1867 IN UINT8 EndPointAddr,
1868 IN UINT8 DeviceSpeed,
1869 IN UINT8 DataToggle,
1870 IN UINTN MaxPacketLen,
1871 IN UINTN Interval,
1872 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1873 OUT EHCI_QH_ENTITY **QhPtrPtr
1874 )
1875 /*++
1876
1877 Routine Description:
1878
1879 Create Qh for Control Transfer
1880
1881 Arguments:
1882
1883 HcDev - USB2_HC_DEV
1884 DeviceAddr - Address of Device
1885 EndPointAddr - Address of Endpoint
1886 DeviceSpeed - Device Speed
1887 MaxPacketLen - Max Length of one Packet
1888 Interval - value of interval
1889 Translator - Translator Transaction for SplitX
1890 QhPtrPtr - A pointer of pointer to Qh for return
1891
1892 Returns:
1893
1894 EFI_SUCCESS Success
1895 EFI_DEVICE_ERROR Fail
1896
1897 --*/
1898 ;
1899
1900 VOID
1901 DestoryQh (
1902 IN USB2_HC_DEV *HcDev,
1903 IN EHCI_QH_ENTITY *QhPtr
1904 )
1905 /*++
1906
1907 Routine Description:
1908
1909 Destory Qh Structure
1910
1911 Arguments:
1912
1913 HcDev - USB2_HC_DEV
1914 QhPtr - A pointer to Qh
1915
1916 Returns:
1917
1918 VOID
1919
1920 --*/
1921 ;
1922
1923 EFI_STATUS
1924 CreateQtd (
1925 IN USB2_HC_DEV *HcDev,
1926 IN UINT8 *DataPtr,
1927 IN UINTN DataLen,
1928 IN UINT8 PktId,
1929 IN UINT8 Toggle,
1930 IN UINT8 QtdStatus,
1931 OUT EHCI_QTD_ENTITY **QtdPtrPtr
1932 )
1933 /*++
1934
1935 Routine Description:
1936
1937 Create Qtd Structure and Pre-Initialize it
1938
1939 Arguments:
1940
1941 HcDev - USB2_HC_DEV
1942 DataPtr - A pointer to user data buffer to transfer
1943 DataLen - Length of user data to transfer
1944 PktId - Packet Identification of this Qtd
1945 Toggle - Data Toggle of this Qtd
1946 QtdStatus - Default value of status of this Qtd
1947 QtdPtrPtr - A pointer of pointer to Qtd for return
1948
1949 Returns:
1950
1951 EFI_SUCCESS Success
1952 EFI_OUT_OF_RESOURCES Cannot allocate resources
1953
1954 --*/
1955 ;
1956
1957 EFI_STATUS
1958 CreateSetupQtd (
1959 IN USB2_HC_DEV *HcDev,
1960 IN UINT8 *DevReqPtr,
1961 OUT EHCI_QTD_ENTITY **QtdPtrPtr
1962 )
1963 /*++
1964
1965 Routine Description:
1966
1967 Create Qtd Structure for Setup
1968
1969 Arguments:
1970
1971 HcDev - USB2_HC_DEV
1972 DevReqPtr - A pointer to Device Request Data
1973 QtdPtrPtr - A pointer of pointer to Qtd for return
1974
1975 Returns:
1976
1977 EFI_SUCCESS Success
1978 EFI_OUT_OF_RESOURCES Cannot allocate resources
1979
1980 --*/
1981 ;
1982
1983 EFI_STATUS
1984 CreateDataQtd (
1985 IN USB2_HC_DEV *HcDev,
1986 IN UINT8 *DataPtr,
1987 IN UINTN DataLen,
1988 IN UINT8 PktId,
1989 IN UINT8 Toggle,
1990 OUT EHCI_QTD_ENTITY **QtdPtrPtr
1991 )
1992 /*++
1993
1994 Routine Description:
1995
1996 Create Qtd Structure for data
1997
1998 Arguments:
1999
2000 HcDev - USB2_HC_DEV
2001 DataPtr - A pointer to user data buffer to transfer
2002 DataLen - Length of user data to transfer
2003 PktId - Packet Identification of this Qtd
2004 Toggle - Data Toggle of this Qtd
2005 QtdPtrPtr - A pointer of pointer to Qtd for return
2006
2007 Returns:
2008
2009 EFI_SUCCESS Success
2010 EFI_OUT_OF_RESOURCES Cannot allocate resources
2011
2012 --*/
2013 ;
2014
2015 EFI_STATUS
2016 CreateStatusQtd (
2017 IN USB2_HC_DEV *HcDev,
2018 IN UINT8 PktId,
2019 OUT EHCI_QTD_ENTITY **QtdPtrPtr
2020 )
2021 /*++
2022
2023 Routine Description:
2024
2025 Create Qtd Structure for status
2026
2027 Arguments:
2028
2029 HcDev - USB2_HC_DEV
2030 PktId - Packet Identification of this Qtd
2031 QtdPtrPtr - A pointer of pointer to Qtd for return
2032
2033 Returns:
2034
2035 EFI_SUCCESS Success
2036 EFI_OUT_OF_RESOURCES Cannot allocate resources
2037
2038 --*/
2039 ;
2040
2041 EFI_STATUS
2042 CreateAltQtd (
2043 IN USB2_HC_DEV *HcDev,
2044 IN UINT8 PktId,
2045 OUT EHCI_QTD_ENTITY **QtdPtrPtr
2046 )
2047 /*++
2048
2049 Routine Description:
2050
2051 Create Qtd Structure for Alternative
2052
2053 Arguments:
2054
2055 HcDev - USB2_HC_DEV
2056 PktId - Packet Identification of this Qtd
2057 QtdPtrPtr - A pointer of pointer to Qtd for return
2058
2059 Returns:
2060
2061 EFI_SUCCESS Success
2062 EFI_OUT_OF_RESOURCES Cannot allocate resources
2063
2064 --*/
2065 ;
2066
2067 EFI_STATUS
2068 CreateControlQtds (
2069 IN USB2_HC_DEV *HcDev,
2070 IN UINT8 DataPktId,
2071 IN UINT8 *RequestCursor,
2072 IN UINT8 *DataCursor,
2073 IN UINTN DataLen,
2074 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
2075 OUT EHCI_QTD_ENTITY **ControlQtdsHead
2076 )
2077 /*++
2078
2079 Routine Description:
2080
2081 Create Qtds list for Control Transfer
2082
2083 Arguments:
2084
2085 HcDev - USB2_HC_DEV
2086 DataPktId - Packet Identification of Data Qtds
2087 RequestCursor - A pointer to request structure buffer to transfer
2088 DataCursor - A pointer to user data buffer to transfer
2089 DataLen - Length of user data to transfer
2090 ControlQtdsHead - A pointer of pointer to first Qtd for control tranfer for return
2091
2092 Returns:
2093
2094 EFI_SUCCESS Success
2095 EFI_DEVICE_ERROR Fail
2096
2097 --*/
2098 ;
2099
2100 EFI_STATUS
2101 CreateBulkOrInterruptQtds (
2102 IN USB2_HC_DEV *HcDev,
2103 IN UINT8 PktId,
2104 IN UINT8 *DataCursor,
2105 IN UINTN DataLen,
2106 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
2107 OUT EHCI_QTD_ENTITY **QtdsHead
2108 )
2109 /*++
2110
2111 Routine Description:
2112
2113 Create Qtds list for Bulk or Interrupt Transfer
2114
2115 Arguments:
2116
2117 HcDev - USB2_HC_DEV
2118 PktId - Packet Identification of Qtds
2119 DataCursor - A pointer to user data buffer to transfer
2120 DataLen - Length of user data to transfer
2121 DataToggle - Data Toggle to start
2122 Translator - Translator Transaction for SplitX
2123 QtdsHead - A pointer of pointer to first Qtd for control tranfer for return
2124
2125 Returns:
2126
2127 EFI_SUCCESS Success
2128 EFI_DEVICE_ERROR Fail
2129
2130 --*/
2131 ;
2132
2133 VOID
2134 DestoryQtds (
2135 IN USB2_HC_DEV *HcDev,
2136 IN EHCI_QTD_ENTITY *FirstQtdPtr
2137 )
2138 /*++
2139
2140 Routine Description:
2141
2142 Destory all Qtds in the list
2143
2144 Arguments:
2145
2146 HcDev - USB2_HC_DEV
2147 FirstQtdPtr - A pointer to first Qtd in the list
2148
2149 Returns:
2150
2151 VOID
2152
2153 --*/
2154 ;
2155
2156 VOID
2157 LinkQtdToQtd (
2158 IN EHCI_QTD_ENTITY *PreQtdPtr,
2159 IN EHCI_QTD_ENTITY *QtdPtr
2160 )
2161 /*++
2162
2163 Routine Description:
2164
2165 Link Qtds together
2166
2167 Arguments:
2168
2169 PreQtdPtr - A pointer to pre Qtd
2170 QtdPtr - A pointer to next Qtd
2171
2172 Returns:
2173
2174 VOID
2175
2176 --*/
2177 ;
2178
2179 VOID
2180 LinkQtdsToAltQtd (
2181 IN EHCI_QTD_ENTITY *FirstQtdPtr,
2182 IN EHCI_QTD_ENTITY *AltQtdPtr
2183 )
2184 /*++
2185
2186 Routine Description:
2187
2188 Link AlterQtds together
2189
2190 Arguments:
2191
2192 FirstQtdPtr - A pointer to first Qtd in the list
2193 AltQtdPtr - A pointer to alternative Qtd
2194
2195 Returns:
2196 VOID
2197
2198 --*/
2199 ;
2200
2201 VOID
2202 LinkQtdToQh (
2203 IN EHCI_QH_ENTITY *QhPtr,
2204 IN EHCI_QTD_ENTITY *QtdEntryPtr
2205 )
2206 /*++
2207
2208 Routine Description:
2209
2210 Link Qtds list to Qh
2211
2212 Arguments:
2213
2214 QhPtr - A pointer to Qh
2215 QtdPtr - A pointer to first Qtd in the list
2216
2217 Returns:
2218
2219 VOID
2220
2221 --*/
2222 ;
2223
2224 EFI_STATUS
2225 LinkQhToAsyncList (
2226 IN USB2_HC_DEV *HcDev,
2227 IN EHCI_QH_ENTITY *QhPtr
2228 )
2229 /*++
2230
2231 Routine Description:
2232
2233 Link Qh to Async Schedule List
2234
2235 Arguments:
2236
2237 HcDev - USB2_HC_DEV
2238 QhPtr - A pointer to Qh
2239
2240 Returns:
2241
2242 EFI_SUCCESS Success
2243 EFI_DEVICE_ERROR Fail
2244
2245 --*/
2246 ;
2247
2248 EFI_STATUS
2249 UnlinkQhFromAsyncList (
2250 IN USB2_HC_DEV *HcDev,
2251 IN EHCI_QH_ENTITY *QhPtr
2252 )
2253 /*++
2254
2255 Routine Description:
2256
2257 Unlink Qh from Async Schedule List
2258
2259 Arguments:
2260
2261 HcDev - USB2_HC_DEV
2262 QhPtr - A pointer to Qh
2263
2264 Returns:
2265
2266 EFI_SUCCESS Success
2267 EFI_DEVICE_ERROR Fail
2268
2269 --*/
2270 ;
2271
2272 VOID
2273 LinkQhToPeriodicList (
2274 IN USB2_HC_DEV *HcDev,
2275 IN EHCI_QH_ENTITY *QhPtr
2276 )
2277 /*++
2278
2279 Routine Description:
2280
2281 Link Qh to Periodic Schedule List
2282
2283 Arguments:
2284
2285 HcDev - USB2_HC_DEV
2286 QhPtr - A pointer to Qh
2287
2288 Returns:
2289
2290 VOID
2291
2292 --*/
2293 ;
2294
2295 VOID
2296 UnlinkQhFromPeriodicList (
2297 IN USB2_HC_DEV *HcDev,
2298 IN EHCI_QH_ENTITY *QhPtr,
2299 IN UINTN Interval
2300 )
2301 /*++
2302
2303 Routine Description:
2304
2305 Unlink Qh from Periodic Schedule List
2306
2307 Arguments:
2308
2309 HcDev - USB2_HC_DEV
2310 QhPtr - A pointer to Qh
2311 Interval - Interval of this periodic transfer
2312
2313 Returns:
2314
2315 VOID
2316
2317 --*/
2318 ;
2319
2320 VOID
2321 LinkToAsyncReqeust (
2322 IN USB2_HC_DEV *HcDev,
2323 IN EHCI_ASYNC_REQUEST *AsyncRequestPtr
2324 )
2325 /*++
2326
2327 Routine Description:
2328
2329 Llink AsyncRequest Entry to Async Request List
2330
2331 Arguments:
2332
2333 HcDev - USB2_HC_DEV
2334 AsyncRequestPtr - A pointer to Async Request Entry
2335
2336 Returns:
2337
2338 VOID
2339
2340 --*/
2341 ;
2342
2343 VOID
2344 UnlinkFromAsyncReqeust (
2345 IN USB2_HC_DEV *HcDev,
2346 IN EHCI_ASYNC_REQUEST *AsyncRequestPtr
2347 )
2348 /*++
2349
2350 Routine Description:
2351
2352 Unlink AsyncRequest Entry from Async Request List
2353
2354 Arguments:
2355
2356 HcDev - USB2_HC_DEV
2357 AsyncRequestPtr - A pointer to Async Request Entry
2358
2359 Returns:
2360
2361 VOID
2362
2363 --*/
2364 ;
2365
2366 UINTN
2367 GetNumberOfQtd (
2368 IN EHCI_QTD_ENTITY *FirstQtdPtr
2369 )
2370 /*++
2371
2372 Routine Description:
2373
2374 Number of Qtds in the list
2375
2376 Arguments:
2377
2378 FirstQtdPtr - A pointer to first Qtd in the list
2379
2380 Returns:
2381
2382 Number of Qtds in the list
2383
2384 --*/
2385 ;
2386
2387
2388
2389 UINTN
2390 GetCapacityOfQtd (
2391 IN UINT8 *BufferCursor
2392 )
2393 /*++
2394
2395 Routine Description:
2396
2397 Get Capacity of Qtd
2398
2399 Arguments:
2400
2401 BufferCursor - BufferCursor of the Qtd
2402
2403 Returns:
2404
2405 Capacity of Qtd
2406
2407 --*/
2408 ;
2409
2410 UINTN
2411 GetApproxiOfInterval (
2412 IN UINTN Interval
2413 )
2414 /*++
2415
2416 Routine Description:
2417
2418 Get the approximate value in the 2 index sequence
2419
2420 Arguments:
2421
2422 Interval - the value of interval
2423
2424 Returns:
2425
2426 approximate value of interval in the 2 index sequence
2427
2428 --*/
2429 ;
2430
2431 EHCI_QTD_HW *
2432 GetQtdNextPointer (
2433 IN EHCI_QTD_HW *HwQtdPtr
2434 )
2435 /*++
2436
2437 Routine Description:
2438
2439 Get Qtd next pointer field
2440
2441 Arguments:
2442
2443 HwQtdPtr - A pointer to hardware Qtd structure
2444
2445 Returns:
2446
2447 A pointer to next hardware Qtd structure
2448
2449 --*/
2450 ;
2451
2452 BOOLEAN
2453 IsQtdStatusActive (
2454 IN EHCI_QTD_HW *HwQtdPtr
2455 )
2456 /*++
2457
2458 Routine Description:
2459
2460 Whether Qtd status is active or not
2461
2462 Arguments:
2463
2464 HwQtdPtr - A pointer to hardware Qtd structure
2465
2466 Returns:
2467
2468 TRUE Active
2469 FALSE Inactive
2470
2471 --*/
2472 ;
2473
2474 BOOLEAN
2475 IsQtdStatusHalted (
2476 IN EHCI_QTD_HW *HwQtdPtr
2477 )
2478 /*++
2479
2480 Routine Description:
2481
2482 Whether Qtd status is halted or not
2483
2484 Arguments:
2485
2486 HwQtdPtr - A pointer to hardware Qtd structure
2487
2488 Returns:
2489
2490 TRUE Halted
2491 FALSE Not halted
2492
2493 --*/
2494 ;
2495
2496 BOOLEAN
2497 IsQtdStatusBufferError (
2498 IN EHCI_QTD_HW *HwQtdPtr
2499 )
2500 /*++
2501
2502 Routine Description:
2503
2504 Whether Qtd status is buffer error or not
2505
2506 Arguments:
2507
2508 HwQtdPtr - A pointer to hardware Qtd structure
2509
2510 Returns:
2511
2512 TRUE Buffer error
2513 FALSE No buffer error
2514
2515 --*/
2516 ;
2517
2518 BOOLEAN
2519 IsQtdStatusBabbleError (
2520 IN EHCI_QTD_HW *HwQtdPtr
2521 )
2522 /*++
2523
2524 Routine Description:
2525
2526 Whether Qtd status is babble error or not
2527
2528 Arguments:
2529
2530 HwQtdPtr - A pointer to hardware Qtd structure
2531
2532 Returns:
2533
2534 TRUE Babble error
2535 FALSE No babble error
2536
2537 --*/
2538 ;
2539
2540 BOOLEAN
2541 IsQtdStatusTransactionError (
2542 IN EHCI_QTD_HW *HwQtdPtr
2543 )
2544 /*++
2545
2546 Routine Description:
2547
2548 Whether Qtd status is transaction error or not
2549
2550 Arguments:
2551
2552 HwQtdPtr - A pointer to hardware Qtd structure
2553
2554 Returns:
2555
2556 TRUE Transaction error
2557 FALSE No transaction error
2558
2559 --*/
2560 ;
2561
2562 BOOLEAN
2563 IsDataInTransfer (
2564 IN UINT8 EndPointAddress
2565 )
2566 /*++
2567
2568 Routine Description:
2569
2570 Whether is a DataIn direction transfer
2571
2572 Arguments:
2573
2574 EndPointAddress - address of the endpoint
2575
2576 Returns:
2577
2578 TRUE DataIn
2579 FALSE DataOut
2580
2581 --*/
2582 ;
2583
2584 EFI_STATUS
2585 MapDataBuffer (
2586 IN USB2_HC_DEV *HcDev,
2587 IN EFI_USB_DATA_DIRECTION TransferDirection,
2588 IN OUT VOID *Data,
2589 IN OUT UINTN *DataLength,
2590 OUT UINT8 *PktId,
2591 OUT UINT8 **DataCursor,
2592 OUT VOID **DataMap
2593 )
2594 /*++
2595
2596 Routine Description:
2597
2598 Map address of user data buffer
2599
2600 Arguments:
2601
2602 HcDev - USB2_HC_DEV
2603 TransferDirection - direction of transfer
2604 Data - A pointer to user data buffer
2605 DataLength - length of user data
2606 PktId - Packte Identificaion
2607 DataCursor - mapped address to return
2608 DataMap - identificaion of this mapping to return
2609
2610 Returns:
2611
2612 EFI_SUCCESS Success
2613 EFI_DEVICE_ERROR Fail
2614
2615 --*/
2616 ;
2617
2618 EFI_STATUS
2619 MapRequestBuffer (
2620 IN USB2_HC_DEV *HcDev,
2621 IN OUT VOID *Request,
2622 OUT UINT8 **RequestCursor,
2623 OUT VOID **RequestMap
2624 )
2625 /*++
2626
2627 Routine Description:
2628
2629 Map address of request structure buffer
2630
2631 Arguments:
2632
2633 HcDev - USB2_HC_DEV
2634 Request - A pointer to request structure
2635 RequestCursor - Mapped address of request structure to return
2636 RequestMap - Identificaion of this mapping to return
2637
2638 Returns:
2639
2640 EFI_SUCCESS Success
2641 EFI_DEVICE_ERROR Fail
2642
2643 --*/
2644 ;
2645
2646 VOID
2647 SetQtdBufferPointer (
2648 IN EHCI_QTD_HW *QtdHwPtr,
2649 IN VOID *DataPtr,
2650 IN UINTN DataLen
2651 )
2652 /*++
2653
2654 Routine Description:
2655
2656 Set data buffer pointers in Qtd
2657
2658 Arguments:
2659
2660 QtdHwPtr - A pointer to Qtd hardware structure
2661 DataPtr - A pointer to user data buffer
2662 DataLen - Length of the user data buffer
2663
2664 Returns:
2665
2666 VOID
2667
2668 --*/
2669 ;
2670
2671 EHCI_QTD_HW *
2672 GetQtdAlternateNextPointer (
2673 IN EHCI_QTD_HW *HwQtdPtr
2674 )
2675 /*++
2676
2677 Routine Description:
2678
2679 Get Qtd alternate next pointer field
2680
2681 Arguments:
2682
2683 HwQtdPtr - A pointer to hardware Qtd structure
2684
2685 Returns:
2686
2687 A pointer to hardware alternate Qtd
2688
2689 --*/
2690 ;
2691
2692 VOID
2693 ZeroOutQhOverlay (
2694 IN EHCI_QH_ENTITY *QhPtr
2695 )
2696 /*++
2697
2698 Routine Description:
2699
2700 Zero out the fields in Qh structure
2701
2702 Arguments:
2703
2704 QhPtr - A pointer to Qh structure
2705
2706 Returns:
2707
2708 VOID
2709
2710 --*/
2711 ;
2712
2713 VOID
2714 UpdateAsyncRequestTransfer (
2715 IN EHCI_ASYNC_REQUEST *AsyncRequestPtr,
2716 IN UINT32 TransferResult,
2717 IN UINTN ErrTDPos
2718 )
2719 /*++
2720
2721 Routine Description:
2722
2723 Update asynchronous request transfer
2724
2725 Arguments:
2726
2727 AsyncRequestPtr - A pointer to async request
2728 TransferResult - transfer result
2729 ErrQtdPos - postion of error Qtd
2730
2731 Returns:
2732
2733 VOID
2734
2735 --*/
2736 ;
2737
2738
2739 EFI_STATUS
2740 DeleteAsyncRequestTransfer (
2741 IN USB2_HC_DEV *HcDev,
2742 IN UINT8 DeviceAddress,
2743 IN UINT8 EndPointAddress,
2744 OUT UINT8 *DataToggle
2745 )
2746 /*++
2747
2748 Routine Description:
2749
2750 Delete all asynchronous request transfer
2751
2752 Arguments:
2753
2754 HcDev - USB2_HC_DEV
2755 DeviceAddress - address of usb device
2756 EndPointAddress - address of endpoint
2757 DataToggle - stored data toggle
2758
2759 Returns:
2760
2761 EFI_SUCCESS Success
2762 EFI_DEVICE_ERROR Fail
2763
2764 --*/
2765 ;
2766
2767 VOID
2768 CleanUpAllAsyncRequestTransfer (
2769 IN USB2_HC_DEV *HcDev
2770 )
2771 /*++
2772
2773 Routine Description:
2774
2775 Clean up all asynchronous request transfer
2776
2777 Arguments:
2778
2779 HcDev - USB2_HC_DEV
2780
2781 Returns:
2782 VOID
2783
2784 --*/
2785 ;
2786
2787 EFI_STATUS
2788 ExecuteTransfer (
2789 IN USB2_HC_DEV *HcDev,
2790 IN BOOLEAN IsControl,
2791 IN EHCI_QH_ENTITY *QhPtr,
2792 IN OUT UINTN *ActualLen,
2793 OUT UINT8 *DataToggle,
2794 IN UINTN TimeOut,
2795 OUT UINT32 *TransferResult
2796 )
2797 /*++
2798
2799 Routine Description:
2800
2801 Execute Bulk or SyncInterrupt Transfer
2802
2803 Arguments:
2804
2805 HcDev - USB2_HC_DEV
2806 IsControl - Is control transfer or not
2807 QhPtr - A pointer to Qh
2808 ActualLen - Actual transfered Len
2809 DataToggle - Data Toggle
2810 TimeOut - TimeOut threshold
2811 TransferResult - Transfer result
2812
2813 Returns:
2814
2815 EFI_SUCCESS Sucess
2816 EFI_DEVICE_ERROR Error
2817
2818 --*/
2819 ;
2820
2821 BOOLEAN
2822 CheckQtdsTransferResult (
2823 IN BOOLEAN IsControl,
2824 IN EHCI_QH_ENTITY *QhPtr,
2825 OUT UINT32 *Result,
2826 OUT UINTN *ErrQtdPos,
2827 OUT UINTN *ActualLen
2828 )
2829 /*++
2830
2831 Routine Description:
2832
2833 Check transfer result of Qtds
2834
2835 Arguments:
2836
2837 IsControl - Is control transfer or not
2838 QhPtr - A pointer to Qh
2839 Result - Transfer result
2840 ErrQtdPos - Error TD Position
2841 ActualLen - Actual Transfer Size
2842
2843 Returns:
2844
2845 TRUE Qtds finished
2846 FALSE Not finish
2847
2848 --*/
2849 ;
2850
2851 EFI_STATUS
2852 AsyncRequestMoniter (
2853 IN EFI_EVENT Event,
2854 IN VOID *Context
2855 )
2856 /*++
2857
2858 Routine Description:
2859
2860 Interrupt transfer periodic check handler
2861
2862 Arguments:
2863
2864 Event - Interrupt event
2865 Context - Pointer to USB2_HC_DEV
2866
2867 Returns:
2868
2869 EFI_SUCCESS Success
2870 EFI_DEVICE_ERROR Fail
2871
2872 --*/
2873 ;
2874
2875
2876 EFI_STATUS
2877 CreateNULLQH (
2878 IN USB2_HC_DEV *HcDev
2879 )
2880 /*++
2881
2882 Routine Description:
2883
2884 Create the NULL QH to make it as the Async QH header
2885
2886 Arguments:
2887
2888 HcDev - USB2_HC_DEV
2889
2890 Returns:
2891
2892 EFI_SUCCESS Success
2893 --*/
2894 ;
2895
2896 VOID
2897 DestroyNULLQH (
2898 IN USB2_HC_DEV *HcDev
2899 );
2900
2901 VOID
2902 ClearLegacySupport (
2903 IN USB2_HC_DEV *HcDev
2904 );
2905
2906 VOID
2907 HostReset (
2908 IN USB2_HC_DEV *HcDev
2909 );
2910
2911
2912 VOID
2913 DumpEHCIPortsStatus (
2914 IN USB2_HC_DEV *HcDev
2915 );
2916
2917
2918 #endif