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[mirror_edk2.git] / EdkModulePkg / Bus / Pci / IdeBus / Dxe / ata.c
1 /** @file
2 Copyright (c) 2006, Intel Corporation
3 All rights reserved. This program and the accompanying materials
4 are licensed and made available under the terms and conditions of the BSD License
5 which accompanies this distribution. The full text of the license may be found at
6 http://opensource.org/licenses/bsd-license.php
7
8 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
9 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
10
11 @par Revision Reference:
12 2002-6: Add Atapi6 enhancement, support >120GB hard disk, including
13 update - ATAIdentity() func
14 update - AtaBlockIoReadBlocks() func
15 update - AtaBlockIoWriteBlocks() func
16 add - AtaAtapi6Identify() func
17 add - AtaReadSectorsExt() func
18 add - AtaWriteSectorsExt() func
19 add - AtaPioDataInExt() func
20 add - AtaPioDataOutExt() func
21
22 **/
23
24 #include "idebus.h"
25
26
27 EFI_STATUS
28 AtaReadSectorsExt (
29 IN IDE_BLK_IO_DEV *IdeDev,
30 IN OUT VOID *DataBuffer,
31 IN EFI_LBA StartLba,
32 IN UINTN NumberOfBlocks
33 );
34
35 EFI_STATUS
36 AtaWriteSectorsExt (
37 IN IDE_BLK_IO_DEV *IdeDev,
38 IN VOID *DataBuffer,
39 IN EFI_LBA StartLba,
40 IN UINTN NumberOfBlocks
41 );
42
43 EFI_STATUS
44 AtaPioDataInExt (
45 IN IDE_BLK_IO_DEV *IdeDev,
46 IN OUT VOID *Buffer,
47 IN UINT32 ByteCount,
48 IN UINT8 AtaCommand,
49 IN EFI_LBA StartLba,
50 IN UINT16 SectorCount
51 );
52
53 EFI_STATUS
54 AtaPioDataOutExt (
55 IN IDE_BLK_IO_DEV *IdeDev,
56 IN VOID *Buffer,
57 IN UINT32 ByteCount,
58 IN UINT8 AtaCommand,
59 IN EFI_LBA StartLba,
60 IN UINT16 SectorCount
61 );
62
63 /**
64 Sends out an ATA Identify Command to the specified device.
65
66 This function is called by DiscoverIdeDevice() during its device
67 identification. It sends out the ATA Identify Command to the
68 specified device. Only ATA device responses to this command. If
69 the command succeeds, it returns the Identify data structure which
70 contains information about the device. This function extracts the
71 information it needs to fill the IDE_BLK_IO_DEV data structure,
72 including device type, media block size, media capacity, and etc.
73
74 @param[in] *IdeDev
75 pointer pointing to IDE_BLK_IO_DEV data structure,used
76 to record all the information of the IDE device.
77
78 @retval EFI_SUCCESS Identify ATA device successfully.
79
80 @retval EFI_DEVICE_ERROR ATA Identify Device Command failed or
81 device is not ATA device.
82
83 @note
84 parameter IdeDev will be updated in this function.
85
86 **/
87 EFI_STATUS
88 ATAIdentify (
89 IN IDE_BLK_IO_DEV *IdeDev
90 )
91 {
92 EFI_STATUS Status;
93 EFI_IDENTIFY_DATA *AtaIdentifyPointer;
94 UINT32 Capacity;
95 UINT8 DeviceSelect;
96
97 //
98 // AtaIdentifyPointer is used for accommodating returned IDENTIFY data of
99 // the ATA Identify command
100 //
101 AtaIdentifyPointer = (EFI_IDENTIFY_DATA *) AllocateZeroPool (sizeof (EFI_IDENTIFY_DATA));
102
103 //
104 // use ATA PIO Data In protocol to send ATA Identify command
105 // and receive data from device
106 //
107 DeviceSelect = 0;
108 DeviceSelect = (UINT8) ((IdeDev->Device) << 4);
109 Status = AtaPioDataIn (
110 IdeDev,
111 (VOID *) AtaIdentifyPointer,
112 sizeof (EFI_IDENTIFY_DATA),
113 IDENTIFY_DRIVE_CMD,
114 DeviceSelect,
115 0,
116 0,
117 0,
118 0
119 );
120 //
121 // If ATA Identify command succeeds, then according to the received
122 // IDENTIFY data,
123 // identify the device type ( ATA or not ).
124 // If ATA device, fill the information in IdeDev.
125 // If not ATA device, return IDE_DEVICE_ERROR
126 //
127 if (!EFI_ERROR (Status)) {
128
129 IdeDev->pIdData = AtaIdentifyPointer;
130
131 //
132 // Print ATA Module Name
133 //
134 PrintAtaModuleName (IdeDev);
135
136 //
137 // bit 15 of pAtaIdentify->config is used to identify whether device is
138 // ATA device or ATAPI device.
139 // if 0, means ATA device; if 1, means ATAPI device.
140 //
141 if ((AtaIdentifyPointer->AtaData.config & 0x8000) == 0x00) {
142 //
143 // Detect if support S.M.A.R.T. If yes, enable it as default
144 //
145 AtaSMARTSupport (IdeDev);
146
147 //
148 // Check whether this device needs 48-bit addressing (ATAPI-6 ata device)
149 //
150 Status = AtaAtapi6Identify (IdeDev);
151 if (!EFI_ERROR (Status)) {
152 //
153 // It's a disk with >120GB capacity, initialized in AtaAtapi6Identify()
154 //
155 return EFI_SUCCESS;
156 }
157 //
158 // This is a hard disk <= 120GB capacity, treat it as normal hard disk
159 //
160 IdeDev->Type = IdeHardDisk;
161
162 //
163 // Block Media Information:
164 // Media->LogicalPartition , Media->WriteCaching will be filled
165 // in the DiscoverIdeDevcie() function.
166 //
167 IdeDev->BlkIo.Media->IoAlign = 4;
168 IdeDev->BlkIo.Media->MediaId = 1;
169 IdeDev->BlkIo.Media->RemovableMedia = FALSE;
170 IdeDev->BlkIo.Media->MediaPresent = TRUE;
171 IdeDev->BlkIo.Media->ReadOnly = FALSE;
172 IdeDev->BlkIo.Media->BlockSize = 0x200;
173
174 //
175 // Calculate device capacity
176 //
177 Capacity = ((UINT32)AtaIdentifyPointer->AtaData.user_addressable_sectors_hi << 16) |
178 AtaIdentifyPointer->AtaData.user_addressable_sectors_lo ;
179 IdeDev->BlkIo.Media->LastBlock = Capacity - 1;
180
181 return EFI_SUCCESS;
182
183 }
184 }
185
186 gBS->FreePool (AtaIdentifyPointer);
187 //
188 // Make sure the pIdData will not be freed again.
189 //
190 IdeDev->pIdData = NULL;
191
192 return EFI_DEVICE_ERROR;
193 }
194
195
196 /**
197 This function is called by ATAIdentify() to identity whether this disk
198 supports ATA/ATAPI6 48bit addressing, ie support >120G capacity
199
200 @param[in] *IdeDev
201 pointer pointing to IDE_BLK_IO_DEV data structure, used
202 to record all the information of the IDE device.
203
204 @retval EFI_SUCCESS The disk specified by IdeDev is a Atapi6 supported one
205 and 48-bit addressing must be used
206
207 @retval EFI_UNSUPPORTED The disk dosn't not support Atapi6 or it supports but
208 the capacity is below 120G, 48bit addressing is not
209 needed
210
211 @note
212 This function must be called after DEVICE_IDENTITY command has been
213 successfully returned
214
215 **/
216 EFI_STATUS
217 AtaAtapi6Identify (
218 IN IDE_BLK_IO_DEV *IdeDev
219 )
220 {
221 UINT8 Index;
222 EFI_LBA TmpLba;
223 EFI_LBA Capacity;
224 EFI_IDENTIFY_DATA *Atapi6IdentifyStruct;
225
226 if (IdeDev->pIdData == NULL) {
227 return EFI_UNSUPPORTED;
228 }
229
230 Atapi6IdentifyStruct = IdeDev->pIdData;
231
232 if ((Atapi6IdentifyStruct->AtapiData.cmd_set_support_83 & bit10) == 0) {
233 //
234 // The device dosn't support 48 bit addressing
235 //
236 return EFI_UNSUPPORTED;
237 }
238
239 //
240 // 48 bit address feature set is supported, get maximum capacity
241 //
242 Capacity = Atapi6IdentifyStruct->AtapiData.max_user_lba_for_48bit_addr[0];
243 for (Index = 1; Index < 4; Index++) {
244 //
245 // Lower byte goes first: word[100] is the lowest word, word[103] is highest
246 //
247 TmpLba = Atapi6IdentifyStruct->AtapiData.max_user_lba_for_48bit_addr[Index];
248 Capacity |= LShiftU64 (TmpLba, 16 * Index);
249 }
250
251 if (Capacity > MAX_28BIT_ADDRESSING_CAPACITY) {
252 //
253 // Capacity exceeds 120GB. 48-bit addressing is really needed
254 //
255 IdeDev->Type = Ide48bitAddressingHardDisk;
256
257 //
258 // Fill block media information:Media->LogicalPartition ,
259 // Media->WriteCaching will be filledin the DiscoverIdeDevcie() function.
260 //
261 IdeDev->BlkIo.Media->IoAlign = 4;
262 IdeDev->BlkIo.Media->MediaId = 1;
263 IdeDev->BlkIo.Media->RemovableMedia = FALSE;
264 IdeDev->BlkIo.Media->MediaPresent = TRUE;
265 IdeDev->BlkIo.Media->ReadOnly = FALSE;
266 IdeDev->BlkIo.Media->BlockSize = 0x200;
267 IdeDev->BlkIo.Media->LastBlock = Capacity - 1;
268
269 return EFI_SUCCESS;
270 }
271
272 return EFI_UNSUPPORTED;
273 }
274
275 /**
276 This function is called by ATAIdentify() or ATAPIIdentify()
277 to print device's module name.
278
279 @param[in] *IdeDev
280 pointer pointing to IDE_BLK_IO_DEV data structure, used
281 to record all the information of the IDE device.
282
283 **/
284 VOID
285 PrintAtaModuleName (
286 IN IDE_BLK_IO_DEV *IdeDev
287 )
288 {
289 if (IdeDev->pIdData == NULL) {
290 return ;
291 }
292
293 SwapStringChars (IdeDev->ModelName, IdeDev->pIdData->AtaData.ModelName, 40);
294 IdeDev->ModelName[40] = 0x00;
295 }
296
297 /**
298 This function is used to send out ATA commands conforms to the
299 PIO Data In Protocol.
300
301 @param[in] *IdeDev
302 pointer pointing to IDE_BLK_IO_DEV data structure, used
303 to record all the information of the IDE device.
304
305 @param[in] *Buffer
306 buffer contained data transferred from device to host.
307
308 @param[in] ByteCount
309 data size in byte unit of the buffer.
310
311 @param[in] AtaCommand
312 value of the Command Register
313
314 @param[in] Head
315 value of the Head/Device Register
316
317 @param[in] SectorCount
318 value of the Sector Count Register
319
320 @param[in] SectorNumber
321 value of the Sector Number Register
322
323 @param[in] CylinderLsb
324 value of the low byte of the Cylinder Register
325
326 @param[in] CylinderMsb
327 value of the high byte of the Cylinder Register
328
329 @retval EFI_SUCCESS send out the ATA command and device send required
330 data successfully.
331
332 @retval EFI_DEVICE_ERROR command sent failed.
333
334 **/
335 EFI_STATUS
336 AtaPioDataIn (
337 IN IDE_BLK_IO_DEV *IdeDev,
338 IN VOID *Buffer,
339 IN UINT32 ByteCount,
340 IN UINT8 AtaCommand,
341 IN UINT8 Head,
342 IN UINT8 SectorCount,
343 IN UINT8 SectorNumber,
344 IN UINT8 CylinderLsb,
345 IN UINT8 CylinderMsb
346 )
347 {
348 UINTN WordCount;
349 UINTN Increment;
350 UINT16 *Buffer16;
351 EFI_STATUS Status;
352
353 Status = WaitForBSYClear (IdeDev, ATATIMEOUT);
354 if (EFI_ERROR (Status)) {
355 return EFI_DEVICE_ERROR;
356 }
357
358 //
359 // e0:1110,0000-- bit7 and bit5 are reserved bits.
360 // bit6 set means LBA mode
361 //
362 IDEWritePortB (
363 IdeDev->PciIo,
364 IdeDev->IoPort->Head,
365 (UINT8) ((IdeDev->Device << 4) | 0xe0 | Head)
366 );
367
368 //
369 // All ATAPI device's ATA commands can be issued regardless of the
370 // state of the DRDY
371 //
372 if (IdeDev->Type == IdeHardDisk) {
373
374 Status = DRDYReady (IdeDev, ATATIMEOUT);
375 if (EFI_ERROR (Status)) {
376 return EFI_DEVICE_ERROR;
377 }
378 }
379 //
380 // set all the command parameters
381 // Before write to all the following registers, BSY and DRQ must be 0.
382 //
383 Status = DRQClear2 (IdeDev, ATATIMEOUT);
384 if (EFI_ERROR (Status)) {
385 return EFI_DEVICE_ERROR;
386 }
387
388 if (AtaCommand == SET_FEATURES_CMD) {
389 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, 0x03);
390 }
391
392 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount);
393 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, SectorNumber);
394 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, CylinderLsb);
395 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, CylinderMsb);
396
397 //
398 // send command via Command Register
399 //
400 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, AtaCommand);
401
402 Buffer16 = (UINT16 *) Buffer;
403
404 //
405 // According to PIO data in protocol, host can perform a series of reads to
406 // the data register after each time device set DRQ ready;
407 // The data size of "a series of read" is command specific.
408 // For most ATA command, data size received from device will not exceed
409 // 1 sector, hence the data size for "a series of read" can be the whole data
410 // size of one command request.
411 // For ATA command such as Read Sector command, the data size of one ATA
412 // command request is often larger than 1 sector, according to the
413 // Read Sector command, the data size of "a series of read" is exactly 1
414 // sector.
415 // Here for simplification reason, we specify the data size for
416 // "a series of read" to 1 sector (256 words) if data size of one ATA command
417 // request is larger than 256 words.
418 //
419 Increment = 256;
420
421 //
422 // used to record bytes of currently transfered data
423 //
424 WordCount = 0;
425
426 while (WordCount < ByteCount / 2) {
427 //
428 // Poll DRQ bit set, data transfer can be performed only when DRQ is ready.
429 //
430 Status = DRQReady2 (IdeDev, ATATIMEOUT);
431 if (EFI_ERROR (Status)) {
432 return EFI_DEVICE_ERROR;
433 }
434
435 Status = CheckErrorStatus (IdeDev);
436 if (EFI_ERROR (Status)) {
437 return EFI_DEVICE_ERROR;
438 }
439
440 //
441 // Get the byte count for one series of read
442 //
443 if ((WordCount + Increment) > ByteCount / 2) {
444 Increment = ByteCount / 2 - WordCount;
445 }
446
447 IDEReadPortWMultiple (
448 IdeDev->PciIo,
449 IdeDev->IoPort->Data,
450 Increment,
451 Buffer16
452 );
453
454 WordCount += Increment;
455 Buffer16 += Increment;
456
457 }
458
459 DRQClear (IdeDev, ATATIMEOUT);
460
461 return CheckErrorStatus (IdeDev);
462 }
463
464 /**
465 This function is used to send out ATA commands conforms to the
466 PIO Data Out Protocol.
467
468 @param *IdeDev
469 pointer pointing to IDE_BLK_IO_DEV data structure, used
470 to record all the information of the IDE device.
471
472 @param *Buffer buffer contained data transferred from host to device.
473 @param ByteCount data size in byte unit of the buffer.
474 @param AtaCommand value of the Command Register
475 @param Head value of the Head/Device Register
476 @param SectorCount value of the Sector Count Register
477 @param SectorNumber value of the Sector Number Register
478 @param CylinderLsb value of the low byte of the Cylinder Register
479 @param CylinderMsb value of the high byte of the Cylinder Register
480
481 @retval EFI_SUCCESS send out the ATA command and device received required
482 data successfully.
483
484 @retval EFI_DEVICE_ERROR command sent failed.
485
486 **/
487 EFI_STATUS
488 AtaPioDataOut (
489 IN IDE_BLK_IO_DEV *IdeDev,
490 IN VOID *Buffer,
491 IN UINT32 ByteCount,
492 IN UINT8 AtaCommand,
493 IN UINT8 Head,
494 IN UINT8 SectorCount,
495 IN UINT8 SectorNumber,
496 IN UINT8 CylinderLsb,
497 IN UINT8 CylinderMsb
498 )
499 {
500 UINTN WordCount;
501 UINTN Increment;
502 UINT16 *Buffer16;
503 EFI_STATUS Status;
504
505 Status = WaitForBSYClear (IdeDev, ATATIMEOUT);
506 if (EFI_ERROR (Status)) {
507 return EFI_DEVICE_ERROR;
508 }
509
510 //
511 // select device via Head/Device register.
512 // Before write Head/Device register, BSY and DRQ must be 0.
513 //
514 Status = DRQClear2 (IdeDev, ATATIMEOUT);
515 if (EFI_ERROR (Status)) {
516 return EFI_DEVICE_ERROR;
517 }
518
519 //
520 // e0:1110,0000-- bit7 and bit5 are reserved bits.
521 // bit6 set means LBA mode
522 //
523 IDEWritePortB (
524 IdeDev->PciIo,
525 IdeDev->IoPort->Head,
526 (UINT8) ((IdeDev->Device << 4) | 0xe0 | Head)
527 );
528
529 Status = DRDYReady (IdeDev, ATATIMEOUT);
530 if (EFI_ERROR (Status)) {
531 return EFI_DEVICE_ERROR;
532 }
533
534 //
535 // set all the command parameters
536 // Before write to all the following registers, BSY and DRQ must be 0.
537 //
538 Status = DRQClear2 (IdeDev, ATATIMEOUT);
539 if (EFI_ERROR (Status)) {
540 return EFI_DEVICE_ERROR;
541 }
542
543 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount);
544 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, SectorNumber);
545 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, CylinderLsb);
546 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, CylinderMsb);
547
548 //
549 // send command via Command Register
550 //
551 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, AtaCommand);
552
553 Buffer16 = (UINT16 *) Buffer;
554
555 //
556 // According to PIO data out protocol, host can perform a series of
557 // writes to the data register after each time device set DRQ ready;
558 // The data size of "a series of read" is command specific.
559 // For most ATA command, data size written to device will not exceed 1 sector,
560 // hence the data size for "a series of write" can be the data size of one
561 // command request.
562 // For ATA command such as Write Sector command, the data size of one
563 // ATA command request is often larger than 1 sector, according to the
564 // Write Sector command, the data size of "a series of read" is exactly
565 // 1 sector.
566 // Here for simplification reason, we specify the data size for
567 // "a series of write" to 1 sector (256 words) if data size of one ATA command
568 // request is larger than 256 words.
569 //
570 Increment = 256;
571 WordCount = 0;
572
573 while (WordCount < ByteCount / 2) {
574
575 //
576 // DRQReady2-- read Alternate Status Register to determine the DRQ bit
577 // data transfer can be performed only when DRQ is ready.
578 //
579 Status = DRQReady2 (IdeDev, ATATIMEOUT);
580 if (EFI_ERROR (Status)) {
581 return EFI_DEVICE_ERROR;
582 }
583
584 Status = CheckErrorStatus (IdeDev);
585 if (EFI_ERROR (Status)) {
586 return EFI_DEVICE_ERROR;
587 }
588
589 //
590 // Check the remaining byte count is less than 512 bytes
591 //
592 if ((WordCount + Increment) > ByteCount / 2) {
593 Increment = ByteCount / 2 - WordCount;
594 }
595 //
596 // perform a series of write without check DRQ ready
597 //
598
599 IDEWritePortWMultiple (
600 IdeDev->PciIo,
601 IdeDev->IoPort->Data,
602 Increment,
603 Buffer16
604 );
605 WordCount += Increment;
606 Buffer16 += Increment;
607
608 }
609
610 DRQClear (IdeDev, ATATIMEOUT);
611
612 return CheckErrorStatus (IdeDev);
613 }
614
615 /**
616 This function is used to analyze the Status Register and print out
617 some debug information and if there is ERR bit set in the Status
618 Register, the Error Register's value is also be parsed and print out.
619
620 @param[in] *IdeDev
621 pointer pointing to IDE_BLK_IO_DEV data structure, used
622 to record all the information of the IDE device.
623
624 @retval EFI_SUCCESS No err information in the Status Register.
625 @retval EFI_DEVICE_ERROR Any err information in the Status Register.
626
627 **/
628 EFI_STATUS
629 CheckErrorStatus (
630 IN IDE_BLK_IO_DEV *IdeDev
631 )
632 {
633 UINT8 StatusRegister;
634
635 //#ifdef EFI_DEBUG
636
637 UINT8 ErrorRegister;
638
639 //#endif
640
641 StatusRegister = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Status);
642
643 DEBUG_CODE_BEGIN ();
644
645 if (StatusRegister & DWF) {
646 DEBUG (
647 (EFI_D_BLKIO,
648 "CheckErrorStatus()-- %02x : Error : Write Fault\n",
649 StatusRegister)
650 );
651 }
652
653 if (StatusRegister & CORR) {
654 DEBUG (
655 (EFI_D_BLKIO,
656 "CheckErrorStatus()-- %02x : Error : Corrected Data\n",
657 StatusRegister)
658 );
659 }
660
661 if (StatusRegister & ERR) {
662 ErrorRegister = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Error);
663
664 if (ErrorRegister & BBK_ERR) {
665 DEBUG (
666 (EFI_D_BLKIO,
667 "CheckErrorStatus()-- %02x : Error : Bad Block Detected\n",
668 ErrorRegister)
669 );
670 }
671
672 if (ErrorRegister & UNC_ERR) {
673 DEBUG (
674 (EFI_D_BLKIO,
675 "CheckErrorStatus()-- %02x : Error : Uncorrectable Data\n",
676 ErrorRegister)
677 );
678 }
679
680 if (ErrorRegister & MC_ERR) {
681 DEBUG (
682 (EFI_D_BLKIO,
683 "CheckErrorStatus()-- %02x : Error : Media Change\n",
684 ErrorRegister)
685 );
686 }
687
688 if (ErrorRegister & ABRT_ERR) {
689 DEBUG (
690 (EFI_D_BLKIO,
691 "CheckErrorStatus()-- %02x : Error : Abort\n",
692 ErrorRegister)
693 );
694 }
695
696 if (ErrorRegister & TK0NF_ERR) {
697 DEBUG (
698 (EFI_D_BLKIO,
699 "CheckErrorStatus()-- %02x : Error : Track 0 Not Found\n",
700 ErrorRegister)
701 );
702 }
703
704 if (ErrorRegister & AMNF_ERR) {
705 DEBUG (
706 (EFI_D_BLKIO,
707 "CheckErrorStatus()-- %02x : Error : Address Mark Not Found\n",
708 ErrorRegister)
709 );
710 }
711 }
712
713 DEBUG_CODE_END ();
714
715 if ((StatusRegister & (ERR | DWF | CORR)) == 0) {
716 return EFI_SUCCESS;
717 }
718
719 return EFI_DEVICE_ERROR;
720
721 }
722
723 /**
724 This function is called by the AtaBlkIoReadBlocks() to perform
725 reading from media in block unit.
726
727 @param[in] *IdeDev
728 pointer pointing to IDE_BLK_IO_DEV data structure, used
729 to record all the information of the IDE device.
730
731 @param[in] *DataBuffer
732 A pointer to the destination buffer for the data.
733
734 @param[in] Lba
735 The starting logical block address to read from
736 on the device media.
737
738 @param[in] NumberOfBlocks
739 The number of transfer data blocks.
740
741 @return return status is fully dependent on the return status
742 of AtaPioDataIn() function.
743
744 **/
745 EFI_STATUS
746 AtaReadSectors (
747 IN IDE_BLK_IO_DEV *IdeDev,
748 IN VOID *DataBuffer,
749 IN EFI_LBA Lba,
750 IN UINTN NumberOfBlocks
751 )
752 {
753 EFI_STATUS Status;
754 UINTN BlocksRemaining;
755 UINT32 Lba32;
756 UINT8 Lba0;
757 UINT8 Lba1;
758 UINT8 Lba2;
759 UINT8 Lba3;
760 UINT8 AtaCommand;
761 UINT8 SectorCount8;
762 UINT16 SectorCount;
763 UINTN ByteCount;
764 VOID *Buffer;
765
766 Buffer = DataBuffer;
767
768 //
769 // Using ATA Read Sector(s) command (opcode=0x20) with PIO DATA IN protocol
770 //
771 AtaCommand = READ_SECTORS_CMD;
772
773
774 BlocksRemaining = NumberOfBlocks;
775
776 Lba32 = (UINT32) Lba;
777
778 Status = EFI_SUCCESS;
779
780 while (BlocksRemaining > 0) {
781
782 //
783 // in ATA-3 spec, LBA is in 28 bit width
784 //
785 Lba0 = (UINT8) Lba32;
786 Lba1 = (UINT8) (Lba32 >> 8);
787 Lba2 = (UINT8) (Lba32 >> 16);
788 //
789 // low 4 bit of Lba3 stands for LBA bit24~bit27.
790 //
791 Lba3 = (UINT8) ((Lba32 >> 24) & 0x0f);
792
793 if (BlocksRemaining >= 0x100) {
794
795 //
796 // SectorCount8 is sent to Sector Count register, 0x00 means 256
797 // sectors to be read
798 //
799 SectorCount8 = 0x00;
800 //
801 // SectorCount is used to record the number of sectors to be read
802 //
803 SectorCount = 256;
804 } else {
805
806 SectorCount8 = (UINT8) BlocksRemaining;
807 SectorCount = (UINT16) BlocksRemaining;
808 }
809
810 //
811 // ByteCount is the number of bytes that will be read
812 //
813 ByteCount = SectorCount * (IdeDev->BlkIo.Media->BlockSize);
814
815 //
816 // call AtaPioDataIn() to send Read Sector Command and receive data read
817 //
818 Status = AtaPioDataIn (
819 IdeDev,
820 Buffer,
821 (UINT32) ByteCount,
822 AtaCommand,
823 Lba3,
824 SectorCount8,
825 Lba0,
826 Lba1,
827 Lba2
828 );
829 if (EFI_ERROR (Status)) {
830 return Status;
831 }
832
833 Lba32 += SectorCount;
834 Buffer = ((UINT8 *) Buffer + ByteCount);
835 BlocksRemaining -= SectorCount;
836 }
837
838 return Status;
839 }
840
841 /**
842 This function is called by the AtaBlkIoWriteBlocks() to perform
843 writing onto media in block unit.
844
845 @param[in] *IdeDev
846 pointer pointing to IDE_BLK_IO_DEV data structure,used
847 to record all the information of the IDE device.
848
849 @param[in] *BufferData
850 A pointer to the source buffer for the data.
851
852 @param[in] Lba
853 The starting logical block address to write onto
854 the device media.
855
856 @param[in] NumberOfBlocks
857 The number of transfer data blocks.
858
859 @return return status is fully dependent on the return status
860 of AtaPioDataOut() function.
861
862 **/
863 EFI_STATUS
864 AtaWriteSectors (
865 IN IDE_BLK_IO_DEV *IdeDev,
866 IN VOID *BufferData,
867 IN EFI_LBA Lba,
868 IN UINTN NumberOfBlocks
869 )
870 {
871 EFI_STATUS Status;
872 UINTN BlocksRemaining;
873 UINT32 Lba32;
874 UINT8 Lba0;
875 UINT8 Lba1;
876 UINT8 Lba2;
877 UINT8 Lba3;
878 UINT8 AtaCommand;
879 UINT8 SectorCount8;
880 UINT16 SectorCount;
881 UINTN ByteCount;
882 VOID *Buffer;
883
884 Buffer = BufferData;
885
886 //
887 // Using Write Sector(s) command (opcode=0x30) with PIO DATA OUT protocol
888 //
889 AtaCommand = WRITE_SECTORS_CMD;
890
891 BlocksRemaining = NumberOfBlocks;
892
893 Lba32 = (UINT32) Lba;
894
895 Status = EFI_SUCCESS;
896
897 while (BlocksRemaining > 0) {
898
899 Lba0 = (UINT8) Lba32;
900 Lba1 = (UINT8) (Lba32 >> 8);
901 Lba2 = (UINT8) (Lba32 >> 16);
902 Lba3 = (UINT8) ((Lba32 >> 24) & 0x0f);
903
904 if (BlocksRemaining >= 0x100) {
905
906 //
907 // SectorCount8 is sent to Sector Count register, 0x00 means 256 sectors
908 // to be written
909 //
910 SectorCount8 = 0x00;
911 //
912 // SectorCount is used to record the number of sectors to be written
913 //
914 SectorCount = 256;
915 } else {
916
917 SectorCount8 = (UINT8) BlocksRemaining;
918 SectorCount = (UINT16) BlocksRemaining;
919 }
920
921 ByteCount = SectorCount * (IdeDev->BlkIo.Media->BlockSize);
922
923 Status = AtaPioDataOut (
924 IdeDev,
925 Buffer,
926 (UINT32) ByteCount,
927 AtaCommand,
928 Lba3,
929 SectorCount8,
930 Lba0,
931 Lba1,
932 Lba2
933 );
934 if (EFI_ERROR (Status)) {
935 return Status;
936 }
937
938 Lba32 += SectorCount;
939 Buffer = ((UINT8 *) Buffer + ByteCount);
940 BlocksRemaining -= SectorCount;
941 }
942
943 return Status;
944 }
945
946 /**
947 This function is used to implement the Soft Reset on the specified
948 device. But, the ATA Soft Reset mechanism is so strong a reset method
949 that it will force resetting on both devices connected to the
950 same cable.
951
952 It is called by IdeBlkIoReset(), a interface function of Block
953 I/O protocol.
954
955 This function can also be used by the ATAPI device to perform reset when
956 ATAPI Reset command is failed.
957
958 @param[in] *IdeDev
959 pointer pointing to IDE_BLK_IO_DEV data structure, used
960 to record all the information of the IDE device.
961
962 @retval EFI_SUCCESS Soft reset completes successfully.
963 @retval EFI_DEVICE_ERROR Any step during the reset process is failed.
964
965 @note
966 The registers initial values after ATA soft reset are different
967 to the ATA device and ATAPI device.
968
969 **/
970 EFI_STATUS
971 AtaSoftReset (
972 IN IDE_BLK_IO_DEV *IdeDev
973 )
974 {
975
976 UINT8 DeviceControl;
977
978 DeviceControl = 0;
979 //
980 // set SRST bit to initiate soft reset
981 //
982 DeviceControl |= SRST;
983
984 //
985 // disable Interrupt
986 //
987 DeviceControl |= bit1;
988
989 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
990
991 //
992 // SRST should assert for at least 5 us, we use 10 us for
993 // better compatibility
994 //
995 gBS->Stall (10);
996
997 //
998 // Enable interrupt to support UDMA, and clear SRST bit
999 //
1000 DeviceControl = 0;
1001 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
1002
1003 //
1004 // Wait for at least 2 ms to check BSY status, we use 10 ms
1005 // for better compatibility
1006 //
1007 gBS->Stall(10000);
1008 //
1009 // slave device needs at most 31s to clear BSY
1010 //
1011 if (WaitForBSYClear (IdeDev, 31000) == EFI_TIMEOUT) {
1012 return EFI_DEVICE_ERROR;
1013 }
1014
1015 return EFI_SUCCESS;
1016 }
1017
1018 /**
1019 This function is the ATA implementation for ReadBlocks in the
1020 Block I/O Protocol interface.
1021
1022 @param[in] *IdeBlkIoDevice
1023 Indicates the calling context.
1024
1025 @param[in] MediaId
1026 The media id that the read request is for.
1027
1028 @param[in] LBA
1029 The starting logical block address to read from
1030 on the device.
1031
1032 @param[in] BufferSize
1033 The size of the Buffer in bytes. This must be a
1034 multiple of the intrinsic block size of the device.
1035
1036 @param[out] *Buffer
1037 A pointer to the destination buffer for the data.
1038 The caller is responsible for either having implicit
1039 or explicit ownership of the memory that data is read into.
1040
1041 @retval EFI_SUCCESS Read Blocks successfully.
1042 @retval EFI_DEVICE_ERROR Read Blocks failed.
1043 @retval EFI_NO_MEDIA There is no media in the device.
1044 @retval EFI_MEDIA_CHANGE The MediaId is not for the current media.
1045
1046 @retval EFI_BAD_BUFFER_SIZE
1047 The BufferSize parameter is not a multiple of the
1048 intrinsic block size of the device.
1049
1050 @retval EFI_INVALID_PARAMETER
1051 The read request contains LBAs that are not valid,
1052 or the data buffer is not valid.
1053
1054 @note
1055 If Read Block error because of device error, this function will call
1056 AtaSoftReset() function to reset device.
1057
1058 **/
1059 EFI_STATUS
1060 AtaBlkIoReadBlocks (
1061 IN IDE_BLK_IO_DEV *IdeBlkIoDevice,
1062 IN UINT32 MediaId,
1063 IN EFI_LBA LBA,
1064 IN UINTN BufferSize,
1065 OUT VOID *Buffer
1066 )
1067 {
1068 EFI_BLOCK_IO_MEDIA *Media;
1069 UINTN BlockSize;
1070 UINTN NumberOfBlocks;
1071 EFI_STATUS Status;
1072
1073 if (Buffer == NULL) {
1074 return EFI_INVALID_PARAMETER;
1075 }
1076
1077 if (BufferSize == 0) {
1078 return EFI_SUCCESS;
1079 }
1080
1081 Status = EFI_SUCCESS;
1082
1083 //
1084 // Get the intrinsic block size
1085 //
1086 Media = IdeBlkIoDevice->BlkIo.Media;
1087 BlockSize = Media->BlockSize;
1088
1089 NumberOfBlocks = BufferSize / BlockSize;
1090
1091 if (MediaId != Media->MediaId) {
1092 return EFI_MEDIA_CHANGED;
1093 }
1094
1095 if (BufferSize % BlockSize != 0) {
1096 return EFI_BAD_BUFFER_SIZE;
1097 }
1098
1099 if (!(Media->MediaPresent)) {
1100 return EFI_NO_MEDIA;
1101 }
1102
1103 if (LBA > Media->LastBlock) {
1104 return EFI_INVALID_PARAMETER;
1105 }
1106
1107 if ((LBA + NumberOfBlocks - 1) > Media->LastBlock) {
1108 return EFI_INVALID_PARAMETER;
1109 }
1110
1111 if ((Media->IoAlign > 1) && (((UINTN) Buffer & (Media->IoAlign - 1)) != 0)) {
1112 return EFI_INVALID_PARAMETER;
1113 }
1114
1115 if (IdeBlkIoDevice->Type == Ide48bitAddressingHardDisk) {
1116 //
1117 // For ATA/ATAPI-6 device(capcity > 120GB), use ATA-6 read block mechanism
1118 //
1119 Status = AtaUdmaReadExt (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
1120 if (EFI_ERROR (Status)) {
1121 Status = AtaReadSectorsExt (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
1122 }
1123 } else {
1124 //
1125 // For ATA-3 compatible device, use ATA-3 read block mechanism
1126 //
1127 Status = AtaUdmaRead (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
1128 if (EFI_ERROR (Status)) {
1129 Status = AtaReadSectors (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
1130 }
1131 }
1132
1133 if (EFI_ERROR (Status)) {
1134 AtaSoftReset (IdeBlkIoDevice);
1135 return EFI_DEVICE_ERROR;
1136 }
1137
1138 return EFI_SUCCESS;
1139
1140 }
1141
1142 /**
1143 This function is the ATA implementation for WriteBlocks in the
1144 Block I/O Protocol interface.
1145
1146 @param[in] *IdeBlkIoDevice
1147 Indicates the calling context.
1148
1149 @param[in] MediaId
1150 The media id that the write request is for.
1151
1152 @param[in] LBA
1153 The starting logical block address to write onto
1154 the device.
1155
1156 @param[in] BufferSize
1157 The size of the Buffer in bytes. This must be a
1158 multiple of the intrinsic block size of the device.
1159
1160 @param[out] *Buffer
1161 A pointer to the source buffer for the data.
1162 The caller is responsible for either having implicit
1163 or explicit ownership of the memory that data is
1164 written from.
1165
1166 @retval EFI_SUCCESS Write Blocks successfully.
1167 @retval EFI_DEVICE_ERROR Write Blocks failed.
1168 @retval EFI_NO_MEDIA There is no media in the device.
1169 @retval EFI_MEDIA_CHANGE The MediaId is not for the current media.
1170
1171 @retval EFI_BAD_BUFFER_SIZE
1172 The BufferSize parameter is not a multiple of the
1173 intrinsic block size of the device.
1174
1175 @retval EFI_INVALID_PARAMETER
1176 The write request contains LBAs that are not valid,
1177 or the data buffer is not valid.
1178
1179 @note
1180 If Write Block error because of device error, this function will call
1181 AtaSoftReset() function to reset device.
1182
1183 **/
1184 EFI_STATUS
1185 AtaBlkIoWriteBlocks (
1186 IN IDE_BLK_IO_DEV *IdeBlkIoDevice,
1187 IN UINT32 MediaId,
1188 IN EFI_LBA LBA,
1189 IN UINTN BufferSize,
1190 OUT VOID *Buffer
1191 )
1192 {
1193
1194 EFI_BLOCK_IO_MEDIA *Media;
1195 UINTN BlockSize;
1196 UINTN NumberOfBlocks;
1197 EFI_STATUS Status;
1198
1199 if (Buffer == NULL) {
1200 return EFI_INVALID_PARAMETER;
1201 }
1202
1203 if (BufferSize == 0) {
1204 return EFI_SUCCESS;
1205 }
1206
1207 Status = EFI_SUCCESS;
1208
1209 //
1210 // Get the intrinsic block size
1211 //
1212 Media = IdeBlkIoDevice->BlkIo.Media;
1213 BlockSize = Media->BlockSize;
1214 NumberOfBlocks = BufferSize / BlockSize;
1215
1216 if (MediaId != Media->MediaId) {
1217 return EFI_MEDIA_CHANGED;
1218 }
1219
1220 if (BufferSize % BlockSize != 0) {
1221 return EFI_BAD_BUFFER_SIZE;
1222 }
1223
1224 if (LBA > Media->LastBlock) {
1225 return EFI_INVALID_PARAMETER;
1226 }
1227
1228 if ((LBA + NumberOfBlocks - 1) > Media->LastBlock) {
1229 return EFI_INVALID_PARAMETER;
1230 }
1231
1232 if ((Media->IoAlign > 1) && (((UINTN) Buffer & (Media->IoAlign - 1)) != 0)) {
1233 return EFI_INVALID_PARAMETER;
1234 }
1235
1236 if (IdeBlkIoDevice->Type == Ide48bitAddressingHardDisk) {
1237 //
1238 // For ATA/ATAPI-6 device(capcity > 120GB), use ATA-6 write block mechanism
1239 //
1240 Status = AtaUdmaWriteExt (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
1241 if (EFI_ERROR (Status)) {
1242 Status = AtaWriteSectorsExt (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
1243 }
1244 } else {
1245 //
1246 // For ATA-3 compatible device, use ATA-3 write block mechanism
1247 //
1248 Status = AtaUdmaWrite (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
1249 if (EFI_ERROR (Status)) {
1250 Status = AtaWriteSectors (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
1251 }
1252 }
1253
1254 if (EFI_ERROR (Status)) {
1255 AtaSoftReset (IdeBlkIoDevice);
1256 return EFI_DEVICE_ERROR;
1257 }
1258
1259 return EFI_SUCCESS;
1260 }
1261
1262 /**
1263 This function is called by the AtaBlkIoReadBlocks() to perform
1264 reading from media in block unit. The function has been enhanced to
1265 support >120GB access and transfer at most 65536 blocks per command
1266
1267 @param[in] *IdeDev
1268 pointer pointing to IDE_BLK_IO_DEV data structure, used
1269 to record all the information of the IDE device.
1270
1271 @param[in] *DataBuffer A pointer to the destination buffer for the data.
1272 @param[in] StartLba The starting logical block address to read from
1273 on the device media.
1274 @param[in] NumberOfBlocks The number of transfer data blocks.
1275
1276 @return return status is fully dependent on the return status
1277 of AtaPioDataInExt() function.
1278
1279 **/
1280 EFI_STATUS
1281 AtaReadSectorsExt (
1282 IN IDE_BLK_IO_DEV *IdeDev,
1283 IN VOID *DataBuffer,
1284 IN EFI_LBA StartLba,
1285 IN UINTN NumberOfBlocks
1286 )
1287 {
1288 EFI_STATUS Status;
1289 UINTN BlocksRemaining;
1290 EFI_LBA Lba64;
1291 UINT8 AtaCommand;
1292 UINT16 SectorCount;
1293 UINT32 ByteCount;
1294 VOID *Buffer;
1295
1296 //
1297 // Using ATA "Read Sectors Ext" command(opcode=0x24) with PIO DATA IN protocol
1298 //
1299 AtaCommand = READ_SECTORS_EXT_CMD;
1300 Buffer = DataBuffer;
1301 BlocksRemaining = NumberOfBlocks;
1302 Lba64 = StartLba;
1303 Status = EFI_SUCCESS;
1304
1305 while (BlocksRemaining > 0) {
1306
1307 if (BlocksRemaining >= 0x10000) {
1308 //
1309 // SectorCount is used to record the number of sectors to be read
1310 // Max 65536 sectors can be transfered at a time.
1311 //
1312 SectorCount = 0xffff;
1313 } else {
1314 SectorCount = (UINT16) BlocksRemaining;
1315 }
1316
1317 //
1318 // ByteCount is the number of bytes that will be read
1319 //
1320 ByteCount = SectorCount * (IdeDev->BlkIo.Media->BlockSize);
1321
1322 //
1323 // call AtaPioDataInExt() to send Read Sector Command and receive data read
1324 //
1325 Status = AtaPioDataInExt (
1326 IdeDev,
1327 Buffer,
1328 ByteCount,
1329 AtaCommand,
1330 Lba64,
1331 SectorCount
1332 );
1333 if (EFI_ERROR (Status)) {
1334 return Status;
1335 }
1336
1337 Lba64 += SectorCount;
1338 Buffer = ((UINT8 *) Buffer + ByteCount);
1339 BlocksRemaining -= SectorCount;
1340 }
1341
1342 return Status;
1343 }
1344
1345 /**
1346 This function is called by the AtaBlkIoWriteBlocks() to perform
1347 writing onto media in block unit. The function has been enhanced to
1348 support >120GB access and transfer at most 65536 blocks per command
1349
1350 @param[in] *IdeDev
1351 pointer pointing to IDE_BLK_IO_DEV data structure,used
1352 to record all the information of the IDE device.
1353
1354 @param[in] *DataBuffer
1355 A pointer to the source buffer for the data.
1356
1357 @param[in] Lba
1358 The starting logical block address to write onto
1359 the device media.
1360
1361 @param[in] NumberOfBlocks
1362 The number of transfer data blocks.
1363
1364 @return status is fully dependent on the return status
1365 of AtaPioDataOutExt() function.
1366
1367 **/
1368 EFI_STATUS
1369 AtaWriteSectorsExt (
1370 IN IDE_BLK_IO_DEV *IdeDev,
1371 IN VOID *DataBuffer,
1372 IN EFI_LBA StartLba,
1373 IN UINTN NumberOfBlocks
1374 )
1375 {
1376 EFI_STATUS Status;
1377 EFI_LBA Lba64;
1378 UINTN BlocksRemaining;
1379 UINT8 AtaCommand;
1380 UINT16 SectorCount;
1381 UINT32 ByteCount;
1382 VOID *Buffer;
1383
1384 //
1385 // Using ATA "Write Sectors Ext" cmd(opcode=0x24) with PIO DATA OUT protocol
1386 //
1387 AtaCommand = WRITE_SECTORS_EXT_CMD;
1388 Lba64 = StartLba;
1389 Buffer = DataBuffer;
1390 BlocksRemaining = NumberOfBlocks;
1391
1392 Status = EFI_SUCCESS;
1393
1394 while (BlocksRemaining > 0) {
1395
1396 if (BlocksRemaining >= 0x10000) {
1397 //
1398 // SectorCount is used to record the number of sectors to be written.
1399 // Max 65536 sectors can be transfered at a time.
1400 //
1401 SectorCount = 0xffff;
1402 } else {
1403 SectorCount = (UINT16) BlocksRemaining;
1404 }
1405
1406 //
1407 // ByteCount is the number of bytes that will be written
1408 //
1409 ByteCount = SectorCount * (IdeDev->BlkIo.Media->BlockSize);
1410
1411 //
1412 // Call AtaPioDataOutExt() to send "Write Sectors Ext" Command
1413 //
1414 Status = AtaPioDataOutExt (
1415 IdeDev,
1416 Buffer,
1417 ByteCount,
1418 AtaCommand,
1419 Lba64,
1420 SectorCount
1421 );
1422 if (EFI_ERROR (Status)) {
1423 return Status;
1424 }
1425
1426 Lba64 += SectorCount;
1427 Buffer = ((UINT8 *) Buffer + ByteCount);
1428 BlocksRemaining -= SectorCount;
1429 }
1430
1431 return Status;
1432 }
1433
1434 /**
1435 This function is used to send out ATA commands conforms to the
1436 PIO Data In Protocol, supporting ATA/ATAPI-6 standard
1437
1438 Comparing with ATA-3 data in protocol, we have two differents here:<BR>
1439 1. Do NOT wait for DRQ clear before sending command into IDE device.(the
1440 wait will frequently fail... cause writing function return error)
1441
1442 2. Do NOT wait for DRQ clear after all data readed.(the wait greatly
1443 slow down writing performance by 100 times!)
1444
1445 @param[in] *IdeDev pointer pointing to IDE_BLK_IO_DEV data structure, used
1446 to record all the information of the IDE device.
1447
1448 @param[in,out] *Buffer buffer contained data transferred from device to host.
1449 @param[in] ByteCount data size in byte unit of the buffer.
1450 @param[in] AtaCommand value of the Command Register
1451 @param[in] StartLba the start LBA of this transaction
1452 @param[in] SectorCount the count of sectors to be transfered
1453
1454 @retval EFI_SUCCESS send out the ATA command and device send required
1455 data successfully.
1456
1457 @retval EFI_DEVICE_ERROR command sent failed.
1458
1459 **/
1460 EFI_STATUS
1461 AtaPioDataInExt (
1462 IN IDE_BLK_IO_DEV *IdeDev,
1463 IN OUT VOID *Buffer,
1464 IN UINT32 ByteCount,
1465 IN UINT8 AtaCommand,
1466 IN EFI_LBA StartLba,
1467 IN UINT16 SectorCount
1468 )
1469 {
1470 UINT8 DevSel;
1471 UINT8 SectorCount8;
1472 UINT8 LbaLow;
1473 UINT8 LbaMid;
1474 UINT8 LbaHigh;
1475 UINTN WordCount;
1476 UINTN Increment;
1477 UINT16 *Buffer16;
1478 EFI_STATUS Status;
1479
1480 Status = WaitForBSYClear (IdeDev, ATATIMEOUT);
1481 if (EFI_ERROR (Status)) {
1482 return EFI_DEVICE_ERROR;
1483 }
1484
1485 //
1486 // Select device, set bit6 as 1 to indicate LBA mode is used
1487 //
1488 DevSel = (UINT8) (IdeDev->Device << 4);
1489 DevSel |= 0x40;
1490 IDEWritePortB (
1491 IdeDev->PciIo,
1492 IdeDev->IoPort->Head,
1493 DevSel
1494 );
1495
1496 //
1497 // Wait for DRDY singnal asserting. ATAPI device needn't wait
1498 //
1499 if ( (IdeDev->Type == IdeHardDisk) ||
1500 (IdeDev->Type == Ide48bitAddressingHardDisk)) {
1501
1502 Status = DRDYReady (IdeDev, ATATIMEOUT);
1503 if (EFI_ERROR (Status)) {
1504 return EFI_DEVICE_ERROR;
1505 }
1506 }
1507
1508 //
1509 // Fill feature register if needed
1510 //
1511 if (AtaCommand == SET_FEATURES_CMD) {
1512 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, 0x03);
1513 }
1514
1515 //
1516 // Fill the sector count register, which is a two-byte FIFO. Need write twice.
1517 //
1518 SectorCount8 = (UINT8) (SectorCount >> 8);
1519 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);
1520
1521 SectorCount8 = (UINT8) SectorCount;
1522 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);
1523
1524 //
1525 // Fill the start LBA registers, which are also two-byte FIFO
1526 //
1527 LbaLow = (UINT8) RShiftU64 (StartLba, 24);
1528 LbaMid = (UINT8) RShiftU64 (StartLba, 32);
1529 LbaHigh = (UINT8) RShiftU64 (StartLba, 40);
1530 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, LbaLow);
1531 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, LbaMid);
1532 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, LbaHigh);
1533
1534 LbaLow = (UINT8) StartLba;
1535 LbaMid = (UINT8) RShiftU64 (StartLba, 8);
1536 LbaHigh = (UINT8) RShiftU64 (StartLba, 16);
1537 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, LbaLow);
1538 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, LbaMid);
1539 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, LbaHigh);
1540
1541 //
1542 // Send command via Command Register, invoking the processing of this command
1543 //
1544 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, AtaCommand);
1545
1546 Buffer16 = (UINT16 *) Buffer;
1547
1548 //
1549 // According to PIO data in protocol, host can perform a series of reads to
1550 // the data register after each time device set DRQ ready;
1551 //
1552
1553 //
1554 // 256 words
1555 //
1556 Increment = 256;
1557
1558 //
1559 // used to record bytes of currently transfered data
1560 //
1561 WordCount = 0;
1562
1563 while (WordCount < ByteCount / 2) {
1564 //
1565 // Poll DRQ bit set, data transfer can be performed only when DRQ is ready.
1566 //
1567 Status = DRQReady2 (IdeDev, ATATIMEOUT);
1568 if (EFI_ERROR (Status)) {
1569 return EFI_DEVICE_ERROR;
1570 }
1571
1572 Status = CheckErrorStatus (IdeDev);
1573 if (EFI_ERROR (Status)) {
1574 return EFI_DEVICE_ERROR;
1575 }
1576
1577 //
1578 // Get the byte count for one series of read
1579 //
1580 if ((WordCount + Increment) > ByteCount / 2) {
1581 Increment = ByteCount / 2 - WordCount;
1582 }
1583
1584 IDEReadPortWMultiple (
1585 IdeDev->PciIo,
1586 IdeDev->IoPort->Data,
1587 Increment,
1588 Buffer16
1589 );
1590
1591 WordCount += Increment;
1592 Buffer16 += Increment;
1593
1594 }
1595
1596 return CheckErrorStatus (IdeDev);
1597 }
1598
1599 /**
1600 This function is used to send out ATA commands conforms to the
1601 PIO Data Out Protocol, supporting ATA/ATAPI-6 standard
1602
1603 Comparing with ATA-3 data out protocol, we have two differents here:<BR>
1604 1. Do NOT wait for DRQ clear before sending command into IDE device.(the
1605 wait will frequently fail... cause writing function return error)
1606
1607 2. Do NOT wait for DRQ clear after all data readed.(the wait greatly
1608 slow down writing performance by 100 times!)
1609
1610 @param[in] *IdeDev
1611 pointer pointing to IDE_BLK_IO_DEV data structure, used
1612 to record all the information of the IDE device.
1613
1614 @param[in] *Buffer buffer contained data transferred from host to device.
1615 @param[in] ByteCount data size in byte unit of the buffer.
1616 @param[in] AtaCommand value of the Command Register
1617 @param[in] StartLba the start LBA of this transaction
1618 @param[in] SectorCount the count of sectors to be transfered
1619
1620 @retval EFI_SUCCESS send out the ATA command and device receive required
1621 data successfully.
1622
1623 @retval EFI_DEVICE_ERROR command sent failed.
1624
1625 **/
1626 EFI_STATUS
1627 AtaPioDataOutExt (
1628 IN IDE_BLK_IO_DEV *IdeDev,
1629 IN VOID *Buffer,
1630 IN UINT32 ByteCount,
1631 IN UINT8 AtaCommand,
1632 IN EFI_LBA StartLba,
1633 IN UINT16 SectorCount
1634 )
1635 {
1636 UINT8 DevSel;
1637 UINT8 SectorCount8;
1638 UINT8 LbaLow;
1639 UINT8 LbaMid;
1640 UINT8 LbaHigh;
1641 UINTN WordCount;
1642 UINTN Increment;
1643 UINT16 *Buffer16;
1644 EFI_STATUS Status;
1645
1646 Status = WaitForBSYClear (IdeDev, ATATIMEOUT);
1647 if (EFI_ERROR (Status)) {
1648 return EFI_DEVICE_ERROR;
1649 }
1650
1651 //
1652 // Select device. Set bit6 as 1 to indicate LBA mode is used
1653 //
1654 DevSel = (UINT8) (IdeDev->Device << 4);
1655 DevSel |= 0x40;
1656 IDEWritePortB (
1657 IdeDev->PciIo,
1658 IdeDev->IoPort->Head,
1659 DevSel
1660 );
1661
1662 //
1663 // Wait for DRDY singnal asserting.
1664 //
1665 Status = DRDYReady (IdeDev, ATATIMEOUT);
1666 if (EFI_ERROR (Status)) {
1667 return EFI_DEVICE_ERROR;
1668 }
1669
1670 //
1671 // Fill feature register if needed
1672 //
1673 if (AtaCommand == SET_FEATURES_CMD) {
1674 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, 0x03);
1675 }
1676
1677 //
1678 // Fill the sector count register, which is a two-byte FIFO. Need write twice.
1679 //
1680 SectorCount8 = (UINT8) (SectorCount >> 8);
1681 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);
1682
1683 SectorCount8 = (UINT8) SectorCount;
1684 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);
1685
1686 //
1687 // Fill the start LBA registers, which are also two-byte FIFO
1688 //
1689 LbaLow = (UINT8) RShiftU64 (StartLba, 24);
1690 LbaMid = (UINT8) RShiftU64 (StartLba, 32);
1691 LbaHigh = (UINT8) RShiftU64 (StartLba, 40);
1692 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, LbaLow);
1693 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, LbaMid);
1694 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, LbaHigh);
1695
1696 LbaLow = (UINT8) StartLba;
1697 LbaMid = (UINT8) RShiftU64 (StartLba, 8);
1698 LbaHigh = (UINT8) RShiftU64 (StartLba, 16);
1699 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, LbaLow);
1700 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, LbaMid);
1701 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, LbaHigh);
1702
1703 //
1704 // Send command via Command Register, invoking the processing of this command
1705 //
1706 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, AtaCommand);
1707
1708 Buffer16 = (UINT16 *) Buffer;
1709
1710 //
1711 // According to PIO Data Out protocol, host can perform a series of writes to
1712 // the data register after each time device set DRQ ready;
1713 //
1714 Increment = 256;
1715
1716 //
1717 // used to record bytes of currently transfered data
1718 //
1719 WordCount = 0;
1720
1721 while (WordCount < ByteCount / 2) {
1722 //
1723 // Poll DRQ bit set, data transfer can be performed only when DRQ is ready.
1724 //
1725 Status = DRQReady2 (IdeDev, ATATIMEOUT);
1726 if (EFI_ERROR (Status)) {
1727 return EFI_DEVICE_ERROR;
1728 }
1729
1730 Status = CheckErrorStatus (IdeDev);
1731 if (EFI_ERROR (Status)) {
1732 return EFI_DEVICE_ERROR;
1733 }
1734
1735 //
1736 // Write data into device by one series of writing to data register
1737 //
1738 if ((WordCount + Increment) > ByteCount / 2) {
1739 Increment = ByteCount / 2 - WordCount;
1740 }
1741
1742 IDEWritePortWMultiple (
1743 IdeDev->PciIo,
1744 IdeDev->IoPort->Data,
1745 Increment,
1746 Buffer16
1747 );
1748
1749 WordCount += Increment;
1750 Buffer16 += Increment;
1751
1752 }
1753 //
1754 // while
1755 //
1756
1757 return CheckErrorStatus (IdeDev);
1758 }
1759
1760
1761 /**
1762 Enable SMART of the disk if supported
1763
1764 @param[in] *IdeDev
1765 pointer pointing to IDE_BLK_IO_DEV data structure,used
1766 to record all the information of the IDE device.
1767
1768 **/
1769 VOID
1770 AtaSMARTSupport (
1771 IN IDE_BLK_IO_DEV *IdeDev
1772 )
1773 {
1774 EFI_STATUS Status;
1775 BOOLEAN SMARTSupported;
1776 UINT8 Device;
1777 EFI_IDENTIFY_DATA *TmpAtaIdentifyPointer;
1778 UINT8 DeviceSelect;
1779 UINT8 LBAMid;
1780 UINT8 LBAHigh;
1781
1782 //
1783 // Detect if the device supports S.M.A.R.T.
1784 //
1785 if ((IdeDev->pIdData->AtaData.command_set_supported_83 & 0xc000) != 0x4000) {
1786 //
1787 // Data in word 82 is not valid (bit15 shall be zero and bit14 shall be to one)
1788 //
1789 return ;
1790 } else {
1791 if ((IdeDev->pIdData->AtaData.command_set_supported_82 & 0x0001) != 0x0001) {
1792 //
1793 // S.M.A.R.T is not supported by the device
1794 //
1795 SMARTSupported = FALSE;
1796 } else {
1797 SMARTSupported = TRUE;
1798 }
1799 }
1800
1801 if (!SMARTSupported) {
1802 //
1803 // Report nonsupport status code
1804 //
1805 REPORT_STATUS_CODE (
1806 EFI_ERROR_CODE | EFI_ERROR_MINOR,
1807 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_NOTSUPPORTED)
1808 );
1809 } else {
1810 //
1811 // Enable this feature
1812 //
1813 REPORT_STATUS_CODE (
1814 EFI_PROGRESS_CODE,
1815 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_ENABLE)
1816 );
1817
1818 Device = (UINT8) ((IdeDev->Device << 4) | 0xe0);
1819 Status = AtaNonDataCommandIn (
1820 IdeDev,
1821 ATA_SMART_CMD,
1822 Device,
1823 ATA_SMART_ENABLE_OPERATION,
1824 0,
1825 0,
1826 ATA_CONSTANT_4F,
1827 ATA_CONSTANT_C2
1828 );
1829 //
1830 // Detect if this feature is enabled
1831 //
1832 TmpAtaIdentifyPointer = (EFI_IDENTIFY_DATA *) AllocateZeroPool (sizeof (EFI_IDENTIFY_DATA));
1833
1834 DeviceSelect = (UINT8) ((IdeDev->Device) << 4);
1835 Status = AtaPioDataIn (
1836 IdeDev,
1837 (VOID *) TmpAtaIdentifyPointer,
1838 sizeof (EFI_IDENTIFY_DATA),
1839 IDENTIFY_DRIVE_CMD,
1840 DeviceSelect,
1841 0,
1842 0,
1843 0,
1844 0
1845 );
1846 if (EFI_ERROR (Status)) {
1847 gBS->FreePool (TmpAtaIdentifyPointer);
1848 return ;
1849 }
1850
1851 //
1852 // Check if the feature is enabled
1853 //
1854 if ((TmpAtaIdentifyPointer->AtaData.command_set_feature_enb_85 & 0x0001) == 0x0001) {
1855 //
1856 // Read status data
1857 //
1858 AtaNonDataCommandIn (
1859 IdeDev,
1860 ATA_SMART_CMD,
1861 Device,
1862 ATA_SMART_RETURN_STATUS,
1863 0,
1864 0,
1865 ATA_CONSTANT_4F,
1866 ATA_CONSTANT_C2
1867 );
1868 LBAMid = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb);
1869 LBAHigh = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb);
1870
1871 if ((LBAMid == 0x4f) && (LBAHigh == 0xc2)) {
1872 //
1873 // The threshold exceeded condition is not detected by the device
1874 //
1875 REPORT_STATUS_CODE (
1876 EFI_PROGRESS_CODE,
1877 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_UNDERTHRESHOLD)
1878 );
1879
1880 } else if ((LBAMid == 0xf4) && (LBAHigh == 0x2c)) {
1881 //
1882 // The threshold exceeded condition is detected by the device
1883 //
1884 REPORT_STATUS_CODE (
1885 EFI_PROGRESS_CODE,
1886 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD)
1887 );
1888 }
1889
1890 } else {
1891 //
1892 // Report disabled status code
1893 //
1894 REPORT_STATUS_CODE (
1895 EFI_ERROR_CODE | EFI_ERROR_MINOR,
1896 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_DISABLED)
1897 );
1898 }
1899
1900 gBS->FreePool (TmpAtaIdentifyPointer);
1901 }
1902
1903 return ;
1904 }
1905
1906 /**
1907 Send ATA Ext command into device with NON_DATA protocol
1908
1909 @param IdeDev Standard IDE device private data structure
1910 @param AtaCommand The ATA command to be sent
1911 @param Device The value in Device register
1912 @param Feature The value in Feature register
1913 @param SectorCount The value in SectorCount register
1914 @param LbaAddress The LBA address in 48-bit mode
1915
1916 @retval EFI_SUCCESS Reading succeed
1917 @retval EFI_DEVICE_ERROR Error executing commands on this device
1918
1919 **/
1920 EFI_STATUS
1921 AtaCommandIssueExt (
1922 IN IDE_BLK_IO_DEV *IdeDev,
1923 IN UINT8 AtaCommand,
1924 IN UINT8 Device,
1925 IN UINT16 Feature,
1926 IN UINT16 SectorCount,
1927 IN EFI_LBA LbaAddress
1928 )
1929 {
1930 EFI_STATUS Status;
1931 UINT8 SectorCount8;
1932 UINT8 Feature8;
1933 UINT8 LbaLow;
1934 UINT8 LbaMid;
1935 UINT8 LbaHigh;
1936
1937 Status = WaitForBSYClear (IdeDev, ATATIMEOUT);
1938 if (EFI_ERROR (Status)) {
1939 return EFI_DEVICE_ERROR;
1940 }
1941
1942 //
1943 // Select device (bit4), set LBA mode(bit6) (use 0xe0 for compatibility)
1944 //
1945 IDEWritePortB (
1946 IdeDev->PciIo,
1947 IdeDev->IoPort->Head,
1948 (UINT8) ((IdeDev->Device << 4) | 0xe0)
1949 );
1950
1951 //
1952 // ATA commands for ATA device must be issued when DRDY is set
1953 //
1954 Status = DRDYReady (IdeDev, ATATIMEOUT);
1955 if (EFI_ERROR (Status)) {
1956 return EFI_DEVICE_ERROR;
1957 }
1958
1959 //
1960 // Pass parameter into device register block
1961 //
1962 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Head, Device);
1963
1964 //
1965 // Fill the feature register, which is a two-byte FIFO. Need write twice.
1966 //
1967 Feature8 = (UINT8) (Feature >> 8);
1968 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, Feature8);
1969
1970 Feature8 = (UINT8) Feature;
1971 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, Feature8);
1972
1973 //
1974 // Fill the sector count register, which is a two-byte FIFO. Need write twice.
1975 //
1976 SectorCount8 = (UINT8) (SectorCount >> 8);
1977 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);
1978
1979 SectorCount8 = (UINT8) SectorCount;
1980 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);
1981
1982 //
1983 // Fill the start LBA registers, which are also two-byte FIFO
1984 //
1985 LbaLow = (UINT8) RShiftU64 (LbaAddress, 24);
1986 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, LbaLow);
1987 LbaLow = (UINT8) LbaAddress;
1988 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, LbaLow);
1989
1990 LbaMid = (UINT8) RShiftU64 (LbaAddress, 32);
1991 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, LbaMid);
1992 LbaMid = (UINT8) RShiftU64 (LbaAddress, 8);
1993 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, LbaMid);
1994
1995 LbaHigh = (UINT8) RShiftU64 (LbaAddress, 40);
1996 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, LbaHigh);
1997 LbaHigh = (UINT8) RShiftU64 (LbaAddress, 16);
1998 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, LbaHigh);
1999
2000 //
2001 // Work around for Segate 160G disk writing
2002 //
2003 gBS->Stall (1800);
2004
2005 //
2006 // Send command via Command Register
2007 //
2008 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, AtaCommand);
2009
2010 //
2011 // Stall at least 400ns
2012 //
2013 gBS->Stall (100);
2014
2015 return EFI_SUCCESS;
2016 }
2017
2018 /**
2019 Send ATA Ext command into device with NON_DATA protocol
2020
2021 @param IdeDev Standard IDE device private data structure
2022 @param AtaCommand The ATA command to be sent
2023 @param Device The value in Device register
2024 @param Feature The value in Feature register
2025 @param SectorCount The value in SectorCount register
2026 @param LbaAddress The LBA address in 48-bit mode
2027
2028 @retval EFI_SUCCESS Reading succeed
2029 @retval EFI_DEVICE_ERROR Error executing commands on this device
2030
2031 **/
2032 EFI_STATUS
2033 AtaCommandIssue (
2034 IN IDE_BLK_IO_DEV *IdeDev,
2035 IN UINT8 AtaCommand,
2036 IN UINT8 Device,
2037 IN UINT16 Feature,
2038 IN UINT16 SectorCount,
2039 IN EFI_LBA LbaAddress
2040 )
2041 {
2042 EFI_STATUS Status;
2043 UINT8 SectorCount8;
2044 UINT8 Feature8;
2045 UINT8 Lba0;
2046 UINT8 Lba1;
2047 UINT8 Lba2;
2048 UINT8 Lba3;
2049
2050 Status = WaitForBSYClear (IdeDev, ATATIMEOUT);
2051 if (EFI_ERROR (Status)) {
2052 return EFI_DEVICE_ERROR;
2053 }
2054
2055 //
2056 // Select device (bit4), set LBA mode(bit6) (use 0xe0 for compatibility)
2057 //
2058 IDEWritePortB (
2059 IdeDev->PciIo,
2060 IdeDev->IoPort->Head,
2061 (UINT8) ((IdeDev->Device << 4) | 0xe0)
2062 );
2063
2064 //
2065 // ATA commands for ATA device must be issued when DRDY is set
2066 //
2067 Status = DRDYReady (IdeDev, ATATIMEOUT);
2068 if (EFI_ERROR (Status)) {
2069 return EFI_DEVICE_ERROR;
2070 }
2071
2072 Lba0 = (UINT8) LbaAddress;
2073 Lba1 = (UINT8) RShiftU64 (LbaAddress, 8);
2074 Lba2 = (UINT8) RShiftU64 (LbaAddress, 16);
2075 Lba3 = (UINT8) RShiftU64 (LbaAddress, 24);
2076 Device |= Lba3;
2077
2078 //
2079 // Pass parameter into device register block
2080 //
2081 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Head, Device);
2082
2083 //
2084 // Fill the feature register, which is a two-byte FIFO. Need write twice.
2085 //
2086 Feature8 = (UINT8) Feature;
2087 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, Feature8);
2088
2089 //
2090 // Fill the sector count register, which is a two-byte FIFO. Need write twice.
2091 //
2092 SectorCount8 = (UINT8) SectorCount;
2093 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);
2094
2095 //
2096 // Fill the start LBA registers, which are also two-byte FIFO
2097 //
2098
2099 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, Lba0);
2100 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, Lba1);
2101 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, Lba2);
2102
2103 //
2104 // Send command via Command Register
2105 //
2106 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, AtaCommand);
2107
2108 //
2109 // Stall at least 400ns
2110 //
2111 gBS->Stall (100);
2112
2113 return EFI_SUCCESS;
2114 }
2115
2116 /**
2117 This function is called by the AtaBlkIoReadBlocks() to perform
2118 reading from media in block unit. The function has been enhanced to
2119 support >120GB access and transfer at most 65536 blocks per command
2120
2121 @param[in] *IdeDev pointer pointing to IDE_BLK_IO_DEV data structure, used
2122 to record all the information of the IDE device.
2123
2124 @param[in] *DataBuffer A pointer to the destination buffer for the data.
2125
2126 @param[in] StartLba The starting logical block address to read from
2127 on the device media.
2128
2129 @param[in] NumberOfBlocks The number of transfer data blocks.
2130
2131 @return The device status of UDMA operation. If the operation is
2132 successful, return EFI_SUCCESS.
2133
2134 TODO: EFI_UNSUPPORTED - add return value to function comment
2135 TODO: EFI_DEVICE_ERROR - add return value to function comment
2136 TODO: EFI_DEVICE_ERROR - add return value to function comment
2137 TODO: EFI_DEVICE_ERROR - add return value to function comment
2138 **/
2139 EFI_STATUS
2140 AtaUdmaReadExt (
2141 IN IDE_BLK_IO_DEV *IdeDev,
2142 IN VOID *DataBuffer,
2143 IN EFI_LBA StartLba,
2144 IN UINTN NumberOfBlocks
2145 )
2146 {
2147 IDE_DMA_PRD *PrdAddr;
2148 IDE_DMA_PRD *UsedPrdAddr;
2149 IDE_DMA_PRD *TempPrdAddr;
2150 UINT8 RegisterValue;
2151 UINT8 Device;
2152 UINT64 IoPortForBmic;
2153 UINT64 IoPortForBmis;
2154 UINT64 IoPortForBmid;
2155 EFI_STATUS Status;
2156 UINTN PrdTableNum;
2157 UINTN ByteCount;
2158 UINTN ByteAvailable;
2159 UINT8 *PrdBuffer;
2160 UINTN RemainBlockNum;
2161 UINT8 DeviceControl;
2162 UINT32 Count;
2163 UINTN PageCount;
2164 VOID *Map;
2165 VOID *MemPage;
2166 EFI_PHYSICAL_ADDRESS DeviceAddress;
2167
2168 //
2169 // Channel and device differential. Select device.
2170 //
2171 Device = (UINT8) ((IdeDev->Device << 4) | 0xe0);
2172
2173 //
2174 // Enable interrupt to support UDMA and Select device
2175 //
2176 DeviceControl = 0;
2177 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
2178
2179 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Head, Device);
2180
2181 if (IdePrimary == IdeDev->Channel) {
2182 IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICP_OFFSET;
2183 IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISP_OFFSET;
2184 IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDP_OFFSET;
2185 } else {
2186 if (IdeSecondary == IdeDev->Channel) {
2187 IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICS_OFFSET;
2188 IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISS_OFFSET;
2189 IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDS_OFFSET;
2190 } else {
2191 return EFI_UNSUPPORTED;
2192 }
2193 }
2194
2195 RemainBlockNum = NumberOfBlocks;
2196 while (RemainBlockNum > 0) {
2197
2198 if (RemainBlockNum >= MAX_DMA_EXT_COMMAND_SECTORS) {
2199 //
2200 // SectorCount is used to record the number of sectors to be read
2201 // Max 65536 sectors can be transfered at a time.
2202 //
2203 NumberOfBlocks = MAX_DMA_EXT_COMMAND_SECTORS;
2204 RemainBlockNum -= MAX_DMA_EXT_COMMAND_SECTORS;
2205 } else {
2206 NumberOfBlocks = (UINT16) RemainBlockNum;
2207 RemainBlockNum = 0;
2208 }
2209
2210 //
2211 // Calculate the number of PRD table to make sure the memory region
2212 // not cross 64K boundary
2213 //
2214 ByteCount = NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;
2215 PrdTableNum = ((ByteCount >> 16) + 1) + 1;
2216
2217 //
2218 // Build PRD table
2219 //
2220 PageCount = EFI_SIZE_TO_PAGES (2 * PrdTableNum * sizeof (IDE_DMA_PRD));
2221 Status = IdeDev->PciIo->AllocateBuffer (
2222 IdeDev->PciIo,
2223 AllocateAnyPages,
2224 EfiBootServicesData,
2225 PageCount,
2226 &MemPage,
2227 0
2228 );
2229 if (EFI_ERROR (Status)) {
2230 return EFI_OUT_OF_RESOURCES;
2231 }
2232 ZeroMem ((VOID *) ((UINTN) MemPage), EFI_PAGES_TO_SIZE (PageCount));
2233
2234 PrdAddr = (IDE_DMA_PRD *) ((UINTN) MemPage);
2235
2236 //
2237 // To make sure PRD is allocated in one 64K page
2238 //
2239 if (((UINTN) PrdAddr & 0x0FFFF) > (((UINTN) PrdAddr + PrdTableNum * sizeof (IDE_DMA_PRD) - 1) & 0x0FFFF)) {
2240 UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x10000) & 0xFFFF0000);
2241 } else {
2242 if ((UINTN) PrdAddr & 0x03) {
2243 UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x04) & 0xFFFFFFFC);
2244 } else {
2245 UsedPrdAddr = PrdAddr;
2246 }
2247 }
2248
2249 //
2250 // Build the PRD table
2251 //
2252 Status = IdeDev->PciIo->Map (
2253 IdeDev->PciIo,
2254 EfiPciIoOperationBusMasterWrite,
2255 DataBuffer,
2256 &ByteCount,
2257 &DeviceAddress,
2258 &Map
2259 );
2260 if (EFI_ERROR (Status)) {
2261 IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);
2262 return EFI_OUT_OF_RESOURCES;
2263 }
2264 PrdBuffer = (VOID *) ((UINTN) DeviceAddress);
2265 TempPrdAddr = UsedPrdAddr;
2266 while (TRUE) {
2267
2268 ByteAvailable = 0x10000 - ((UINTN) PrdBuffer & 0xFFFF);
2269
2270 if (ByteCount <= ByteAvailable) {
2271 TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);
2272 TempPrdAddr->ByteCount = (UINT16) ByteCount;
2273 TempPrdAddr->EndOfTable = 0x8000;
2274 break;
2275 }
2276
2277 TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);
2278 TempPrdAddr->ByteCount = (UINT16) ByteAvailable;
2279
2280 ByteCount -= ByteAvailable;
2281 PrdBuffer += ByteAvailable;
2282 TempPrdAddr++;
2283 }
2284
2285 //
2286 // Set the base address to BMID register
2287 //
2288 IdeDev->PciIo->Io.Write (
2289 IdeDev->PciIo,
2290 EfiPciIoWidthUint32,
2291 EFI_PCI_IO_PASS_THROUGH_BAR,
2292 IoPortForBmid,
2293 1,
2294 &UsedPrdAddr
2295 );
2296
2297 //
2298 // Set BMIC register to identify the operation direction
2299 //
2300 IdeDev->PciIo->Io.Read (
2301 IdeDev->PciIo,
2302 EfiPciIoWidthUint8,
2303 EFI_PCI_IO_PASS_THROUGH_BAR,
2304 IoPortForBmic,
2305 1,
2306 &RegisterValue
2307 );
2308
2309 RegisterValue |= BMIC_nREAD;
2310
2311 IdeDev->PciIo->Io.Write (
2312 IdeDev->PciIo,
2313 EfiPciIoWidthUint8,
2314 EFI_PCI_IO_PASS_THROUGH_BAR,
2315 IoPortForBmic,
2316 1,
2317 &RegisterValue
2318 );
2319
2320 //
2321 // Read BMIS register and clear ERROR and INTR bit
2322 //
2323 IdeDev->PciIo->Io.Read (
2324 IdeDev->PciIo,
2325 EfiPciIoWidthUint8,
2326 EFI_PCI_IO_PASS_THROUGH_BAR,
2327 IoPortForBmis,
2328 1,
2329 &RegisterValue
2330 );
2331
2332 RegisterValue |= BMIS_INTERRUPT | BMIS_ERROR;
2333
2334 IdeDev->PciIo->Io.Write (
2335 IdeDev->PciIo,
2336 EfiPciIoWidthUint8,
2337 EFI_PCI_IO_PASS_THROUGH_BAR,
2338 IoPortForBmis,
2339 1,
2340 &RegisterValue
2341 );
2342
2343 //
2344 // Issue READ DMA EXT command
2345 //
2346 Status = AtaCommandIssueExt (
2347 IdeDev,
2348 READ_DMA_EXT_CMD,
2349 Device,
2350 0,
2351 (UINT16) NumberOfBlocks,
2352 StartLba
2353 );
2354 if (EFI_ERROR (Status)) {
2355 IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);
2356 IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
2357 return EFI_DEVICE_ERROR;
2358 }
2359
2360 //
2361 // Set START bit of BMIC register
2362 //
2363 IdeDev->PciIo->Io.Read (
2364 IdeDev->PciIo,
2365 EfiPciIoWidthUint8,
2366 EFI_PCI_IO_PASS_THROUGH_BAR,
2367 IoPortForBmic,
2368 1,
2369 &RegisterValue
2370 );
2371
2372 RegisterValue |= BMIC_START;
2373
2374 IdeDev->PciIo->Io.Write (
2375 IdeDev->PciIo,
2376 EfiPciIoWidthUint8,
2377 EFI_PCI_IO_PASS_THROUGH_BAR,
2378 IoPortForBmic,
2379 1,
2380 &RegisterValue
2381 );
2382
2383 //
2384 // Check the INTERRUPT and ERROR bit of BMIS
2385 // Max transfer number of sectors for one command is 65536(32Mbyte),
2386 // it will cost 1 second to transfer these data in UDMA mode 2(33.3MBps).
2387 // So set the variable Count to 2000, for about 2 second timeout time.
2388 //
2389 Count = 2000;
2390 while (TRUE) {
2391
2392 IdeDev->PciIo->Io.Read (
2393 IdeDev->PciIo,
2394 EfiPciIoWidthUint8,
2395 EFI_PCI_IO_PASS_THROUGH_BAR,
2396 IoPortForBmis,
2397 1,
2398 &RegisterValue
2399 );
2400 if ((RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) || (Count == 0)) {
2401 if ((RegisterValue & BMIS_ERROR) || (Count == 0)) {
2402 //
2403 // Clear START bit of BMIC register before return EFI_DEVICE_ERROR
2404 //
2405 IdeDev->PciIo->Io.Read (
2406 IdeDev->PciIo,
2407 EfiPciIoWidthUint8,
2408 EFI_PCI_IO_PASS_THROUGH_BAR,
2409 IoPortForBmic,
2410 1,
2411 &RegisterValue
2412 );
2413
2414 RegisterValue &= ~((UINT8)BMIC_START);
2415
2416 IdeDev->PciIo->Io.Write (
2417 IdeDev->PciIo,
2418 EfiPciIoWidthUint8,
2419 EFI_PCI_IO_PASS_THROUGH_BAR,
2420 IoPortForBmic,
2421 1,
2422 &RegisterValue
2423 );
2424 IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);
2425 IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
2426 return EFI_DEVICE_ERROR;
2427 }
2428 break;
2429 }
2430
2431 gBS->Stall (1000);
2432 Count --;
2433 }
2434
2435 IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);
2436 IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
2437 //
2438 // Read Status Register of IDE device to clear interrupt
2439 //
2440 RegisterValue = IDEReadPortB(IdeDev->PciIo,IdeDev->IoPort->Reg.Status);
2441 //
2442 // Clear START bit of BMIC register
2443 //
2444 IdeDev->PciIo->Io.Read (
2445 IdeDev->PciIo,
2446 EfiPciIoWidthUint8,
2447 EFI_PCI_IO_PASS_THROUGH_BAR,
2448 IoPortForBmic,
2449 1,
2450 &RegisterValue
2451 );
2452
2453 RegisterValue &= ~((UINT8) BMIC_START);
2454
2455 IdeDev->PciIo->Io.Write (
2456 IdeDev->PciIo,
2457 EfiPciIoWidthUint8,
2458 EFI_PCI_IO_PASS_THROUGH_BAR,
2459 IoPortForBmic,
2460 1,
2461 &RegisterValue
2462 );
2463
2464 if (RegisterValue & BMIS_ERROR) {
2465 return EFI_DEVICE_ERROR;
2466 }
2467
2468 DataBuffer = (UINT8 *) DataBuffer + NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;
2469 StartLba += NumberOfBlocks;
2470 }
2471
2472 //
2473 // Disable interrupt of Select device
2474 //
2475 IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl);
2476 DeviceControl |= IEN_L;
2477 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
2478
2479 return EFI_SUCCESS;
2480 }
2481
2482 /**
2483 This function is called by the AtaBlkIoReadBlocks() to perform
2484 reading from media in block unit. The function has been enhanced to
2485 support >120GB access and transfer at most 65536 blocks per command
2486
2487 @param[in] *IdeDev
2488 pointer pointing to IDE_BLK_IO_DEV data structure, used
2489 to record all the information of the IDE device.
2490
2491 @param[in] *DataBuffer A pointer to the destination buffer for the data.
2492 @param[in] StartLba The starting logical block address to read from
2493 on the device media.
2494 @param[in] NumberOfBlocks The number of transfer data blocks.
2495
2496 @return The device status of UDMA operation. If the operation is
2497 successful, return EFI_SUCCESS.
2498
2499 TODO: EFI_UNSUPPORTED - add return value to function comment
2500 TODO: EFI_DEVICE_ERROR - add return value to function comment
2501 TODO: EFI_DEVICE_ERROR - add return value to function comment
2502 TODO: EFI_DEVICE_ERROR - add return value to function comment
2503 **/
2504 EFI_STATUS
2505 AtaUdmaRead (
2506 IN IDE_BLK_IO_DEV *IdeDev,
2507 IN VOID *DataBuffer,
2508 IN EFI_LBA StartLba,
2509 IN UINTN NumberOfBlocks
2510 )
2511 {
2512 IDE_DMA_PRD *PrdAddr;
2513 IDE_DMA_PRD *UsedPrdAddr;
2514 IDE_DMA_PRD *TempPrdAddr;
2515 UINT8 RegisterValue;
2516 UINT8 Device;
2517 UINT64 IoPortForBmic;
2518 UINT64 IoPortForBmis;
2519 UINT64 IoPortForBmid;
2520 EFI_STATUS Status;
2521 UINTN PrdTableNum;
2522 UINTN ByteCount;
2523 UINTN ByteAvailable;
2524 UINT8 *PrdBuffer;
2525 UINTN RemainBlockNum;
2526 UINT8 DeviceControl;
2527 UINT32 Count;
2528 UINTN PageCount;
2529 VOID *Map;
2530 VOID *MemPage;
2531 EFI_PHYSICAL_ADDRESS DeviceAddress;
2532
2533 //
2534 // Channel and device differential
2535 //
2536 Device = (UINT8) ((IdeDev->Device << 4) | 0xe0);
2537
2538 //
2539 // Enable interrupt to support UDMA and Select device
2540 //
2541 DeviceControl = 0;
2542 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
2543
2544 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Head, Device);
2545
2546 if (IdePrimary == IdeDev->Channel) {
2547 IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICP_OFFSET;
2548 IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISP_OFFSET;
2549 IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDP_OFFSET;
2550 } else {
2551 if (IdeSecondary == IdeDev->Channel) {
2552 IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICS_OFFSET;
2553 IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISS_OFFSET;
2554 IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDS_OFFSET;
2555 } else {
2556 return EFI_UNSUPPORTED;
2557 }
2558 }
2559
2560 RemainBlockNum = NumberOfBlocks;
2561 while (RemainBlockNum > 0) {
2562
2563 if (RemainBlockNum >= MAX_DMA_COMMAND_SECTORS) {
2564 //
2565 // SectorCount is used to record the number of sectors to be read
2566 // Max 256 sectors can be transfered at a time.
2567 //
2568 NumberOfBlocks = MAX_DMA_COMMAND_SECTORS;
2569 RemainBlockNum -= MAX_DMA_COMMAND_SECTORS;
2570 } else {
2571 NumberOfBlocks = (UINT16) RemainBlockNum;
2572 RemainBlockNum = 0;
2573 }
2574
2575 //
2576 // Calculate the number of PRD table to make sure the memory region
2577 // not cross 64K boundary
2578 //
2579 ByteCount = NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;
2580 PrdTableNum = ((ByteCount >> 16) + 1) + 1;
2581
2582 //
2583 // Build PRD table
2584 //
2585 PageCount = EFI_SIZE_TO_PAGES (2 * PrdTableNum * sizeof (IDE_DMA_PRD));
2586 Status = IdeDev->PciIo->AllocateBuffer (
2587 IdeDev->PciIo,
2588 AllocateAnyPages,
2589 EfiBootServicesData,
2590 PageCount,
2591 &MemPage,
2592 0
2593 );
2594 if (EFI_ERROR (Status)) {
2595 return EFI_OUT_OF_RESOURCES;
2596 }
2597 ZeroMem ((VOID *) ((UINTN) MemPage), EFI_PAGES_TO_SIZE (PageCount));
2598
2599 PrdAddr = (IDE_DMA_PRD *) ((UINTN) MemPage);
2600 //
2601 // To make sure PRD is allocated in one 64K page
2602 //
2603 if (((UINTN) PrdAddr & 0x0FFFF) > (((UINTN) PrdAddr + PrdTableNum * sizeof (IDE_DMA_PRD) - 1) & 0x0FFFF)) {
2604 UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x10000) & 0xFFFF0000);
2605 } else {
2606 if ((UINTN) PrdAddr & 0x03) {
2607 UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x04) & 0xFFFFFFFC);
2608 } else {
2609 UsedPrdAddr = PrdAddr;
2610 }
2611 }
2612
2613 //
2614 // Build the PRD table
2615 //
2616 Status = IdeDev->PciIo->Map (
2617 IdeDev->PciIo,
2618 EfiPciIoOperationBusMasterWrite,
2619 DataBuffer,
2620 &ByteCount,
2621 &DeviceAddress,
2622 &Map
2623 );
2624 if (EFI_ERROR (Status)) {
2625 IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);
2626 return EFI_OUT_OF_RESOURCES;
2627 }
2628 PrdBuffer = (UINT8 *) ((UINTN) DeviceAddress);
2629 TempPrdAddr = UsedPrdAddr;
2630 while (TRUE) {
2631
2632 ByteAvailable = 0x10000 - ((UINTN) PrdBuffer & 0xFFFF);
2633
2634 if (ByteCount <= ByteAvailable) {
2635 TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);
2636 TempPrdAddr->ByteCount = (UINT16) ByteCount;
2637 TempPrdAddr->EndOfTable = 0x8000;
2638 break;
2639 }
2640
2641 TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);
2642 TempPrdAddr->ByteCount = (UINT16) ByteAvailable;
2643
2644 ByteCount -= ByteAvailable;
2645 PrdBuffer += ByteAvailable;
2646 TempPrdAddr++;
2647 }
2648
2649 //
2650 // Set the base address to BMID register
2651 //
2652 IdeDev->PciIo->Io.Write (
2653 IdeDev->PciIo,
2654 EfiPciIoWidthUint32,
2655 EFI_PCI_IO_PASS_THROUGH_BAR,
2656 IoPortForBmid,
2657 1,
2658 &UsedPrdAddr
2659 );
2660
2661 //
2662 // Set BMIC register to identify the operation direction
2663 //
2664 IdeDev->PciIo->Io.Read (
2665 IdeDev->PciIo,
2666 EfiPciIoWidthUint8,
2667 EFI_PCI_IO_PASS_THROUGH_BAR,
2668 IoPortForBmic,
2669 1,
2670 &RegisterValue
2671 );
2672
2673 RegisterValue |= BMIC_nREAD;
2674
2675 IdeDev->PciIo->Io.Write (
2676 IdeDev->PciIo,
2677 EfiPciIoWidthUint8,
2678 EFI_PCI_IO_PASS_THROUGH_BAR,
2679 IoPortForBmic,
2680 1,
2681 &RegisterValue
2682 );
2683
2684 //
2685 // Read BMIS register and clear ERROR and INTR bit
2686 //
2687 IdeDev->PciIo->Io.Read (
2688 IdeDev->PciIo,
2689 EfiPciIoWidthUint8,
2690 EFI_PCI_IO_PASS_THROUGH_BAR,
2691 IoPortForBmis,
2692 1,
2693 &RegisterValue
2694 );
2695
2696 RegisterValue |= (BMIS_INTERRUPT | BMIS_ERROR);
2697
2698 IdeDev->PciIo->Io.Write (
2699 IdeDev->PciIo,
2700 EfiPciIoWidthUint8,
2701 EFI_PCI_IO_PASS_THROUGH_BAR,
2702 IoPortForBmis,
2703 1,
2704 &RegisterValue
2705 );
2706
2707 //
2708 // Issue READ DMA command
2709 //
2710 Status = AtaCommandIssue (
2711 IdeDev,
2712 READ_DMA_CMD,
2713 Device,
2714 0,
2715 (UINT16) NumberOfBlocks,
2716 StartLba
2717 );
2718 if (EFI_ERROR (Status)) {
2719 IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);
2720 IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
2721 return EFI_DEVICE_ERROR;
2722 }
2723
2724 //
2725 // Set START bit of BMIC register
2726 //
2727 IdeDev->PciIo->Io.Read (
2728 IdeDev->PciIo,
2729 EfiPciIoWidthUint8,
2730 EFI_PCI_IO_PASS_THROUGH_BAR,
2731 IoPortForBmic,
2732 1,
2733 &RegisterValue
2734 );
2735
2736 RegisterValue |= BMIC_START;
2737
2738 IdeDev->PciIo->Io.Write (
2739 IdeDev->PciIo,
2740 EfiPciIoWidthUint8,
2741 EFI_PCI_IO_PASS_THROUGH_BAR,
2742 IoPortForBmic,
2743 1,
2744 &RegisterValue
2745 );
2746
2747 //
2748 // Check the INTERRUPT and ERROR bit of BMIS
2749 // Max transfer number of sectors for one command is 65536(32Mbyte),
2750 // it will cost 1 second to transfer these data in UDMA mode 2(33.3MBps).
2751 // So set the variable Count to 2000, for about 2 second timeout time.
2752 //
2753 Count = 2000;
2754 while (TRUE) {
2755
2756 IdeDev->PciIo->Io.Read (
2757 IdeDev->PciIo,
2758 EfiPciIoWidthUint8,
2759 EFI_PCI_IO_PASS_THROUGH_BAR,
2760 IoPortForBmis,
2761 1,
2762 &RegisterValue
2763 );
2764 if ((RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) || (Count == 0)) {
2765 if ((RegisterValue & BMIS_ERROR) || (Count == 0)) {
2766 //
2767 // Clear START bit of BMIC register before return EFI_DEVICE_ERROR
2768 //
2769 IdeDev->PciIo->Io.Read (
2770 IdeDev->PciIo,
2771 EfiPciIoWidthUint8,
2772 EFI_PCI_IO_PASS_THROUGH_BAR,
2773 IoPortForBmic,
2774 1,
2775 &RegisterValue
2776 );
2777
2778 RegisterValue &= ~((UINT8)BMIC_START);
2779
2780 IdeDev->PciIo->Io.Write (
2781 IdeDev->PciIo,
2782 EfiPciIoWidthUint8,
2783 EFI_PCI_IO_PASS_THROUGH_BAR,
2784 IoPortForBmic,
2785 1,
2786 &RegisterValue
2787 );
2788 IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);
2789 IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
2790 return EFI_DEVICE_ERROR;
2791 }
2792 break;
2793 }
2794
2795 gBS->Stall (1000);
2796 Count --;
2797 }
2798
2799 IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);
2800 IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
2801 //
2802 // Read Status Register of IDE device to clear interrupt
2803 //
2804 RegisterValue = IDEReadPortB(IdeDev->PciIo,IdeDev->IoPort->Reg.Status);
2805 //
2806 // Clear START bit of BMIC register
2807 //
2808 IdeDev->PciIo->Io.Read (
2809 IdeDev->PciIo,
2810 EfiPciIoWidthUint8,
2811 EFI_PCI_IO_PASS_THROUGH_BAR,
2812 IoPortForBmic,
2813 1,
2814 &RegisterValue
2815 );
2816
2817 RegisterValue &= ~((UINT8) BMIC_START);
2818
2819 IdeDev->PciIo->Io.Write (
2820 IdeDev->PciIo,
2821 EfiPciIoWidthUint8,
2822 EFI_PCI_IO_PASS_THROUGH_BAR,
2823 IoPortForBmic,
2824 1,
2825 &RegisterValue
2826 );
2827
2828 if (RegisterValue & BMIS_ERROR) {
2829 return EFI_DEVICE_ERROR;
2830 }
2831
2832 DataBuffer = (UINT8 *) DataBuffer + NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;
2833 StartLba += NumberOfBlocks;
2834 }
2835
2836 //
2837 // Disable interrupt of Select device
2838 //
2839 IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl);
2840 DeviceControl |= IEN_L;
2841 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
2842
2843 return EFI_SUCCESS;
2844 }
2845
2846 /**
2847 This function is called by the AtaBlkIoWriteBlocks() to perform
2848 writing to media in block unit. The function has been enhanced to
2849 support >120GB access and transfer at most 65536 blocks per command
2850
2851 @param[in] *IdeDev pointer pointing to IDE_BLK_IO_DEV data structure, used
2852 to record all the information of the IDE device.
2853
2854 @param[in] *DataBuffer A pointer to the source buffer for the data.
2855
2856 @param[in] StartLba The starting logical block address to write to
2857 on the device media.
2858
2859 @param[in] NumberOfBlocks The number of transfer data blocks.
2860
2861 @return The device status of UDMA operation. If the operation is
2862 successful, return EFI_SUCCESS.
2863
2864 TODO: EFI_UNSUPPORTED - add return value to function comment
2865 TODO: EFI_DEVICE_ERROR - add return value to function comment
2866 TODO: EFI_DEVICE_ERROR - add return value to function comment
2867 **/
2868 EFI_STATUS
2869 AtaUdmaWriteExt (
2870 IN IDE_BLK_IO_DEV *IdeDev,
2871 IN VOID *DataBuffer,
2872 IN EFI_LBA StartLba,
2873 IN UINTN NumberOfBlocks
2874 )
2875 {
2876 IDE_DMA_PRD *PrdAddr;
2877 IDE_DMA_PRD *UsedPrdAddr;
2878 IDE_DMA_PRD *TempPrdAddr;
2879 UINT8 RegisterValue;
2880 UINT8 Device;
2881 UINT64 IoPortForBmic;
2882 UINT64 IoPortForBmis;
2883 UINT64 IoPortForBmid;
2884 EFI_STATUS Status;
2885 UINTN PrdTableNum;
2886 UINTN ByteCount;
2887 UINTN ByteAvailable;
2888 UINT8 *PrdBuffer;
2889 UINTN RemainBlockNum;
2890 UINT8 DeviceControl;
2891 UINT32 Count;
2892 UINTN PageCount;
2893 VOID *Map;
2894 VOID *MemPage;
2895 EFI_PHYSICAL_ADDRESS DeviceAddress;
2896
2897 //
2898 // Channel and device differential
2899 //
2900 Device = (UINT8) ((IdeDev->Device << 4) | 0xe0);
2901
2902 //
2903 // Enable interrupt to support UDMA and Select device
2904 //
2905 DeviceControl = 0;
2906 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
2907
2908 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Head, Device);
2909
2910 if (IdePrimary == IdeDev->Channel) {
2911 IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICP_OFFSET;
2912 IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISP_OFFSET;
2913 IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDP_OFFSET;
2914 } else {
2915 if (IdeSecondary == IdeDev->Channel) {
2916 IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICS_OFFSET;
2917 IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISS_OFFSET;
2918 IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDS_OFFSET;
2919 } else {
2920 return EFI_UNSUPPORTED;
2921 }
2922 }
2923
2924 RemainBlockNum = NumberOfBlocks;
2925 while (RemainBlockNum > 0) {
2926
2927 if (RemainBlockNum >= MAX_DMA_EXT_COMMAND_SECTORS) {
2928 //
2929 // SectorCount is used to record the number of sectors to be read
2930 // Max 65536 sectors can be transfered at a time.
2931 //
2932 NumberOfBlocks = MAX_DMA_EXT_COMMAND_SECTORS;
2933 RemainBlockNum -= MAX_DMA_EXT_COMMAND_SECTORS;
2934 } else {
2935 NumberOfBlocks = (UINT16) RemainBlockNum;
2936 RemainBlockNum = 0;
2937 }
2938
2939 //
2940 // Calculate the number of PRD table to make sure the memory region
2941 // not cross 64K boundary
2942 //
2943 ByteCount = NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;
2944 PrdTableNum = ((ByteCount >> 16) + 1) + 1;
2945
2946 //
2947 // Build PRD table
2948 //
2949 PageCount = EFI_SIZE_TO_PAGES (2 * PrdTableNum * sizeof (IDE_DMA_PRD));
2950 Status = IdeDev->PciIo->AllocateBuffer (
2951 IdeDev->PciIo,
2952 AllocateAnyPages,
2953 EfiBootServicesData,
2954 PageCount,
2955 &MemPage,
2956 0
2957 );
2958 if (EFI_ERROR (Status)) {
2959 return EFI_OUT_OF_RESOURCES;
2960 }
2961 ZeroMem ((VOID *) ((UINTN) MemPage), EFI_PAGES_TO_SIZE (PageCount));
2962
2963 PrdAddr = (IDE_DMA_PRD *) ((UINTN) MemPage);
2964 //
2965 // To make sure PRD is allocated in one 64K page
2966 //
2967 if (((UINTN) PrdAddr & 0x0FFFF) > (((UINTN) PrdAddr + PrdTableNum * sizeof (IDE_DMA_PRD) - 1) & 0x0FFFF)) {
2968 UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x10000) & 0xFFFF0000);
2969 } else {
2970 if ((UINTN) PrdAddr & 0x03) {
2971 UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x04) & 0xFFFFFFFC);
2972 } else {
2973 UsedPrdAddr = PrdAddr;
2974 }
2975 }
2976
2977 //
2978 // Build the PRD table
2979 //
2980 Status = IdeDev->PciIo->Map (
2981 IdeDev->PciIo,
2982 EfiPciIoOperationBusMasterRead,
2983 DataBuffer,
2984 &ByteCount,
2985 &DeviceAddress,
2986 &Map
2987 );
2988 if (EFI_ERROR (Status)) {
2989 IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);
2990 return EFI_OUT_OF_RESOURCES;
2991 }
2992 PrdBuffer = (UINT8 *) ((UINTN) DeviceAddress);
2993 TempPrdAddr = UsedPrdAddr;
2994 while (TRUE) {
2995
2996 ByteAvailable = 0x10000 - ((UINTN) PrdBuffer & 0xFFFF);
2997
2998 if (ByteCount <= ByteAvailable) {
2999 TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);
3000 TempPrdAddr->ByteCount = (UINT16) ByteCount;
3001 TempPrdAddr->EndOfTable = 0x8000;
3002 break;
3003 }
3004
3005 TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);
3006 TempPrdAddr->ByteCount = (UINT16) ByteAvailable;
3007
3008 ByteCount -= ByteAvailable;
3009 PrdBuffer += ByteAvailable;
3010 TempPrdAddr++;
3011 }
3012
3013 //
3014 // Set the base address to BMID register
3015 //
3016 IdeDev->PciIo->Io.Write (
3017 IdeDev->PciIo,
3018 EfiPciIoWidthUint32,
3019 EFI_PCI_IO_PASS_THROUGH_BAR,
3020 IoPortForBmid,
3021 1,
3022 &UsedPrdAddr
3023 );
3024
3025 //
3026 // Set BMIC register to identify the operation direction
3027 //
3028 IdeDev->PciIo->Io.Read (
3029 IdeDev->PciIo,
3030 EfiPciIoWidthUint8,
3031 EFI_PCI_IO_PASS_THROUGH_BAR,
3032 IoPortForBmic,
3033 1,
3034 &RegisterValue
3035 );
3036 //
3037 // 0000 1000
3038 //
3039 RegisterValue &= ~((UINT8) BMIC_nREAD);
3040
3041 IdeDev->PciIo->Io.Write (
3042 IdeDev->PciIo,
3043 EfiPciIoWidthUint8,
3044 EFI_PCI_IO_PASS_THROUGH_BAR,
3045 IoPortForBmic,
3046 1,
3047 &RegisterValue
3048 );
3049
3050 //
3051 // Read BMIS register and clear ERROR and INTR bit
3052 //
3053 IdeDev->PciIo->Io.Read (
3054 IdeDev->PciIo,
3055 EfiPciIoWidthUint8,
3056 EFI_PCI_IO_PASS_THROUGH_BAR,
3057 IoPortForBmis,
3058 1,
3059 &RegisterValue
3060 );
3061
3062 RegisterValue |= (BMIS_INTERRUPT | BMIS_ERROR);
3063
3064 IdeDev->PciIo->Io.Write (
3065 IdeDev->PciIo,
3066 EfiPciIoWidthUint8,
3067 EFI_PCI_IO_PASS_THROUGH_BAR,
3068 IoPortForBmis,
3069 1,
3070 &RegisterValue
3071 );
3072
3073 //
3074 // Issue WRITE DMA EXT command
3075 //
3076 Status = AtaCommandIssueExt (
3077 IdeDev,
3078 WRITE_DMA_EXT_CMD,
3079 Device,
3080 0,
3081 (UINT16) NumberOfBlocks,
3082 StartLba
3083 );
3084 if (EFI_ERROR (Status)) {
3085 IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);
3086 IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
3087 return EFI_DEVICE_ERROR;
3088 }
3089
3090 //
3091 // Set START bit of BMIC register
3092 //
3093 IdeDev->PciIo->Io.Read (
3094 IdeDev->PciIo,
3095 EfiPciIoWidthUint8,
3096 EFI_PCI_IO_PASS_THROUGH_BAR,
3097 IoPortForBmic,
3098 1,
3099 &RegisterValue
3100 );
3101
3102 RegisterValue |= BMIC_START;
3103
3104 IdeDev->PciIo->Io.Write (
3105 IdeDev->PciIo,
3106 EfiPciIoWidthUint8,
3107 EFI_PCI_IO_PASS_THROUGH_BAR,
3108 IoPortForBmic,
3109 1,
3110 &RegisterValue
3111 );
3112
3113 //
3114 // Check the INTERRUPT and ERROR bit of BMIS
3115 // Max transfer number of sectors for one command is 65536(32Mbyte),
3116 // it will cost 1 second to transfer these data in UDMA mode 2(33.3MBps).
3117 // So set the variable Count to 2000, for about 2 second timeout time.
3118 //
3119 Count = 2000;
3120 while (TRUE) {
3121
3122 IdeDev->PciIo->Io.Read (
3123 IdeDev->PciIo,
3124 EfiPciIoWidthUint8,
3125 EFI_PCI_IO_PASS_THROUGH_BAR,
3126 IoPortForBmis,
3127 1,
3128 &RegisterValue
3129 );
3130 if ((RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) || (Count == 0)) {
3131 if ((RegisterValue & BMIS_ERROR) || (Count == 0)) {
3132 //
3133 // Clear START bit of BMIC register before return EFI_DEVICE_ERROR
3134 //
3135 IdeDev->PciIo->Io.Read (
3136 IdeDev->PciIo,
3137 EfiPciIoWidthUint8,
3138 EFI_PCI_IO_PASS_THROUGH_BAR,
3139 IoPortForBmic,
3140 1,
3141 &RegisterValue
3142 );
3143
3144 RegisterValue &= ~((UINT8)BMIC_START);
3145
3146 IdeDev->PciIo->Io.Write (
3147 IdeDev->PciIo,
3148 EfiPciIoWidthUint8,
3149 EFI_PCI_IO_PASS_THROUGH_BAR,
3150 IoPortForBmic,
3151 1,
3152 &RegisterValue
3153 );
3154 IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);
3155 IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
3156 return EFI_DEVICE_ERROR;
3157 }
3158 break;
3159 }
3160
3161 gBS->Stall (1000);
3162 Count --;
3163 }
3164
3165 IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);
3166 IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
3167 //
3168 // Read Status Register of IDE device to clear interrupt
3169 //
3170 RegisterValue = IDEReadPortB(IdeDev->PciIo,IdeDev->IoPort->Reg.Status);
3171 //
3172 // Clear START bit of BMIC register
3173 //
3174 IdeDev->PciIo->Io.Read (
3175 IdeDev->PciIo,
3176 EfiPciIoWidthUint8,
3177 EFI_PCI_IO_PASS_THROUGH_BAR,
3178 IoPortForBmic,
3179 1,
3180 &RegisterValue
3181 );
3182
3183 RegisterValue &= ~((UINT8) BMIC_START);
3184
3185 IdeDev->PciIo->Io.Write (
3186 IdeDev->PciIo,
3187 EfiPciIoWidthUint8,
3188 EFI_PCI_IO_PASS_THROUGH_BAR,
3189 IoPortForBmic,
3190 1,
3191 &RegisterValue
3192 );
3193
3194 DataBuffer = (UINT8 *) DataBuffer + NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;
3195 StartLba += NumberOfBlocks;
3196 }
3197
3198 //
3199 // Disable interrupt of Select device
3200 //
3201 IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl);
3202 DeviceControl |= IEN_L;
3203 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
3204
3205 return EFI_SUCCESS;
3206 }
3207
3208 /**
3209 This function is called by the AtaBlkIoWriteBlocks() to perform
3210 writing to media in block unit. The function has been enhanced to
3211 support >120GB access and transfer at most 65536 blocks per command
3212
3213 @param[in] *IdeDev
3214 pointer pointing to IDE_BLK_IO_DEV data structure, used
3215 to record all the information of the IDE device.
3216
3217 @param[in] *DataBuffer
3218 A pointer to the source buffer for the data.
3219
3220 @param[in] StartLba
3221 The starting logical block address to write to
3222 on the device media.
3223
3224 @param[in] NumberOfBlocks
3225 The number of transfer data blocks.
3226
3227 @return The device status of UDMA operation. If the operation is
3228 successful, return EFI_SUCCESS.
3229
3230 TODO: EFI_UNSUPPORTED - add return value to function comment
3231 TODO: EFI_DEVICE_ERROR - add return value to function comment
3232 TODO: EFI_DEVICE_ERROR - add return value to function comment
3233 **/
3234 EFI_STATUS
3235 AtaUdmaWrite (
3236 IN IDE_BLK_IO_DEV *IdeDev,
3237 IN VOID *DataBuffer,
3238 IN EFI_LBA StartLba,
3239 IN UINTN NumberOfBlocks
3240 )
3241 {
3242 IDE_DMA_PRD *PrdAddr;
3243 IDE_DMA_PRD *UsedPrdAddr;
3244 IDE_DMA_PRD *TempPrdAddr;
3245 UINT8 RegisterValue;
3246 UINT8 Device;
3247 UINT64 IoPortForBmic;
3248 UINT64 IoPortForBmis;
3249 UINT64 IoPortForBmid;
3250 EFI_STATUS Status;
3251 UINTN PrdTableNum;
3252 UINTN ByteCount;
3253 UINTN ByteAvailable;
3254 UINT8 *PrdBuffer;
3255 UINTN RemainBlockNum;
3256 UINT8 DeviceControl;
3257 UINT32 Count;
3258 UINTN PageCount;
3259 VOID *Map;
3260 VOID *MemPage;
3261 EFI_PHYSICAL_ADDRESS DeviceAddress;
3262
3263 //
3264 // Channel and device differential
3265 //
3266 Device = (UINT8) ((IdeDev->Device << 4) | 0xe0);
3267
3268 //
3269 // Enable interrupt to support UDMA
3270 //
3271 DeviceControl = 0;
3272 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
3273
3274 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Head, Device);
3275
3276 if (IdePrimary == IdeDev->Channel) {
3277 IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICP_OFFSET;
3278 IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISP_OFFSET;
3279 IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDP_OFFSET;
3280 } else {
3281 if (IdeSecondary == IdeDev->Channel) {
3282 IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICS_OFFSET;
3283 IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISS_OFFSET;
3284 IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDS_OFFSET;
3285 } else {
3286 return EFI_UNSUPPORTED;
3287 }
3288 }
3289
3290 RemainBlockNum = NumberOfBlocks;
3291 while (RemainBlockNum > 0) {
3292
3293 if (RemainBlockNum >= MAX_DMA_COMMAND_SECTORS) {
3294 //
3295 // SectorCount is used to record the number of sectors to be read
3296 // Max 256 sectors can be transfered at a time.
3297 //
3298 NumberOfBlocks = MAX_DMA_COMMAND_SECTORS;
3299 RemainBlockNum -= MAX_DMA_COMMAND_SECTORS;
3300 } else {
3301 NumberOfBlocks = (UINT16) RemainBlockNum;
3302 RemainBlockNum = 0;
3303 }
3304
3305 //
3306 // Calculate the number of PRD table to make sure the memory region
3307 // not cross 64K boundary
3308 //
3309 ByteCount = NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;
3310 PrdTableNum = ((ByteCount >> 16) + 1) + 1;
3311
3312 //
3313 // Build PRD table
3314 //
3315 PageCount = EFI_SIZE_TO_PAGES (2 * PrdTableNum * sizeof (IDE_DMA_PRD));
3316 Status = IdeDev->PciIo->AllocateBuffer (
3317 IdeDev->PciIo,
3318 AllocateAnyPages,
3319 EfiBootServicesData,
3320 PageCount,
3321 &MemPage,
3322 0
3323 );
3324 if (EFI_ERROR (Status)) {
3325 return EFI_OUT_OF_RESOURCES;
3326 }
3327 ZeroMem ((VOID *) ((UINTN) MemPage), EFI_PAGES_TO_SIZE (PageCount));
3328
3329 PrdAddr = (IDE_DMA_PRD *) ((UINTN) MemPage);
3330
3331 //
3332 // To make sure PRD is allocated in one 64K page
3333 //
3334 if (((UINTN) PrdAddr & 0x0FFFF) > (((UINTN) PrdAddr + PrdTableNum * sizeof (IDE_DMA_PRD) - 1) & 0x0FFFF)) {
3335 UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x10000) & 0xFFFF0000);
3336 } else {
3337 if ((UINTN) PrdAddr & 0x03) {
3338 UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x04) & 0xFFFFFFFC);
3339 } else {
3340 UsedPrdAddr = PrdAddr;
3341 }
3342 }
3343
3344 //
3345 // Build the PRD table
3346 //
3347 Status = IdeDev->PciIo->Map (
3348 IdeDev->PciIo,
3349 EfiPciIoOperationBusMasterRead,
3350 DataBuffer,
3351 &ByteCount,
3352 &DeviceAddress,
3353 &Map
3354 );
3355 if (EFI_ERROR (Status)) {
3356 IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);
3357 return EFI_OUT_OF_RESOURCES;
3358 }
3359 PrdBuffer = (UINT8 *) ((UINTN) DeviceAddress);
3360 TempPrdAddr = UsedPrdAddr;
3361 while (TRUE) {
3362
3363 ByteAvailable = 0x10000 - ((UINTN) PrdBuffer & 0xFFFF);
3364
3365 if (ByteCount <= ByteAvailable) {
3366 TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);
3367 TempPrdAddr->ByteCount = (UINT16) ByteCount;
3368 TempPrdAddr->EndOfTable = 0x8000;
3369 break;
3370 }
3371
3372 TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);
3373 TempPrdAddr->ByteCount = (UINT16) ByteAvailable;
3374
3375 ByteCount -= ByteAvailable;
3376 PrdBuffer += ByteAvailable;
3377 TempPrdAddr++;
3378 }
3379
3380 //
3381 // Set the base address to BMID register
3382 //
3383 IdeDev->PciIo->Io.Write (
3384 IdeDev->PciIo,
3385 EfiPciIoWidthUint32,
3386 EFI_PCI_IO_PASS_THROUGH_BAR,
3387 IoPortForBmid,
3388 1,
3389 &UsedPrdAddr
3390 );
3391
3392 //
3393 // Set BMIC register to identify the operation direction
3394 //
3395 IdeDev->PciIo->Io.Read (
3396 IdeDev->PciIo,
3397 EfiPciIoWidthUint8,
3398 EFI_PCI_IO_PASS_THROUGH_BAR,
3399 IoPortForBmic,
3400 1,
3401 &RegisterValue
3402 );
3403 //
3404 // 0000 1000
3405 //
3406 RegisterValue &= ~((UINT8) BMIC_nREAD);
3407
3408 IdeDev->PciIo->Io.Write (
3409 IdeDev->PciIo,
3410 EfiPciIoWidthUint8,
3411 EFI_PCI_IO_PASS_THROUGH_BAR,
3412 IoPortForBmic,
3413 1,
3414 &RegisterValue
3415 );
3416
3417 //
3418 // Read BMIS register and clear ERROR and INTR bit
3419 //
3420 IdeDev->PciIo->Io.Read (
3421 IdeDev->PciIo,
3422 EfiPciIoWidthUint8,
3423 EFI_PCI_IO_PASS_THROUGH_BAR,
3424 IoPortForBmis,
3425 1,
3426 &RegisterValue
3427 );
3428
3429 RegisterValue |= (BMIS_INTERRUPT | BMIS_ERROR);
3430
3431 IdeDev->PciIo->Io.Write (
3432 IdeDev->PciIo,
3433 EfiPciIoWidthUint8,
3434 EFI_PCI_IO_PASS_THROUGH_BAR,
3435 IoPortForBmis,
3436 1,
3437 &RegisterValue
3438 );
3439
3440 //
3441 // Issue WRITE DMA command
3442 //
3443 Status = AtaCommandIssue (
3444 IdeDev,
3445 WRITE_DMA_CMD,
3446 Device,
3447 0,
3448 (UINT16) NumberOfBlocks,
3449 StartLba
3450 );
3451 if (EFI_ERROR (Status)) {
3452 IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);
3453 IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
3454 return EFI_DEVICE_ERROR;
3455 }
3456
3457 //
3458 // Set START bit of BMIC register
3459 //
3460 IdeDev->PciIo->Io.Read (
3461 IdeDev->PciIo,
3462 EfiPciIoWidthUint8,
3463 EFI_PCI_IO_PASS_THROUGH_BAR,
3464 IoPortForBmic,
3465 1,
3466 &RegisterValue
3467 );
3468
3469 RegisterValue |= BMIC_START;
3470
3471 IdeDev->PciIo->Io.Write (
3472 IdeDev->PciIo,
3473 EfiPciIoWidthUint8,
3474 EFI_PCI_IO_PASS_THROUGH_BAR,
3475 IoPortForBmic,
3476 1,
3477 &RegisterValue
3478 );
3479
3480 //
3481 // Check the INTERRUPT and ERROR bit of BMIS
3482 // Max transfer number of sectors for one command is 65536(32Mbyte),
3483 // it will cost 1 second to transfer these data in UDMA mode 2(33.3MBps).
3484 // So set the variable Count to 2000, for about 2 second timeout time.
3485 //
3486 Count = 2000;
3487 while (TRUE) {
3488
3489 IdeDev->PciIo->Io.Read (
3490 IdeDev->PciIo,
3491 EfiPciIoWidthUint8,
3492 EFI_PCI_IO_PASS_THROUGH_BAR,
3493 IoPortForBmis,
3494 1,
3495 &RegisterValue
3496 );
3497 if ((RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) || (Count == 0)) {
3498 if ((RegisterValue & BMIS_ERROR) || (Count == 0)) {
3499 //
3500 // Clear START bit of BMIC register before return EFI_DEVICE_ERROR
3501 //
3502 IdeDev->PciIo->Io.Read (
3503 IdeDev->PciIo,
3504 EfiPciIoWidthUint8,
3505 EFI_PCI_IO_PASS_THROUGH_BAR,
3506 IoPortForBmic,
3507 1,
3508 &RegisterValue
3509 );
3510
3511 RegisterValue &= ~((UINT8)BMIC_START);
3512
3513 IdeDev->PciIo->Io.Write (
3514 IdeDev->PciIo,
3515 EfiPciIoWidthUint8,
3516 EFI_PCI_IO_PASS_THROUGH_BAR,
3517 IoPortForBmic,
3518 1,
3519 &RegisterValue
3520 );
3521 IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);
3522 IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
3523 return EFI_DEVICE_ERROR;
3524 }
3525 break;
3526 }
3527
3528 gBS->Stall (1000);
3529 Count --;
3530 }
3531
3532 IdeDev->PciIo->FreeBuffer (IdeDev->PciIo, PageCount, MemPage);
3533 IdeDev->PciIo->Unmap (IdeDev->PciIo, Map);
3534
3535 //
3536 // Read Status Register of IDE device to clear interrupt
3537 //
3538 RegisterValue = IDEReadPortB(IdeDev->PciIo,IdeDev->IoPort->Reg.Status);
3539 //
3540 // Clear START bit of BMIC register
3541 //
3542 IdeDev->PciIo->Io.Read (
3543 IdeDev->PciIo,
3544 EfiPciIoWidthUint8,
3545 EFI_PCI_IO_PASS_THROUGH_BAR,
3546 IoPortForBmic,
3547 1,
3548 &RegisterValue
3549 );
3550
3551 RegisterValue &= ~((UINT8) BMIC_START);
3552
3553 IdeDev->PciIo->Io.Write (
3554 IdeDev->PciIo,
3555 EfiPciIoWidthUint8,
3556 EFI_PCI_IO_PASS_THROUGH_BAR,
3557 IoPortForBmic,
3558 1,
3559 &RegisterValue
3560 );
3561
3562 DataBuffer = (UINT8 *) DataBuffer + NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;
3563 StartLba += NumberOfBlocks;
3564 }
3565
3566 //
3567 // Disable interrupt of Select device
3568 //
3569 IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl);
3570 DeviceControl |= IEN_L;
3571 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
3572
3573 return EFI_SUCCESS;
3574 }
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