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1 /** @file
2 Copyright (c) 2006, Intel Corporation
3 All rights reserved. This program and the accompanying materials
4 are licensed and made available under the terms and conditions of the BSD License
5 which accompanies this distribution. The full text of the license may be found at
6 http://opensource.org/licenses/bsd-license.php
7
8 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
9 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
10
11 @par Revision Reference:
12 2002-6: Add Atapi6 enhancement, support >120GB hard disk, including
13 update - ATAIdentity() func
14 update - AtaBlockIoReadBlocks() func
15 update - AtaBlockIoWriteBlocks() func
16 add - AtaAtapi6Identify() func
17 add - AtaReadSectorsExt() func
18 add - AtaWriteSectorsExt() func
19 add - AtaPioDataInExt() func
20 add - AtaPioDataOutExt() func
21
22 **/
23
24 #include "idebus.h"
25
26
27 EFI_STATUS
28 AtaReadSectorsExt (
29 IN IDE_BLK_IO_DEV *IdeDev,
30 IN OUT VOID *DataBuffer,
31 IN EFI_LBA StartLba,
32 IN UINTN NumberOfBlocks
33 );
34
35 EFI_STATUS
36 AtaWriteSectorsExt (
37 IN IDE_BLK_IO_DEV *IdeDev,
38 IN VOID *DataBuffer,
39 IN EFI_LBA StartLba,
40 IN UINTN NumberOfBlocks
41 );
42
43 EFI_STATUS
44 AtaPioDataInExt (
45 IN IDE_BLK_IO_DEV *IdeDev,
46 IN OUT VOID *Buffer,
47 IN UINT32 ByteCount,
48 IN UINT8 AtaCommand,
49 IN EFI_LBA StartLba,
50 IN UINT16 SectorCount
51 );
52
53 EFI_STATUS
54 AtaPioDataOutExt (
55 IN IDE_BLK_IO_DEV *IdeDev,
56 IN VOID *Buffer,
57 IN UINT32 ByteCount,
58 IN UINT8 AtaCommand,
59 IN EFI_LBA StartLba,
60 IN UINT16 SectorCount
61 );
62
63 /**
64 Sends out an ATA Identify Command to the specified device.
65
66 This function is called by DiscoverIdeDevice() during its device
67 identification. It sends out the ATA Identify Command to the
68 specified device. Only ATA device responses to this command. If
69 the command succeeds, it returns the Identify data structure which
70 contains information about the device. This function extracts the
71 information it needs to fill the IDE_BLK_IO_DEV data structure,
72 including device type, media block size, media capacity, and etc.
73
74 @param[in] *IdeDev
75 pointer pointing to IDE_BLK_IO_DEV data structure,used
76 to record all the information of the IDE device.
77
78 @retval EFI_SUCCESS Identify ATA device successfully.
79
80 @retval EFI_DEVICE_ERROR ATA Identify Device Command failed or
81 device is not ATA device.
82
83 @note
84 parameter IdeDev will be updated in this function.
85
86 **/
87 EFI_STATUS
88 ATAIdentify (
89 IN IDE_BLK_IO_DEV *IdeDev
90 )
91 {
92 EFI_STATUS Status;
93 EFI_IDENTIFY_DATA *AtaIdentifyPointer;
94 UINT32 Capacity;
95 UINT8 DeviceSelect;
96
97 //
98 // AtaIdentifyPointer is used for accommodating returned IDENTIFY data of
99 // the ATA Identify command
100 //
101 AtaIdentifyPointer = (EFI_IDENTIFY_DATA *) AllocateZeroPool (sizeof (EFI_IDENTIFY_DATA));
102
103 //
104 // use ATA PIO Data In protocol to send ATA Identify command
105 // and receive data from device
106 //
107 DeviceSelect = 0;
108 DeviceSelect = (UINT8) ((IdeDev->Device) << 4);
109 Status = AtaPioDataIn (
110 IdeDev,
111 (VOID *) AtaIdentifyPointer,
112 sizeof (EFI_IDENTIFY_DATA),
113 IDENTIFY_DRIVE_CMD,
114 DeviceSelect,
115 0,
116 0,
117 0,
118 0
119 );
120 //
121 // If ATA Identify command succeeds, then according to the received
122 // IDENTIFY data,
123 // identify the device type ( ATA or not ).
124 // If ATA device, fill the information in IdeDev.
125 // If not ATA device, return IDE_DEVICE_ERROR
126 //
127 if (!EFI_ERROR (Status)) {
128
129 IdeDev->pIdData = AtaIdentifyPointer;
130
131 //
132 // Print ATA Module Name
133 //
134 PrintAtaModuleName (IdeDev);
135
136 //
137 // bit 15 of pAtaIdentify->config is used to identify whether device is
138 // ATA device or ATAPI device.
139 // if 0, means ATA device; if 1, means ATAPI device.
140 //
141 if ((AtaIdentifyPointer->AtaData.config & 0x8000) == 0x00) {
142 //
143 // Detect if support S.M.A.R.T. If yes, enable it as default
144 //
145 AtaSMARTSupport (IdeDev);
146
147 //
148 // Check whether this device needs 48-bit addressing (ATAPI-6 ata device)
149 //
150 Status = AtaAtapi6Identify (IdeDev);
151 if (!EFI_ERROR (Status)) {
152 //
153 // It's a disk with >120GB capacity, initialized in AtaAtapi6Identify()
154 //
155 return EFI_SUCCESS;
156 }
157 //
158 // This is a hard disk <= 120GB capacity, treat it as normal hard disk
159 //
160 IdeDev->Type = IdeHardDisk;
161
162 //
163 // Block Media Information:
164 // Media->LogicalPartition , Media->WriteCaching will be filled
165 // in the DiscoverIdeDevcie() function.
166 //
167 IdeDev->BlkIo.Media->IoAlign = 4;
168 IdeDev->BlkIo.Media->MediaId = 1;
169 IdeDev->BlkIo.Media->RemovableMedia = FALSE;
170 IdeDev->BlkIo.Media->MediaPresent = TRUE;
171 IdeDev->BlkIo.Media->ReadOnly = FALSE;
172 IdeDev->BlkIo.Media->BlockSize = 0x200;
173
174 //
175 // Calculate device capacity
176 //
177 Capacity = ((UINT32)AtaIdentifyPointer->AtaData.user_addressable_sectors_hi << 16) |
178 AtaIdentifyPointer->AtaData.user_addressable_sectors_lo ;
179 IdeDev->BlkIo.Media->LastBlock = Capacity - 1;
180
181 return EFI_SUCCESS;
182
183 }
184 }
185
186 gBS->FreePool (AtaIdentifyPointer);
187 //
188 // Make sure the pIdData will not be freed again.
189 //
190 IdeDev->pIdData = NULL;
191
192 return EFI_DEVICE_ERROR;
193 }
194
195
196 /**
197 This function is called by ATAIdentify() to identity whether this disk
198 supports ATA/ATAPI6 48bit addressing, ie support >120G capacity
199
200 @param[in] *IdeDev
201 pointer pointing to IDE_BLK_IO_DEV data structure, used
202 to record all the information of the IDE device.
203
204 @retval EFI_SUCCESS The disk specified by IdeDev is a Atapi6 supported one
205 and 48-bit addressing must be used
206
207 @retval EFI_UNSUPPORTED The disk dosn't not support Atapi6 or it supports but
208 the capacity is below 120G, 48bit addressing is not
209 needed
210
211 @note
212 This function must be called after DEVICE_IDENTITY command has been
213 successfully returned
214
215 **/
216 EFI_STATUS
217 AtaAtapi6Identify (
218 IN IDE_BLK_IO_DEV *IdeDev
219 )
220 {
221 UINT8 Index;
222 EFI_LBA TmpLba;
223 EFI_LBA Capacity;
224 EFI_IDENTIFY_DATA *Atapi6IdentifyStruct;
225
226 if (IdeDev->pIdData == NULL) {
227 return EFI_UNSUPPORTED;
228 }
229
230 Atapi6IdentifyStruct = IdeDev->pIdData;
231
232 if ((Atapi6IdentifyStruct->AtapiData.cmd_set_support_83 & bit10) == 0) {
233 //
234 // The device dosn't support 48 bit addressing
235 //
236 return EFI_UNSUPPORTED;
237 }
238
239 //
240 // 48 bit address feature set is supported, get maximum capacity
241 //
242 Capacity = Atapi6IdentifyStruct->AtapiData.max_user_lba_for_48bit_addr[0];
243 for (Index = 1; Index < 4; Index++) {
244 //
245 // Lower byte goes first: word[100] is the lowest word, word[103] is highest
246 //
247 TmpLba = Atapi6IdentifyStruct->AtapiData.max_user_lba_for_48bit_addr[Index];
248 Capacity |= LShiftU64 (TmpLba, 16 * Index);
249 }
250
251 if (Capacity > MAX_28BIT_ADDRESSING_CAPACITY) {
252 //
253 // Capacity exceeds 120GB. 48-bit addressing is really needed
254 //
255 IdeDev->Type = Ide48bitAddressingHardDisk;
256
257 //
258 // Fill block media information:Media->LogicalPartition ,
259 // Media->WriteCaching will be filledin the DiscoverIdeDevcie() function.
260 //
261 IdeDev->BlkIo.Media->IoAlign = 4;
262 IdeDev->BlkIo.Media->MediaId = 1;
263 IdeDev->BlkIo.Media->RemovableMedia = FALSE;
264 IdeDev->BlkIo.Media->MediaPresent = TRUE;
265 IdeDev->BlkIo.Media->ReadOnly = FALSE;
266 IdeDev->BlkIo.Media->BlockSize = 0x200;
267 IdeDev->BlkIo.Media->LastBlock = Capacity - 1;
268
269 return EFI_SUCCESS;
270 }
271
272 return EFI_UNSUPPORTED;
273 }
274
275 /**
276 This function is called by ATAIdentify() or ATAPIIdentify()
277 to print device's module name.
278
279 @param[in] *IdeDev
280 pointer pointing to IDE_BLK_IO_DEV data structure, used
281 to record all the information of the IDE device.
282
283 **/
284 VOID
285 PrintAtaModuleName (
286 IN IDE_BLK_IO_DEV *IdeDev
287 )
288 {
289 if (IdeDev->pIdData == NULL) {
290 return ;
291 }
292
293 SwapStringChars (IdeDev->ModelName, IdeDev->pIdData->AtaData.ModelName, 40);
294 IdeDev->ModelName[40] = 0x00;
295 }
296
297 /**
298 This function is used to send out ATA commands conforms to the
299 PIO Data In Protocol.
300
301 @param[in] *IdeDev
302 pointer pointing to IDE_BLK_IO_DEV data structure, used
303 to record all the information of the IDE device.
304
305 @param[in] *Buffer
306 buffer contained data transferred from device to host.
307
308 @param[in] ByteCount
309 data size in byte unit of the buffer.
310
311 @param[in] AtaCommand
312 value of the Command Register
313
314 @param[in] Head
315 value of the Head/Device Register
316
317 @param[in] SectorCount
318 value of the Sector Count Register
319
320 @param[in] SectorNumber
321 value of the Sector Number Register
322
323 @param[in] CylinderLsb
324 value of the low byte of the Cylinder Register
325
326 @param[in] CylinderMsb
327 value of the high byte of the Cylinder Register
328
329 @retval EFI_SUCCESS send out the ATA command and device send required
330 data successfully.
331
332 @retval EFI_DEVICE_ERROR command sent failed.
333
334 **/
335 EFI_STATUS
336 AtaPioDataIn (
337 IN IDE_BLK_IO_DEV *IdeDev,
338 IN VOID *Buffer,
339 IN UINT32 ByteCount,
340 IN UINT8 AtaCommand,
341 IN UINT8 Head,
342 IN UINT8 SectorCount,
343 IN UINT8 SectorNumber,
344 IN UINT8 CylinderLsb,
345 IN UINT8 CylinderMsb
346 )
347 {
348 UINTN WordCount;
349 UINTN Increment;
350 UINT16 *Buffer16;
351 EFI_STATUS Status;
352
353 Status = WaitForBSYClear (IdeDev, ATATIMEOUT);
354 if (EFI_ERROR (Status)) {
355 return EFI_DEVICE_ERROR;
356 }
357
358 //
359 // e0:1110,0000-- bit7 and bit5 are reserved bits.
360 // bit6 set means LBA mode
361 //
362 IDEWritePortB (
363 IdeDev->PciIo,
364 IdeDev->IoPort->Head,
365 (UINT8) ((IdeDev->Device << 4) | 0xe0 | Head)
366 );
367
368 //
369 // All ATAPI device's ATA commands can be issued regardless of the
370 // state of the DRDY
371 //
372 if (IdeDev->Type == IdeHardDisk) {
373
374 Status = DRDYReady (IdeDev, ATATIMEOUT);
375 if (EFI_ERROR (Status)) {
376 return EFI_DEVICE_ERROR;
377 }
378 }
379 //
380 // set all the command parameters
381 // Before write to all the following registers, BSY and DRQ must be 0.
382 //
383 Status = DRQClear2 (IdeDev, ATATIMEOUT);
384 if (EFI_ERROR (Status)) {
385 return EFI_DEVICE_ERROR;
386 }
387
388 if (AtaCommand == SET_FEATURES_CMD) {
389 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, 0x03);
390 }
391
392 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount);
393 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, SectorNumber);
394 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, CylinderLsb);
395 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, CylinderMsb);
396
397 //
398 // send command via Command Register
399 //
400 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, AtaCommand);
401
402 Buffer16 = (UINT16 *) Buffer;
403
404 //
405 // According to PIO data in protocol, host can perform a series of reads to
406 // the data register after each time device set DRQ ready;
407 // The data size of "a series of read" is command specific.
408 // For most ATA command, data size received from device will not exceed
409 // 1 sector, hence the data size for "a series of read" can be the whole data
410 // size of one command request.
411 // For ATA command such as Read Sector command, the data size of one ATA
412 // command request is often larger than 1 sector, according to the
413 // Read Sector command, the data size of "a series of read" is exactly 1
414 // sector.
415 // Here for simplification reason, we specify the data size for
416 // "a series of read" to 1 sector (256 words) if data size of one ATA command
417 // request is larger than 256 words.
418 //
419 Increment = 256;
420
421 //
422 // used to record bytes of currently transfered data
423 //
424 WordCount = 0;
425
426 while (WordCount < ByteCount / 2) {
427 //
428 // Poll DRQ bit set, data transfer can be performed only when DRQ is ready.
429 //
430 Status = DRQReady2 (IdeDev, ATATIMEOUT);
431 if (EFI_ERROR (Status)) {
432 return EFI_DEVICE_ERROR;
433 }
434
435 Status = CheckErrorStatus (IdeDev);
436 if (EFI_ERROR (Status)) {
437 return EFI_DEVICE_ERROR;
438 }
439
440 //
441 // Get the byte count for one series of read
442 //
443 if ((WordCount + Increment) > ByteCount / 2) {
444 Increment = ByteCount / 2 - WordCount;
445 }
446
447 IDEReadPortWMultiple (
448 IdeDev->PciIo,
449 IdeDev->IoPort->Data,
450 Increment,
451 Buffer16
452 );
453
454 WordCount += Increment;
455 Buffer16 += Increment;
456
457 }
458
459 DRQClear (IdeDev, ATATIMEOUT);
460
461 return CheckErrorStatus (IdeDev);
462 }
463
464 /**
465 This function is used to send out ATA commands conforms to the
466 PIO Data Out Protocol.
467
468 @param *IdeDev
469 pointer pointing to IDE_BLK_IO_DEV data structure, used
470 to record all the information of the IDE device.
471
472 @param *Buffer buffer contained data transferred from host to device.
473 @param ByteCount data size in byte unit of the buffer.
474 @param AtaCommand value of the Command Register
475 @param Head value of the Head/Device Register
476 @param SectorCount value of the Sector Count Register
477 @param SectorNumber value of the Sector Number Register
478 @param CylinderLsb value of the low byte of the Cylinder Register
479 @param CylinderMsb value of the high byte of the Cylinder Register
480
481 @retval EFI_SUCCESS send out the ATA command and device received required
482 data successfully.
483
484 @retval EFI_DEVICE_ERROR command sent failed.
485
486 **/
487 EFI_STATUS
488 AtaPioDataOut (
489 IN IDE_BLK_IO_DEV *IdeDev,
490 IN VOID *Buffer,
491 IN UINT32 ByteCount,
492 IN UINT8 AtaCommand,
493 IN UINT8 Head,
494 IN UINT8 SectorCount,
495 IN UINT8 SectorNumber,
496 IN UINT8 CylinderLsb,
497 IN UINT8 CylinderMsb
498 )
499 {
500 UINTN WordCount;
501 UINTN Increment;
502 UINT16 *Buffer16;
503 EFI_STATUS Status;
504
505 Status = WaitForBSYClear (IdeDev, ATATIMEOUT);
506 if (EFI_ERROR (Status)) {
507 return EFI_DEVICE_ERROR;
508 }
509
510 //
511 // select device via Head/Device register.
512 // Before write Head/Device register, BSY and DRQ must be 0.
513 //
514 Status = DRQClear2 (IdeDev, ATATIMEOUT);
515 if (EFI_ERROR (Status)) {
516 return EFI_DEVICE_ERROR;
517 }
518
519 //
520 // e0:1110,0000-- bit7 and bit5 are reserved bits.
521 // bit6 set means LBA mode
522 //
523 IDEWritePortB (
524 IdeDev->PciIo,
525 IdeDev->IoPort->Head,
526 (UINT8) ((IdeDev->Device << 4) | 0xe0 | Head)
527 );
528
529 Status = DRDYReady (IdeDev, ATATIMEOUT);
530 if (EFI_ERROR (Status)) {
531 return EFI_DEVICE_ERROR;
532 }
533
534 //
535 // set all the command parameters
536 // Before write to all the following registers, BSY and DRQ must be 0.
537 //
538 Status = DRQClear2 (IdeDev, ATATIMEOUT);
539 if (EFI_ERROR (Status)) {
540 return EFI_DEVICE_ERROR;
541 }
542
543 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount);
544 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, SectorNumber);
545 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, CylinderLsb);
546 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, CylinderMsb);
547
548 //
549 // send command via Command Register
550 //
551 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, AtaCommand);
552
553 Buffer16 = (UINT16 *) Buffer;
554
555 //
556 // According to PIO data out protocol, host can perform a series of
557 // writes to the data register after each time device set DRQ ready;
558 // The data size of "a series of read" is command specific.
559 // For most ATA command, data size written to device will not exceed 1 sector,
560 // hence the data size for "a series of write" can be the data size of one
561 // command request.
562 // For ATA command such as Write Sector command, the data size of one
563 // ATA command request is often larger than 1 sector, according to the
564 // Write Sector command, the data size of "a series of read" is exactly
565 // 1 sector.
566 // Here for simplification reason, we specify the data size for
567 // "a series of write" to 1 sector (256 words) if data size of one ATA command
568 // request is larger than 256 words.
569 //
570 Increment = 256;
571 WordCount = 0;
572
573 while (WordCount < ByteCount / 2) {
574
575 //
576 // DRQReady2-- read Alternate Status Register to determine the DRQ bit
577 // data transfer can be performed only when DRQ is ready.
578 //
579 Status = DRQReady2 (IdeDev, ATATIMEOUT);
580 if (EFI_ERROR (Status)) {
581 return EFI_DEVICE_ERROR;
582 }
583
584 Status = CheckErrorStatus (IdeDev);
585 if (EFI_ERROR (Status)) {
586 return EFI_DEVICE_ERROR;
587 }
588
589 //
590 // Check the remaining byte count is less than 512 bytes
591 //
592 if ((WordCount + Increment) > ByteCount / 2) {
593 Increment = ByteCount / 2 - WordCount;
594 }
595 //
596 // perform a series of write without check DRQ ready
597 //
598
599 IDEWritePortWMultiple (
600 IdeDev->PciIo,
601 IdeDev->IoPort->Data,
602 Increment,
603 Buffer16
604 );
605 WordCount += Increment;
606 Buffer16 += Increment;
607
608 }
609
610 DRQClear (IdeDev, ATATIMEOUT);
611
612 return CheckErrorStatus (IdeDev);
613 }
614
615 /**
616 This function is used to analyze the Status Register and print out
617 some debug information and if there is ERR bit set in the Status
618 Register, the Error Register's value is also be parsed and print out.
619
620 @param[in] *IdeDev
621 pointer pointing to IDE_BLK_IO_DEV data structure, used
622 to record all the information of the IDE device.
623
624 @retval EFI_SUCCESS No err information in the Status Register.
625 @retval EFI_DEVICE_ERROR Any err information in the Status Register.
626
627 **/
628 EFI_STATUS
629 CheckErrorStatus (
630 IN IDE_BLK_IO_DEV *IdeDev
631 )
632 {
633 UINT8 StatusRegister;
634
635 //#ifdef EFI_DEBUG
636
637 UINT8 ErrorRegister;
638
639 //#endif
640
641 StatusRegister = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Status);
642
643 DEBUG_CODE (
644
645 if (StatusRegister & DWF) {
646 DEBUG (
647 (EFI_D_BLKIO,
648 "CheckErrorStatus()-- %02x : Error : Write Fault\n",
649 StatusRegister)
650 );
651 }
652
653 if (StatusRegister & CORR) {
654 DEBUG (
655 (EFI_D_BLKIO,
656 "CheckErrorStatus()-- %02x : Error : Corrected Data\n",
657 StatusRegister)
658 );
659 }
660
661 if (StatusRegister & ERR) {
662 ErrorRegister = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Error);
663
664 if (ErrorRegister & BBK_ERR) {
665 DEBUG (
666 (EFI_D_BLKIO,
667 "CheckErrorStatus()-- %02x : Error : Bad Block Detected\n",
668 ErrorRegister)
669 );
670 }
671
672 if (ErrorRegister & UNC_ERR) {
673 DEBUG (
674 (EFI_D_BLKIO,
675 "CheckErrorStatus()-- %02x : Error : Uncorrectable Data\n",
676 ErrorRegister)
677 );
678 }
679
680 if (ErrorRegister & MC_ERR) {
681 DEBUG (
682 (EFI_D_BLKIO,
683 "CheckErrorStatus()-- %02x : Error : Media Change\n",
684 ErrorRegister)
685 );
686 }
687
688 if (ErrorRegister & ABRT_ERR) {
689 DEBUG (
690 (EFI_D_BLKIO,
691 "CheckErrorStatus()-- %02x : Error : Abort\n",
692 ErrorRegister)
693 );
694 }
695
696 if (ErrorRegister & TK0NF_ERR) {
697 DEBUG (
698 (EFI_D_BLKIO,
699 "CheckErrorStatus()-- %02x : Error : Track 0 Not Found\n",
700 ErrorRegister)
701 );
702 }
703
704 if (ErrorRegister & AMNF_ERR) {
705 DEBUG (
706 (EFI_D_BLKIO,
707 "CheckErrorStatus()-- %02x : Error : Address Mark Not Found\n",
708 ErrorRegister)
709 );
710 }
711
712 }
713 );
714
715 if ((StatusRegister & (ERR | DWF | CORR)) == 0) {
716 return EFI_SUCCESS;
717 }
718
719 return EFI_DEVICE_ERROR;
720
721 }
722
723 /**
724 This function is called by the AtaBlkIoReadBlocks() to perform
725 reading from media in block unit.
726
727 @param[in] *IdeDev
728 pointer pointing to IDE_BLK_IO_DEV data structure, used
729 to record all the information of the IDE device.
730
731 @param[in] *DataBuffer
732 A pointer to the destination buffer for the data.
733
734 @param[in] Lba
735 The starting logical block address to read from
736 on the device media.
737
738 @param[in] NumberOfBlocks
739 The number of transfer data blocks.
740
741 @return return status is fully dependent on the return status
742 of AtaPioDataIn() function.
743
744 **/
745 EFI_STATUS
746 AtaReadSectors (
747 IN IDE_BLK_IO_DEV *IdeDev,
748 IN VOID *DataBuffer,
749 IN EFI_LBA Lba,
750 IN UINTN NumberOfBlocks
751 )
752 {
753 EFI_STATUS Status;
754 UINTN BlocksRemaining;
755 UINT32 Lba32;
756 UINT8 Lba0;
757 UINT8 Lba1;
758 UINT8 Lba2;
759 UINT8 Lba3;
760 UINT8 AtaCommand;
761 UINT8 SectorCount8;
762 UINT16 SectorCount;
763 UINTN ByteCount;
764 VOID *Buffer;
765
766 Buffer = DataBuffer;
767
768 //
769 // Using ATA Read Sector(s) command (opcode=0x20) with PIO DATA IN protocol
770 //
771 AtaCommand = READ_SECTORS_CMD;
772
773
774 BlocksRemaining = NumberOfBlocks;
775
776 Lba32 = (UINT32) Lba;
777
778 Status = EFI_SUCCESS;
779
780 while (BlocksRemaining > 0) {
781
782 //
783 // in ATA-3 spec, LBA is in 28 bit width
784 //
785 Lba0 = (UINT8) Lba32;
786 Lba1 = (UINT8) (Lba32 >> 8);
787 Lba2 = (UINT8) (Lba32 >> 16);
788 //
789 // low 4 bit of Lba3 stands for LBA bit24~bit27.
790 //
791 Lba3 = (UINT8) ((Lba32 >> 24) & 0x0f);
792
793 if (BlocksRemaining >= 0x100) {
794
795 //
796 // SectorCount8 is sent to Sector Count register, 0x00 means 256
797 // sectors to be read
798 //
799 SectorCount8 = 0x00;
800 //
801 // SectorCount is used to record the number of sectors to be read
802 //
803 SectorCount = 256;
804 } else {
805
806 SectorCount8 = (UINT8) BlocksRemaining;
807 SectorCount = (UINT16) BlocksRemaining;
808 }
809
810 //
811 // ByteCount is the number of bytes that will be read
812 //
813 ByteCount = SectorCount * (IdeDev->BlkIo.Media->BlockSize);
814
815 //
816 // call AtaPioDataIn() to send Read Sector Command and receive data read
817 //
818 Status = AtaPioDataIn (
819 IdeDev,
820 Buffer,
821 (UINT32) ByteCount,
822 AtaCommand,
823 Lba3,
824 SectorCount8,
825 Lba0,
826 Lba1,
827 Lba2
828 );
829 if (EFI_ERROR (Status)) {
830 return Status;
831 }
832
833 Lba32 += SectorCount;
834 Buffer = ((UINT8 *) Buffer + ByteCount);
835 BlocksRemaining -= SectorCount;
836 }
837
838 return Status;
839 }
840
841 /**
842 This function is called by the AtaBlkIoWriteBlocks() to perform
843 writing onto media in block unit.
844
845 @param[in] *IdeDev
846 pointer pointing to IDE_BLK_IO_DEV data structure,used
847 to record all the information of the IDE device.
848
849 @param[in] *BufferData
850 A pointer to the source buffer for the data.
851
852 @param[in] Lba
853 The starting logical block address to write onto
854 the device media.
855
856 @param[in] NumberOfBlocks
857 The number of transfer data blocks.
858
859 @return return status is fully dependent on the return status
860 of AtaPioDataOut() function.
861
862 **/
863 EFI_STATUS
864 AtaWriteSectors (
865 IN IDE_BLK_IO_DEV *IdeDev,
866 IN VOID *BufferData,
867 IN EFI_LBA Lba,
868 IN UINTN NumberOfBlocks
869 )
870 {
871 EFI_STATUS Status;
872 UINTN BlocksRemaining;
873 UINT32 Lba32;
874 UINT8 Lba0;
875 UINT8 Lba1;
876 UINT8 Lba2;
877 UINT8 Lba3;
878 UINT8 AtaCommand;
879 UINT8 SectorCount8;
880 UINT16 SectorCount;
881 UINTN ByteCount;
882 VOID *Buffer;
883
884 Buffer = BufferData;
885
886 //
887 // Using Write Sector(s) command (opcode=0x30) with PIO DATA OUT protocol
888 //
889 AtaCommand = WRITE_SECTORS_CMD;
890
891 BlocksRemaining = NumberOfBlocks;
892
893 Lba32 = (UINT32) Lba;
894
895 Status = EFI_SUCCESS;
896
897 while (BlocksRemaining > 0) {
898
899 Lba0 = (UINT8) Lba32;
900 Lba1 = (UINT8) (Lba32 >> 8);
901 Lba2 = (UINT8) (Lba32 >> 16);
902 Lba3 = (UINT8) ((Lba32 >> 24) & 0x0f);
903
904 if (BlocksRemaining >= 0x100) {
905
906 //
907 // SectorCount8 is sent to Sector Count register, 0x00 means 256 sectors
908 // to be written
909 //
910 SectorCount8 = 0x00;
911 //
912 // SectorCount is used to record the number of sectors to be written
913 //
914 SectorCount = 256;
915 } else {
916
917 SectorCount8 = (UINT8) BlocksRemaining;
918 SectorCount = (UINT16) BlocksRemaining;
919 }
920
921 ByteCount = SectorCount * (IdeDev->BlkIo.Media->BlockSize);
922
923 Status = AtaPioDataOut (
924 IdeDev,
925 Buffer,
926 (UINT32) ByteCount,
927 AtaCommand,
928 Lba3,
929 SectorCount8,
930 Lba0,
931 Lba1,
932 Lba2
933 );
934 if (EFI_ERROR (Status)) {
935 return Status;
936 }
937
938 Lba32 += SectorCount;
939 Buffer = ((UINT8 *) Buffer + ByteCount);
940 BlocksRemaining -= SectorCount;
941 }
942
943 return Status;
944 }
945
946 /**
947 This function is used to implement the Soft Reset on the specified
948 device. But, the ATA Soft Reset mechanism is so strong a reset method
949 that it will force resetting on both devices connected to the
950 same cable.
951
952 It is called by IdeBlkIoReset(), a interface function of Block
953 I/O protocol.
954
955 This function can also be used by the ATAPI device to perform reset when
956 ATAPI Reset command is failed.
957
958 @param[in] *IdeDev
959 pointer pointing to IDE_BLK_IO_DEV data structure, used
960 to record all the information of the IDE device.
961
962 @retval EFI_SUCCESS Soft reset completes successfully.
963 @retval EFI_DEVICE_ERROR Any step during the reset process is failed.
964
965 @note
966 The registers initial values after ATA soft reset are different
967 to the ATA device and ATAPI device.
968
969 **/
970 EFI_STATUS
971 AtaSoftReset (
972 IN IDE_BLK_IO_DEV *IdeDev
973 )
974 {
975
976 UINT8 DeviceControl;
977
978 DeviceControl = 0;
979 //
980 // set SRST bit to initiate soft reset
981 //
982 DeviceControl |= SRST;
983
984 //
985 // disable Interrupt
986 //
987 DeviceControl |= bit1;
988
989 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
990
991 gBS->Stall (10);
992
993 //
994 // Enable interrupt to support UDMA, and clear SRST bit
995 //
996 DeviceControl = 0;
997 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
998
999 //
1000 // slave device needs at most 31s to clear BSY
1001 //
1002 if (WaitForBSYClear (IdeDev, 31000) == EFI_TIMEOUT) {
1003 return EFI_DEVICE_ERROR;
1004 }
1005
1006 return EFI_SUCCESS;
1007 }
1008
1009 /**
1010 This function is the ATA implementation for ReadBlocks in the
1011 Block I/O Protocol interface.
1012
1013 @param[in] *IdeBlkIoDevice
1014 Indicates the calling context.
1015
1016 @param[in] MediaId
1017 The media id that the read request is for.
1018
1019 @param[in] LBA
1020 The starting logical block address to read from
1021 on the device.
1022
1023 @param[in] BufferSize
1024 The size of the Buffer in bytes. This must be a
1025 multiple of the intrinsic block size of the device.
1026
1027 @param[out] *Buffer
1028 A pointer to the destination buffer for the data.
1029 The caller is responsible for either having implicit
1030 or explicit ownership of the memory that data is read into.
1031
1032 @retval EFI_SUCCESS Read Blocks successfully.
1033 @retval EFI_DEVICE_ERROR Read Blocks failed.
1034 @retval EFI_NO_MEDIA There is no media in the device.
1035 @retval EFI_MEDIA_CHANGE The MediaId is not for the current media.
1036
1037 @retval EFI_BAD_BUFFER_SIZE
1038 The BufferSize parameter is not a multiple of the
1039 intrinsic block size of the device.
1040
1041 @retval EFI_INVALID_PARAMETER
1042 The read request contains LBAs that are not valid,
1043 or the data buffer is not valid.
1044
1045 @note
1046 If Read Block error because of device error, this function will call
1047 AtaSoftReset() function to reset device.
1048
1049 **/
1050 EFI_STATUS
1051 AtaBlkIoReadBlocks (
1052 IN IDE_BLK_IO_DEV *IdeBlkIoDevice,
1053 IN UINT32 MediaId,
1054 IN EFI_LBA LBA,
1055 IN UINTN BufferSize,
1056 OUT VOID *Buffer
1057 )
1058 {
1059 EFI_BLOCK_IO_MEDIA *Media;
1060 UINTN BlockSize;
1061 UINTN NumberOfBlocks;
1062 EFI_STATUS Status;
1063
1064 if (Buffer == NULL) {
1065 return EFI_INVALID_PARAMETER;
1066 }
1067
1068 if (BufferSize == 0) {
1069 return EFI_SUCCESS;
1070 }
1071
1072 Status = EFI_SUCCESS;
1073
1074 //
1075 // Get the intrinsic block size
1076 //
1077 Media = IdeBlkIoDevice->BlkIo.Media;
1078 BlockSize = Media->BlockSize;
1079
1080 NumberOfBlocks = BufferSize / BlockSize;
1081
1082 if (MediaId != Media->MediaId) {
1083 return EFI_MEDIA_CHANGED;
1084 }
1085
1086 if (BufferSize % BlockSize != 0) {
1087 return EFI_BAD_BUFFER_SIZE;
1088 }
1089
1090 if (!(Media->MediaPresent)) {
1091 return EFI_NO_MEDIA;
1092 }
1093
1094 if (LBA > Media->LastBlock) {
1095 return EFI_INVALID_PARAMETER;
1096 }
1097
1098 if ((LBA + NumberOfBlocks - 1) > Media->LastBlock) {
1099 return EFI_INVALID_PARAMETER;
1100 }
1101
1102 if ((Media->IoAlign > 1) && (((UINTN) Buffer & (Media->IoAlign - 1)) != 0)) {
1103 return EFI_INVALID_PARAMETER;
1104 }
1105
1106 if (IdeBlkIoDevice->Type == Ide48bitAddressingHardDisk) {
1107 //
1108 // For ATA/ATAPI-6 device(capcity > 120GB), use ATA-6 read block mechanism
1109 //
1110 Status = AtaUdmaReadExt (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
1111 if (EFI_ERROR (Status)) {
1112 Status = AtaReadSectorsExt (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
1113 }
1114 } else {
1115 //
1116 // For ATA-3 compatible device, use ATA-3 read block mechanism
1117 // Notice DMA operation can only handle 32bit address
1118 //
1119 if ((UINTN) Buffer <= 0xFFFFFFFF) {
1120 Status = AtaUdmaRead (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
1121 }
1122
1123 if (EFI_ERROR (Status) || ((UINTN) Buffer > 0xFFFFFFFF)) {
1124 Status = AtaReadSectors (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
1125 }
1126 }
1127
1128 if (EFI_ERROR (Status)) {
1129 AtaSoftReset (IdeBlkIoDevice);
1130 return EFI_DEVICE_ERROR;
1131 }
1132
1133 return EFI_SUCCESS;
1134
1135 }
1136
1137 /**
1138 This function is the ATA implementation for WriteBlocks in the
1139 Block I/O Protocol interface.
1140
1141 @param[in] *IdeBlkIoDevice
1142 Indicates the calling context.
1143
1144 @param[in] MediaId
1145 The media id that the write request is for.
1146
1147 @param[in] LBA
1148 The starting logical block address to write onto
1149 the device.
1150
1151 @param[in] BufferSize
1152 The size of the Buffer in bytes. This must be a
1153 multiple of the intrinsic block size of the device.
1154
1155 @param[out] *Buffer
1156 A pointer to the source buffer for the data.
1157 The caller is responsible for either having implicit
1158 or explicit ownership of the memory that data is
1159 written from.
1160
1161 @retval EFI_SUCCESS Write Blocks successfully.
1162 @retval EFI_DEVICE_ERROR Write Blocks failed.
1163 @retval EFI_NO_MEDIA There is no media in the device.
1164 @retval EFI_MEDIA_CHANGE The MediaId is not for the current media.
1165
1166 @retval EFI_BAD_BUFFER_SIZE
1167 The BufferSize parameter is not a multiple of the
1168 intrinsic block size of the device.
1169
1170 @retval EFI_INVALID_PARAMETER
1171 The write request contains LBAs that are not valid,
1172 or the data buffer is not valid.
1173
1174 @note
1175 If Write Block error because of device error, this function will call
1176 AtaSoftReset() function to reset device.
1177
1178 **/
1179 EFI_STATUS
1180 AtaBlkIoWriteBlocks (
1181 IN IDE_BLK_IO_DEV *IdeBlkIoDevice,
1182 IN UINT32 MediaId,
1183 IN EFI_LBA LBA,
1184 IN UINTN BufferSize,
1185 OUT VOID *Buffer
1186 )
1187 {
1188
1189 EFI_BLOCK_IO_MEDIA *Media;
1190 UINTN BlockSize;
1191 UINTN NumberOfBlocks;
1192 EFI_STATUS Status;
1193
1194 if (Buffer == NULL) {
1195 return EFI_INVALID_PARAMETER;
1196 }
1197
1198 if (BufferSize == 0) {
1199 return EFI_SUCCESS;
1200 }
1201
1202 Status = EFI_SUCCESS;
1203
1204 //
1205 // Get the intrinsic block size
1206 //
1207 Media = IdeBlkIoDevice->BlkIo.Media;
1208 BlockSize = Media->BlockSize;
1209 NumberOfBlocks = BufferSize / BlockSize;
1210
1211 if (MediaId != Media->MediaId) {
1212 return EFI_MEDIA_CHANGED;
1213 }
1214
1215 if (BufferSize % BlockSize != 0) {
1216 return EFI_BAD_BUFFER_SIZE;
1217 }
1218
1219 if (LBA > Media->LastBlock) {
1220 return EFI_INVALID_PARAMETER;
1221 }
1222
1223 if ((LBA + NumberOfBlocks - 1) > Media->LastBlock) {
1224 return EFI_INVALID_PARAMETER;
1225 }
1226
1227 if ((Media->IoAlign > 1) && (((UINTN) Buffer & (Media->IoAlign - 1)) != 0)) {
1228 return EFI_INVALID_PARAMETER;
1229 }
1230
1231 if (IdeBlkIoDevice->Type == Ide48bitAddressingHardDisk) {
1232 //
1233 // For ATA/ATAPI-6 device(capcity > 120GB), use ATA-6 write block mechanism
1234 //
1235 Status = AtaUdmaWriteExt (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
1236 if (EFI_ERROR (Status)) {
1237 Status = AtaWriteSectorsExt (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
1238 }
1239 } else {
1240 //
1241 // For ATA-3 compatible device, use ATA-3 write block mechanism
1242 //
1243 Status = AtaUdmaWrite (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
1244 if (EFI_ERROR (Status) || ((UINTN) Buffer > 0xFFFFFFFF)) {
1245 Status = AtaWriteSectors (IdeBlkIoDevice, Buffer, LBA, NumberOfBlocks);
1246 }
1247 }
1248
1249 if (EFI_ERROR (Status)) {
1250 AtaSoftReset (IdeBlkIoDevice);
1251 return EFI_DEVICE_ERROR;
1252 }
1253
1254 return EFI_SUCCESS;
1255 }
1256
1257 /**
1258 This function is called by the AtaBlkIoReadBlocks() to perform
1259 reading from media in block unit. The function has been enhanced to
1260 support >120GB access and transfer at most 65536 blocks per command
1261
1262 @param[in] *IdeDev
1263 pointer pointing to IDE_BLK_IO_DEV data structure, used
1264 to record all the information of the IDE device.
1265
1266 @param[in] *DataBuffer A pointer to the destination buffer for the data.
1267 @param[in] StartLba The starting logical block address to read from
1268 on the device media.
1269 @param[in] NumberOfBlocks The number of transfer data blocks.
1270
1271 @return return status is fully dependent on the return status
1272 of AtaPioDataInExt() function.
1273
1274 **/
1275 EFI_STATUS
1276 AtaReadSectorsExt (
1277 IN IDE_BLK_IO_DEV *IdeDev,
1278 IN VOID *DataBuffer,
1279 IN EFI_LBA StartLba,
1280 IN UINTN NumberOfBlocks
1281 )
1282 {
1283 EFI_STATUS Status;
1284 UINTN BlocksRemaining;
1285 EFI_LBA Lba64;
1286 UINT8 AtaCommand;
1287 UINT16 SectorCount;
1288 UINT32 ByteCount;
1289 VOID *Buffer;
1290
1291 //
1292 // Using ATA "Read Sectors Ext" command(opcode=0x24) with PIO DATA IN protocol
1293 //
1294 AtaCommand = READ_SECTORS_EXT_CMD;
1295 Buffer = DataBuffer;
1296 BlocksRemaining = NumberOfBlocks;
1297 Lba64 = StartLba;
1298 Status = EFI_SUCCESS;
1299
1300 while (BlocksRemaining > 0) {
1301
1302 if (BlocksRemaining >= 0x10000) {
1303 //
1304 // SectorCount is used to record the number of sectors to be read
1305 // Max 65536 sectors can be transfered at a time.
1306 //
1307 SectorCount = 0xffff;
1308 } else {
1309 SectorCount = (UINT16) BlocksRemaining;
1310 }
1311
1312 //
1313 // ByteCount is the number of bytes that will be read
1314 //
1315 ByteCount = SectorCount * (IdeDev->BlkIo.Media->BlockSize);
1316
1317 //
1318 // call AtaPioDataInExt() to send Read Sector Command and receive data read
1319 //
1320 Status = AtaPioDataInExt (
1321 IdeDev,
1322 Buffer,
1323 ByteCount,
1324 AtaCommand,
1325 Lba64,
1326 SectorCount
1327 );
1328 if (EFI_ERROR (Status)) {
1329 return Status;
1330 }
1331
1332 Lba64 += SectorCount;
1333 Buffer = ((UINT8 *) Buffer + ByteCount);
1334 BlocksRemaining -= SectorCount;
1335 }
1336
1337 return Status;
1338 }
1339
1340 /**
1341 This function is called by the AtaBlkIoWriteBlocks() to perform
1342 writing onto media in block unit. The function has been enhanced to
1343 support >120GB access and transfer at most 65536 blocks per command
1344
1345 @param[in] *IdeDev
1346 pointer pointing to IDE_BLK_IO_DEV data structure,used
1347 to record all the information of the IDE device.
1348
1349 @param[in] *DataBuffer
1350 A pointer to the source buffer for the data.
1351
1352 @param[in] Lba
1353 The starting logical block address to write onto
1354 the device media.
1355
1356 @param[in] NumberOfBlocks
1357 The number of transfer data blocks.
1358
1359 @return status is fully dependent on the return status
1360 of AtaPioDataOutExt() function.
1361
1362 **/
1363 EFI_STATUS
1364 AtaWriteSectorsExt (
1365 IN IDE_BLK_IO_DEV *IdeDev,
1366 IN VOID *DataBuffer,
1367 IN EFI_LBA StartLba,
1368 IN UINTN NumberOfBlocks
1369 )
1370 {
1371 EFI_STATUS Status;
1372 EFI_LBA Lba64;
1373 UINTN BlocksRemaining;
1374 UINT8 AtaCommand;
1375 UINT16 SectorCount;
1376 UINT32 ByteCount;
1377 VOID *Buffer;
1378
1379 //
1380 // Using ATA "Write Sectors Ext" cmd(opcode=0x24) with PIO DATA OUT protocol
1381 //
1382 AtaCommand = WRITE_SECTORS_EXT_CMD;
1383 Lba64 = StartLba;
1384 Buffer = DataBuffer;
1385 BlocksRemaining = NumberOfBlocks;
1386
1387 Status = EFI_SUCCESS;
1388
1389 while (BlocksRemaining > 0) {
1390
1391 if (BlocksRemaining >= 0x10000) {
1392 //
1393 // SectorCount is used to record the number of sectors to be written.
1394 // Max 65536 sectors can be transfered at a time.
1395 //
1396 SectorCount = 0xffff;
1397 } else {
1398 SectorCount = (UINT16) BlocksRemaining;
1399 }
1400
1401 //
1402 // ByteCount is the number of bytes that will be written
1403 //
1404 ByteCount = SectorCount * (IdeDev->BlkIo.Media->BlockSize);
1405
1406 //
1407 // Call AtaPioDataOutExt() to send "Write Sectors Ext" Command
1408 //
1409 Status = AtaPioDataOutExt (
1410 IdeDev,
1411 Buffer,
1412 ByteCount,
1413 AtaCommand,
1414 Lba64,
1415 SectorCount
1416 );
1417 if (EFI_ERROR (Status)) {
1418 return Status;
1419 }
1420
1421 Lba64 += SectorCount;
1422 Buffer = ((UINT8 *) Buffer + ByteCount);
1423 BlocksRemaining -= SectorCount;
1424 }
1425
1426 return Status;
1427 }
1428
1429 /**
1430 This function is used to send out ATA commands conforms to the
1431 PIO Data In Protocol, supporting ATA/ATAPI-6 standard
1432
1433 Comparing with ATA-3 data in protocol, we have two differents here:<BR>
1434 1. Do NOT wait for DRQ clear before sending command into IDE device.(the
1435 wait will frequently fail... cause writing function return error)
1436
1437 2. Do NOT wait for DRQ clear after all data readed.(the wait greatly
1438 slow down writing performance by 100 times!)
1439
1440 @param[in] *IdeDev pointer pointing to IDE_BLK_IO_DEV data structure, used
1441 to record all the information of the IDE device.
1442
1443 @param[in,out] *Buffer buffer contained data transferred from device to host.
1444 @param[in] ByteCount data size in byte unit of the buffer.
1445 @param[in] AtaCommand value of the Command Register
1446 @param[in] StartLba the start LBA of this transaction
1447 @param[in] SectorCount the count of sectors to be transfered
1448
1449 @retval EFI_SUCCESS send out the ATA command and device send required
1450 data successfully.
1451
1452 @retval EFI_DEVICE_ERROR command sent failed.
1453
1454 **/
1455 EFI_STATUS
1456 AtaPioDataInExt (
1457 IN IDE_BLK_IO_DEV *IdeDev,
1458 IN OUT VOID *Buffer,
1459 IN UINT32 ByteCount,
1460 IN UINT8 AtaCommand,
1461 IN EFI_LBA StartLba,
1462 IN UINT16 SectorCount
1463 )
1464 {
1465 UINT8 DevSel;
1466 UINT8 SectorCount8;
1467 UINT8 LbaLow;
1468 UINT8 LbaMid;
1469 UINT8 LbaHigh;
1470 UINTN WordCount;
1471 UINTN Increment;
1472 UINT16 *Buffer16;
1473 EFI_STATUS Status;
1474
1475 Status = WaitForBSYClear (IdeDev, ATATIMEOUT);
1476 if (EFI_ERROR (Status)) {
1477 return EFI_DEVICE_ERROR;
1478 }
1479
1480 //
1481 // Select device, set bit6 as 1 to indicate LBA mode is used
1482 //
1483 DevSel = (UINT8) (IdeDev->Device << 4);
1484 DevSel |= 0x40;
1485 IDEWritePortB (
1486 IdeDev->PciIo,
1487 IdeDev->IoPort->Head,
1488 DevSel
1489 );
1490
1491 //
1492 // Wait for DRDY singnal asserting. ATAPI device needn't wait
1493 //
1494 if ( (IdeDev->Type == IdeHardDisk) ||
1495 (IdeDev->Type == Ide48bitAddressingHardDisk)) {
1496
1497 Status = DRDYReady (IdeDev, ATATIMEOUT);
1498 if (EFI_ERROR (Status)) {
1499 return EFI_DEVICE_ERROR;
1500 }
1501 }
1502
1503 //
1504 // Fill feature register if needed
1505 //
1506 if (AtaCommand == SET_FEATURES_CMD) {
1507 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, 0x03);
1508 }
1509
1510 //
1511 // Fill the sector count register, which is a two-byte FIFO. Need write twice.
1512 //
1513 SectorCount8 = (UINT8) (SectorCount >> 8);
1514 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);
1515
1516 SectorCount8 = (UINT8) SectorCount;
1517 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);
1518
1519 //
1520 // Fill the start LBA registers, which are also two-byte FIFO
1521 //
1522 LbaLow = (UINT8) RShiftU64 (StartLba, 24);
1523 LbaMid = (UINT8) RShiftU64 (StartLba, 32);
1524 LbaHigh = (UINT8) RShiftU64 (StartLba, 40);
1525 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, LbaLow);
1526 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, LbaMid);
1527 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, LbaHigh);
1528
1529 LbaLow = (UINT8) StartLba;
1530 LbaMid = (UINT8) RShiftU64 (StartLba, 8);
1531 LbaHigh = (UINT8) RShiftU64 (StartLba, 16);
1532 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, LbaLow);
1533 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, LbaMid);
1534 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, LbaHigh);
1535
1536 //
1537 // Send command via Command Register, invoking the processing of this command
1538 //
1539 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, AtaCommand);
1540
1541 Buffer16 = (UINT16 *) Buffer;
1542
1543 //
1544 // According to PIO data in protocol, host can perform a series of reads to
1545 // the data register after each time device set DRQ ready;
1546 //
1547
1548 //
1549 // 256 words
1550 //
1551 Increment = 256;
1552
1553 //
1554 // used to record bytes of currently transfered data
1555 //
1556 WordCount = 0;
1557
1558 while (WordCount < ByteCount / 2) {
1559 //
1560 // Poll DRQ bit set, data transfer can be performed only when DRQ is ready.
1561 //
1562 Status = DRQReady2 (IdeDev, ATATIMEOUT);
1563 if (EFI_ERROR (Status)) {
1564 return EFI_DEVICE_ERROR;
1565 }
1566
1567 Status = CheckErrorStatus (IdeDev);
1568 if (EFI_ERROR (Status)) {
1569 return EFI_DEVICE_ERROR;
1570 }
1571
1572 //
1573 // Get the byte count for one series of read
1574 //
1575 if ((WordCount + Increment) > ByteCount / 2) {
1576 Increment = ByteCount / 2 - WordCount;
1577 }
1578
1579 IDEReadPortWMultiple (
1580 IdeDev->PciIo,
1581 IdeDev->IoPort->Data,
1582 Increment,
1583 Buffer16
1584 );
1585
1586 WordCount += Increment;
1587 Buffer16 += Increment;
1588
1589 }
1590
1591 return CheckErrorStatus (IdeDev);
1592 }
1593
1594 /**
1595 This function is used to send out ATA commands conforms to the
1596 PIO Data Out Protocol, supporting ATA/ATAPI-6 standard
1597
1598 Comparing with ATA-3 data out protocol, we have two differents here:<BR>
1599 1. Do NOT wait for DRQ clear before sending command into IDE device.(the
1600 wait will frequently fail... cause writing function return error)
1601
1602 2. Do NOT wait for DRQ clear after all data readed.(the wait greatly
1603 slow down writing performance by 100 times!)
1604
1605 @param[in] *IdeDev
1606 pointer pointing to IDE_BLK_IO_DEV data structure, used
1607 to record all the information of the IDE device.
1608
1609 @param[in] *Buffer buffer contained data transferred from host to device.
1610 @param[in] ByteCount data size in byte unit of the buffer.
1611 @param[in] AtaCommand value of the Command Register
1612 @param[in] StartLba the start LBA of this transaction
1613 @param[in] SectorCount the count of sectors to be transfered
1614
1615 @retval EFI_SUCCESS send out the ATA command and device receive required
1616 data successfully.
1617
1618 @retval EFI_DEVICE_ERROR command sent failed.
1619
1620 **/
1621 EFI_STATUS
1622 AtaPioDataOutExt (
1623 IN IDE_BLK_IO_DEV *IdeDev,
1624 IN VOID *Buffer,
1625 IN UINT32 ByteCount,
1626 IN UINT8 AtaCommand,
1627 IN EFI_LBA StartLba,
1628 IN UINT16 SectorCount
1629 )
1630 {
1631 UINT8 DevSel;
1632 UINT8 SectorCount8;
1633 UINT8 LbaLow;
1634 UINT8 LbaMid;
1635 UINT8 LbaHigh;
1636 UINTN WordCount;
1637 UINTN Increment;
1638 UINT16 *Buffer16;
1639 EFI_STATUS Status;
1640
1641 Status = WaitForBSYClear (IdeDev, ATATIMEOUT);
1642 if (EFI_ERROR (Status)) {
1643 return EFI_DEVICE_ERROR;
1644 }
1645
1646 //
1647 // Select device. Set bit6 as 1 to indicate LBA mode is used
1648 //
1649 DevSel = (UINT8) (IdeDev->Device << 4);
1650 DevSel |= 0x40;
1651 IDEWritePortB (
1652 IdeDev->PciIo,
1653 IdeDev->IoPort->Head,
1654 DevSel
1655 );
1656
1657 //
1658 // Wait for DRDY singnal asserting.
1659 //
1660 Status = DRDYReady (IdeDev, ATATIMEOUT);
1661 if (EFI_ERROR (Status)) {
1662 return EFI_DEVICE_ERROR;
1663 }
1664
1665 //
1666 // Fill feature register if needed
1667 //
1668 if (AtaCommand == SET_FEATURES_CMD) {
1669 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, 0x03);
1670 }
1671
1672 //
1673 // Fill the sector count register, which is a two-byte FIFO. Need write twice.
1674 //
1675 SectorCount8 = (UINT8) (SectorCount >> 8);
1676 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);
1677
1678 SectorCount8 = (UINT8) SectorCount;
1679 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);
1680
1681 //
1682 // Fill the start LBA registers, which are also two-byte FIFO
1683 //
1684 LbaLow = (UINT8) RShiftU64 (StartLba, 24);
1685 LbaMid = (UINT8) RShiftU64 (StartLba, 32);
1686 LbaHigh = (UINT8) RShiftU64 (StartLba, 40);
1687 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, LbaLow);
1688 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, LbaMid);
1689 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, LbaHigh);
1690
1691 LbaLow = (UINT8) StartLba;
1692 LbaMid = (UINT8) RShiftU64 (StartLba, 8);
1693 LbaHigh = (UINT8) RShiftU64 (StartLba, 16);
1694 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, LbaLow);
1695 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, LbaMid);
1696 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, LbaHigh);
1697
1698 //
1699 // Send command via Command Register, invoking the processing of this command
1700 //
1701 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, AtaCommand);
1702
1703 Buffer16 = (UINT16 *) Buffer;
1704
1705 //
1706 // According to PIO Data Out protocol, host can perform a series of writes to
1707 // the data register after each time device set DRQ ready;
1708 //
1709 Increment = 256;
1710
1711 //
1712 // used to record bytes of currently transfered data
1713 //
1714 WordCount = 0;
1715
1716 while (WordCount < ByteCount / 2) {
1717 //
1718 // Poll DRQ bit set, data transfer can be performed only when DRQ is ready.
1719 //
1720 Status = DRQReady2 (IdeDev, ATATIMEOUT);
1721 if (EFI_ERROR (Status)) {
1722 return EFI_DEVICE_ERROR;
1723 }
1724
1725 Status = CheckErrorStatus (IdeDev);
1726 if (EFI_ERROR (Status)) {
1727 return EFI_DEVICE_ERROR;
1728 }
1729
1730 //
1731 // Write data into device by one series of writing to data register
1732 //
1733 if ((WordCount + Increment) > ByteCount / 2) {
1734 Increment = ByteCount / 2 - WordCount;
1735 }
1736
1737 IDEWritePortWMultiple (
1738 IdeDev->PciIo,
1739 IdeDev->IoPort->Data,
1740 Increment,
1741 Buffer16
1742 );
1743
1744 WordCount += Increment;
1745 Buffer16 += Increment;
1746
1747 }
1748 //
1749 // while
1750 //
1751
1752 return CheckErrorStatus (IdeDev);
1753 }
1754
1755
1756 /**
1757 Enable SMART of the disk if supported
1758
1759 @param[in] *IdeDev
1760 pointer pointing to IDE_BLK_IO_DEV data structure,used
1761 to record all the information of the IDE device.
1762
1763 **/
1764 VOID
1765 AtaSMARTSupport (
1766 IN IDE_BLK_IO_DEV *IdeDev
1767 )
1768 {
1769 EFI_STATUS Status;
1770 BOOLEAN SMARTSupported;
1771 UINT8 Device;
1772 EFI_IDENTIFY_DATA *TmpAtaIdentifyPointer;
1773 UINT8 DeviceSelect;
1774 UINT8 LBAMid;
1775 UINT8 LBAHigh;
1776
1777 //
1778 // Detect if the device supports S.M.A.R.T.
1779 //
1780 if ((IdeDev->pIdData->AtaData.command_set_supported_83 & 0xc000) != 0x4000) {
1781 //
1782 // Data in word 82 is not valid (bit15 shall be zero and bit14 shall be to one)
1783 //
1784 return ;
1785 } else {
1786 if ((IdeDev->pIdData->AtaData.command_set_supported_82 & 0x0001) != 0x0001) {
1787 //
1788 // S.M.A.R.T is not supported by the device
1789 //
1790 SMARTSupported = FALSE;
1791 } else {
1792 SMARTSupported = TRUE;
1793 }
1794 }
1795
1796 if (!SMARTSupported) {
1797 //
1798 // Report nonsupport status code
1799 //
1800 REPORT_STATUS_CODE (
1801 EFI_ERROR_CODE | EFI_ERROR_MINOR,
1802 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_NOTSUPPORTED)
1803 );
1804 } else {
1805 //
1806 // Enable this feature
1807 //
1808 REPORT_STATUS_CODE (
1809 EFI_PROGRESS_CODE,
1810 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_ENABLE)
1811 );
1812
1813 Device = (UINT8) ((IdeDev->Device << 4) | 0xe0);
1814 Status = AtaNonDataCommandIn (
1815 IdeDev,
1816 ATA_SMART_CMD,
1817 Device,
1818 ATA_SMART_ENABLE_OPERATION,
1819 0,
1820 0,
1821 ATA_CONSTANT_4F,
1822 ATA_CONSTANT_C2
1823 );
1824 //
1825 // Detect if this feature is enabled
1826 //
1827 TmpAtaIdentifyPointer = (EFI_IDENTIFY_DATA *) AllocateZeroPool (sizeof (EFI_IDENTIFY_DATA));
1828
1829 DeviceSelect = (UINT8) ((IdeDev->Device) << 4);
1830 Status = AtaPioDataIn (
1831 IdeDev,
1832 (VOID *) TmpAtaIdentifyPointer,
1833 sizeof (EFI_IDENTIFY_DATA),
1834 IDENTIFY_DRIVE_CMD,
1835 DeviceSelect,
1836 0,
1837 0,
1838 0,
1839 0
1840 );
1841 if (EFI_ERROR (Status)) {
1842 gBS->FreePool (TmpAtaIdentifyPointer);
1843 return ;
1844 }
1845
1846 //
1847 // Check if the feature is enabled
1848 //
1849 if ((TmpAtaIdentifyPointer->AtaData.command_set_feature_enb_85 & 0x0001) == 0x0001) {
1850 //
1851 // Read status data
1852 //
1853 AtaNonDataCommandIn (
1854 IdeDev,
1855 ATA_SMART_CMD,
1856 Device,
1857 ATA_SMART_RETURN_STATUS,
1858 0,
1859 0,
1860 ATA_CONSTANT_4F,
1861 ATA_CONSTANT_C2
1862 );
1863 LBAMid = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb);
1864 LBAHigh = IDEReadPortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb);
1865
1866 if ((LBAMid == 0x4f) && (LBAHigh == 0xc2)) {
1867 //
1868 // The threshold exceeded condition is not detected by the device
1869 //
1870 REPORT_STATUS_CODE (
1871 EFI_PROGRESS_CODE,
1872 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_UNDERTHRESHOLD)
1873 );
1874
1875 } else if ((LBAMid == 0xf4) && (LBAHigh == 0x2c)) {
1876 //
1877 // The threshold exceeded condition is detected by the device
1878 //
1879 REPORT_STATUS_CODE (
1880 EFI_PROGRESS_CODE,
1881 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_OVERTHRESHOLD)
1882 );
1883 }
1884
1885 } else {
1886 //
1887 // Report disabled status code
1888 //
1889 REPORT_STATUS_CODE (
1890 EFI_ERROR_CODE | EFI_ERROR_MINOR,
1891 (EFI_IO_BUS_ATA_ATAPI | EFI_IOB_ATA_BUS_SMART_DISABLED)
1892 );
1893 }
1894
1895 gBS->FreePool (TmpAtaIdentifyPointer);
1896 }
1897
1898 return ;
1899 }
1900
1901 /**
1902 Send ATA Ext command into device with NON_DATA protocol
1903
1904 @param IdeDev Standard IDE device private data structure
1905 @param AtaCommand The ATA command to be sent
1906 @param Device The value in Device register
1907 @param Feature The value in Feature register
1908 @param SectorCount The value in SectorCount register
1909 @param LbaAddress The LBA address in 48-bit mode
1910
1911 @retval EFI_SUCCESS Reading succeed
1912 @retval EFI_DEVICE_ERROR Error executing commands on this device
1913
1914 **/
1915 EFI_STATUS
1916 AtaCommandIssueExt (
1917 IN IDE_BLK_IO_DEV *IdeDev,
1918 IN UINT8 AtaCommand,
1919 IN UINT8 Device,
1920 IN UINT16 Feature,
1921 IN UINT16 SectorCount,
1922 IN EFI_LBA LbaAddress
1923 )
1924 {
1925 EFI_STATUS Status;
1926 UINT8 SectorCount8;
1927 UINT8 Feature8;
1928 UINT8 LbaLow;
1929 UINT8 LbaMid;
1930 UINT8 LbaHigh;
1931
1932 Status = WaitForBSYClear (IdeDev, ATATIMEOUT);
1933 if (EFI_ERROR (Status)) {
1934 return EFI_DEVICE_ERROR;
1935 }
1936
1937 //
1938 // Select device (bit4), set LBA mode(bit6) (use 0xe0 for compatibility)
1939 //
1940 IDEWritePortB (
1941 IdeDev->PciIo,
1942 IdeDev->IoPort->Head,
1943 (UINT8) ((IdeDev->Device << 4) | 0xe0)
1944 );
1945
1946 //
1947 // ATA commands for ATA device must be issued when DRDY is set
1948 //
1949 Status = DRDYReady (IdeDev, ATATIMEOUT);
1950 if (EFI_ERROR (Status)) {
1951 return EFI_DEVICE_ERROR;
1952 }
1953
1954 //
1955 // Pass parameter into device register block
1956 //
1957 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Head, Device);
1958
1959 //
1960 // Fill the feature register, which is a two-byte FIFO. Need write twice.
1961 //
1962 Feature8 = (UINT8) (Feature >> 8);
1963 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, Feature8);
1964
1965 Feature8 = (UINT8) Feature;
1966 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, Feature8);
1967
1968 //
1969 // Fill the sector count register, which is a two-byte FIFO. Need write twice.
1970 //
1971 SectorCount8 = (UINT8) (SectorCount >> 8);
1972 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);
1973
1974 SectorCount8 = (UINT8) SectorCount;
1975 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);
1976
1977 //
1978 // Fill the start LBA registers, which are also two-byte FIFO
1979 //
1980 LbaLow = (UINT8) RShiftU64 (LbaAddress, 24);
1981 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, LbaLow);
1982 LbaLow = (UINT8) LbaAddress;
1983 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, LbaLow);
1984
1985 LbaMid = (UINT8) RShiftU64 (LbaAddress, 32);
1986 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, LbaMid);
1987 LbaMid = (UINT8) RShiftU64 (LbaAddress, 8);
1988 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, LbaMid);
1989
1990 LbaHigh = (UINT8) RShiftU64 (LbaAddress, 40);
1991 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, LbaHigh);
1992 LbaHigh = (UINT8) RShiftU64 (LbaAddress, 16);
1993 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, LbaHigh);
1994
1995 //
1996 // Work around for Segate 160G disk writing
1997 //
1998 gBS->Stall (1800);
1999
2000 //
2001 // Send command via Command Register
2002 //
2003 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, AtaCommand);
2004
2005 //
2006 // Stall at least 400ns
2007 //
2008 gBS->Stall (100);
2009
2010 return EFI_SUCCESS;
2011 }
2012
2013 /**
2014 Send ATA Ext command into device with NON_DATA protocol
2015
2016 @param IdeDev Standard IDE device private data structure
2017 @param AtaCommand The ATA command to be sent
2018 @param Device The value in Device register
2019 @param Feature The value in Feature register
2020 @param SectorCount The value in SectorCount register
2021 @param LbaAddress The LBA address in 48-bit mode
2022
2023 @retval EFI_SUCCESS Reading succeed
2024 @retval EFI_DEVICE_ERROR Error executing commands on this device
2025
2026 **/
2027 EFI_STATUS
2028 AtaCommandIssue (
2029 IN IDE_BLK_IO_DEV *IdeDev,
2030 IN UINT8 AtaCommand,
2031 IN UINT8 Device,
2032 IN UINT16 Feature,
2033 IN UINT16 SectorCount,
2034 IN EFI_LBA LbaAddress
2035 )
2036 {
2037 EFI_STATUS Status;
2038 UINT8 SectorCount8;
2039 UINT8 Feature8;
2040 UINT8 Lba0;
2041 UINT8 Lba1;
2042 UINT8 Lba2;
2043 UINT8 Lba3;
2044
2045 Status = WaitForBSYClear (IdeDev, ATATIMEOUT);
2046 if (EFI_ERROR (Status)) {
2047 return EFI_DEVICE_ERROR;
2048 }
2049
2050 //
2051 // Select device (bit4), set LBA mode(bit6) (use 0xe0 for compatibility)
2052 //
2053 IDEWritePortB (
2054 IdeDev->PciIo,
2055 IdeDev->IoPort->Head,
2056 (UINT8) ((IdeDev->Device << 4) | 0xe0)
2057 );
2058
2059 //
2060 // ATA commands for ATA device must be issued when DRDY is set
2061 //
2062 Status = DRDYReady (IdeDev, ATATIMEOUT);
2063 if (EFI_ERROR (Status)) {
2064 return EFI_DEVICE_ERROR;
2065 }
2066
2067 Lba0 = (UINT8) LbaAddress;
2068 Lba1 = (UINT8) RShiftU64 (LbaAddress, 8);
2069 Lba2 = (UINT8) RShiftU64 (LbaAddress, 16);
2070 Lba3 = (UINT8) RShiftU64 (LbaAddress, 24);
2071 Device |= Lba3;
2072
2073 //
2074 // Pass parameter into device register block
2075 //
2076 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Head, Device);
2077
2078 //
2079 // Fill the feature register, which is a two-byte FIFO. Need write twice.
2080 //
2081 Feature8 = (UINT8) Feature;
2082 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg1.Feature, Feature8);
2083
2084 //
2085 // Fill the sector count register, which is a two-byte FIFO. Need write twice.
2086 //
2087 SectorCount8 = (UINT8) SectorCount;
2088 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorCount, SectorCount8);
2089
2090 //
2091 // Fill the start LBA registers, which are also two-byte FIFO
2092 //
2093
2094 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->SectorNumber, Lba0);
2095 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderLsb, Lba1);
2096 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->CylinderMsb, Lba2);
2097
2098 //
2099 // Send command via Command Register
2100 //
2101 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Reg.Command, AtaCommand);
2102
2103 //
2104 // Stall at least 400ns
2105 //
2106 gBS->Stall (100);
2107
2108 return EFI_SUCCESS;
2109 }
2110
2111 /**
2112 This function is called by the AtaBlkIoReadBlocks() to perform
2113 reading from media in block unit. The function has been enhanced to
2114 support >120GB access and transfer at most 65536 blocks per command
2115
2116 @param[in] *IdeDev pointer pointing to IDE_BLK_IO_DEV data structure, used
2117 to record all the information of the IDE device.
2118
2119 @param[in] *DataBuffer A pointer to the destination buffer for the data.
2120
2121 @param[in] StartLba The starting logical block address to read from
2122 on the device media.
2123
2124 @param[in] NumberOfBlocks The number of transfer data blocks.
2125
2126 @return The device status of UDMA operation. If the operation is
2127 successful, return EFI_SUCCESS.
2128
2129 TODO: EFI_UNSUPPORTED - add return value to function comment
2130 TODO: EFI_DEVICE_ERROR - add return value to function comment
2131 TODO: EFI_DEVICE_ERROR - add return value to function comment
2132 TODO: EFI_DEVICE_ERROR - add return value to function comment
2133 **/
2134 EFI_STATUS
2135 AtaUdmaReadExt (
2136 IN IDE_BLK_IO_DEV *IdeDev,
2137 IN VOID *DataBuffer,
2138 IN EFI_LBA StartLba,
2139 IN UINTN NumberOfBlocks
2140 )
2141 {
2142 IDE_DMA_PRD *PrdAddr;
2143 IDE_DMA_PRD *UsedPrdAddr;
2144 IDE_DMA_PRD *TempPrdAddr;
2145 UINT8 RegisterValue;
2146 UINT8 Device;
2147 UINT64 IoPortForBmic;
2148 UINT64 IoPortForBmis;
2149 UINT64 IoPortForBmid;
2150 EFI_STATUS Status;
2151 UINTN PrdTableNum;
2152 UINTN ByteCount;
2153 UINTN ByteAvailable;
2154 UINT8 *PrdBuffer;
2155 UINTN RemainBlockNum;
2156 UINT8 DeviceControl;
2157
2158 //
2159 // Channel and device differential. Select device.
2160 //
2161 Device = (UINT8) ((IdeDev->Device << 4) | 0xe0);
2162
2163 //
2164 // Enable interrupt to support UDMA and Select device
2165 //
2166 DeviceControl = 0;
2167 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
2168
2169 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Head, Device);
2170
2171 if (IdePrimary == IdeDev->Channel) {
2172 IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICP_OFFSET;
2173 IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISP_OFFSET;
2174 IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDP_OFFSET;
2175 } else {
2176 if (IdeSecondary == IdeDev->Channel) {
2177 IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICS_OFFSET;
2178 IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISS_OFFSET;
2179 IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDS_OFFSET;
2180 } else {
2181 return EFI_UNSUPPORTED;
2182 }
2183 }
2184
2185 RemainBlockNum = NumberOfBlocks;
2186 while (RemainBlockNum > 0) {
2187
2188 if (RemainBlockNum >= MAX_DMA_EXT_COMMAND_SECTORS) {
2189 //
2190 // SectorCount is used to record the number of sectors to be read
2191 // Max 65536 sectors can be transfered at a time.
2192 //
2193 NumberOfBlocks = MAX_DMA_EXT_COMMAND_SECTORS;
2194 RemainBlockNum -= MAX_DMA_EXT_COMMAND_SECTORS;
2195 } else {
2196 NumberOfBlocks = (UINT16) RemainBlockNum;
2197 RemainBlockNum = 0;
2198 }
2199
2200 //
2201 // Calculate the number of PRD table to make sure the memory region
2202 // not cross 64K boundary
2203 //
2204 ByteCount = NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;
2205 PrdTableNum = ((ByteCount >> 16) + 1) + 1;
2206
2207 //
2208 // Build PRD table
2209 //
2210 PrdAddr = (IDE_DMA_PRD *) AllocateZeroPool ((2 * PrdTableNum * sizeof (IDE_DMA_PRD)));
2211
2212 //
2213 // To make sure PRD is allocated in one 64K page
2214 //
2215 if (((UINTN) PrdAddr & 0x0FFFF) > (((UINTN) PrdAddr + PrdTableNum * sizeof (IDE_DMA_PRD) - 1) & 0x0FFFF)) {
2216 UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x10000) & 0xFFFF0000);
2217 } else {
2218 if ((UINTN) PrdAddr & 0x03) {
2219 UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x04) & 0xFFFFFFFC);
2220 } else {
2221 UsedPrdAddr = PrdAddr;
2222 }
2223 }
2224
2225 //
2226 // Build the PRD table
2227 //
2228 PrdBuffer = DataBuffer;
2229 TempPrdAddr = UsedPrdAddr;
2230 while (TRUE) {
2231
2232 ByteAvailable = 0x10000 - ((UINTN) PrdBuffer & 0xFFFF);
2233
2234 if (ByteCount <= ByteAvailable) {
2235 TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);
2236 TempPrdAddr->ByteCount = (UINT16) ByteCount;
2237 TempPrdAddr->EndOfTable = 0x8000;
2238 break;
2239 }
2240
2241 TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);
2242 TempPrdAddr->ByteCount = (UINT16) ByteAvailable;
2243
2244 ByteCount -= ByteAvailable;
2245 PrdBuffer += ByteAvailable;
2246 TempPrdAddr++;
2247 }
2248
2249 //
2250 // Set the base address to BMID register
2251 //
2252 IdeDev->PciIo->Io.Write (
2253 IdeDev->PciIo,
2254 EfiPciIoWidthUint32,
2255 EFI_PCI_IO_PASS_THROUGH_BAR,
2256 IoPortForBmid,
2257 1,
2258 &UsedPrdAddr
2259 );
2260
2261 //
2262 // Set BMIC register to identify the operation direction
2263 //
2264 IdeDev->PciIo->Io.Read (
2265 IdeDev->PciIo,
2266 EfiPciIoWidthUint8,
2267 EFI_PCI_IO_PASS_THROUGH_BAR,
2268 IoPortForBmic,
2269 1,
2270 &RegisterValue
2271 );
2272
2273 RegisterValue |= BMIC_nREAD;
2274
2275 IdeDev->PciIo->Io.Write (
2276 IdeDev->PciIo,
2277 EfiPciIoWidthUint8,
2278 EFI_PCI_IO_PASS_THROUGH_BAR,
2279 IoPortForBmic,
2280 1,
2281 &RegisterValue
2282 );
2283
2284 //
2285 // Read BMIS register and clear ERROR and INTR bit
2286 //
2287 IdeDev->PciIo->Io.Read (
2288 IdeDev->PciIo,
2289 EfiPciIoWidthUint8,
2290 EFI_PCI_IO_PASS_THROUGH_BAR,
2291 IoPortForBmis,
2292 1,
2293 &RegisterValue
2294 );
2295
2296 RegisterValue |= BMIS_INTERRUPT | BMIS_ERROR;
2297
2298 IdeDev->PciIo->Io.Write (
2299 IdeDev->PciIo,
2300 EfiPciIoWidthUint8,
2301 EFI_PCI_IO_PASS_THROUGH_BAR,
2302 IoPortForBmis,
2303 1,
2304 &RegisterValue
2305 );
2306
2307 //
2308 // Issue READ DMA EXT command
2309 //
2310 Status = AtaCommandIssueExt (
2311 IdeDev,
2312 READ_DMA_EXT_CMD,
2313 Device,
2314 0,
2315 (UINT16) NumberOfBlocks,
2316 StartLba
2317 );
2318 if (EFI_ERROR (Status)) {
2319 gBS->FreePool (PrdAddr);
2320 return EFI_DEVICE_ERROR;
2321 }
2322
2323 //
2324 // Set START bit of BMIC register
2325 //
2326 IdeDev->PciIo->Io.Read (
2327 IdeDev->PciIo,
2328 EfiPciIoWidthUint8,
2329 EFI_PCI_IO_PASS_THROUGH_BAR,
2330 IoPortForBmic,
2331 1,
2332 &RegisterValue
2333 );
2334
2335 RegisterValue |= BMIC_START;
2336
2337 IdeDev->PciIo->Io.Write (
2338 IdeDev->PciIo,
2339 EfiPciIoWidthUint8,
2340 EFI_PCI_IO_PASS_THROUGH_BAR,
2341 IoPortForBmic,
2342 1,
2343 &RegisterValue
2344 );
2345
2346 //
2347 // Check the INTERRUPT and ERROR bit of BMIS
2348 //
2349 while (TRUE) {
2350
2351 IdeDev->PciIo->Io.Read (
2352 IdeDev->PciIo,
2353 EfiPciIoWidthUint8,
2354 EFI_PCI_IO_PASS_THROUGH_BAR,
2355 IoPortForBmis,
2356 1,
2357 &RegisterValue
2358 );
2359 if (RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) {
2360 if (RegisterValue & BMIS_ERROR) {
2361 gBS->FreePool (PrdAddr);
2362 return EFI_DEVICE_ERROR;
2363 }
2364 break;
2365 }
2366
2367 gBS->Stall (1000);
2368 }
2369
2370 gBS->FreePool (PrdAddr);
2371
2372 //
2373 // Set START bit of BMIC register
2374 //
2375 IdeDev->PciIo->Io.Read (
2376 IdeDev->PciIo,
2377 EfiPciIoWidthUint8,
2378 EFI_PCI_IO_PASS_THROUGH_BAR,
2379 IoPortForBmic,
2380 1,
2381 &RegisterValue
2382 );
2383
2384 RegisterValue &= ~((UINT8) BMIC_START);
2385
2386 IdeDev->PciIo->Io.Write (
2387 IdeDev->PciIo,
2388 EfiPciIoWidthUint8,
2389 EFI_PCI_IO_PASS_THROUGH_BAR,
2390 IoPortForBmic,
2391 1,
2392 &RegisterValue
2393 );
2394
2395 if (RegisterValue & BMIS_ERROR) {
2396 return EFI_DEVICE_ERROR;
2397 }
2398
2399 DataBuffer = (UINT8 *) DataBuffer + NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;
2400 StartLba += NumberOfBlocks;
2401 }
2402
2403 return EFI_SUCCESS;
2404 }
2405
2406 /**
2407 This function is called by the AtaBlkIoReadBlocks() to perform
2408 reading from media in block unit. The function has been enhanced to
2409 support >120GB access and transfer at most 65536 blocks per command
2410
2411 @param[in] *IdeDev
2412 pointer pointing to IDE_BLK_IO_DEV data structure, used
2413 to record all the information of the IDE device.
2414
2415 @param[in] *DataBuffer A pointer to the destination buffer for the data.
2416 @param[in] StartLba The starting logical block address to read from
2417 on the device media.
2418 @param[in] NumberOfBlocks The number of transfer data blocks.
2419
2420 @return The device status of UDMA operation. If the operation is
2421 successful, return EFI_SUCCESS.
2422
2423 TODO: EFI_UNSUPPORTED - add return value to function comment
2424 TODO: EFI_DEVICE_ERROR - add return value to function comment
2425 TODO: EFI_DEVICE_ERROR - add return value to function comment
2426 TODO: EFI_DEVICE_ERROR - add return value to function comment
2427 **/
2428 EFI_STATUS
2429 AtaUdmaRead (
2430 IN IDE_BLK_IO_DEV *IdeDev,
2431 IN VOID *DataBuffer,
2432 IN EFI_LBA StartLba,
2433 IN UINTN NumberOfBlocks
2434 )
2435 {
2436 IDE_DMA_PRD *PrdAddr;
2437 IDE_DMA_PRD *UsedPrdAddr;
2438 IDE_DMA_PRD *TempPrdAddr;
2439 UINT8 RegisterValue;
2440 UINT8 Device;
2441 UINT64 IoPortForBmic;
2442 UINT64 IoPortForBmis;
2443 UINT64 IoPortForBmid;
2444 EFI_STATUS Status;
2445 UINTN PrdTableNum;
2446 UINTN ByteCount;
2447 UINTN ByteAvailable;
2448 UINT8 *PrdBuffer;
2449 UINTN RemainBlockNum;
2450 UINT8 DeviceControl;
2451
2452 //
2453 // Channel and device differential
2454 //
2455 Device = (UINT8) ((IdeDev->Device << 4) | 0xe0);
2456
2457 //
2458 // Enable interrupt to support UDMA and Select device
2459 //
2460 DeviceControl = 0;
2461 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
2462
2463 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Head, Device);
2464
2465 if (IdePrimary == IdeDev->Channel) {
2466 IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICP_OFFSET;
2467 IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISP_OFFSET;
2468 IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDP_OFFSET;
2469 } else {
2470 if (IdeSecondary == IdeDev->Channel) {
2471 IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICS_OFFSET;
2472 IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISS_OFFSET;
2473 IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDS_OFFSET;
2474 } else {
2475 return EFI_UNSUPPORTED;
2476 }
2477 }
2478
2479 RemainBlockNum = NumberOfBlocks;
2480 while (RemainBlockNum > 0) {
2481
2482 if (RemainBlockNum >= MAX_DMA_COMMAND_SECTORS) {
2483 //
2484 // SectorCount is used to record the number of sectors to be read
2485 // Max 256 sectors can be transfered at a time.
2486 //
2487 NumberOfBlocks = MAX_DMA_COMMAND_SECTORS;
2488 RemainBlockNum -= MAX_DMA_COMMAND_SECTORS;
2489 } else {
2490 NumberOfBlocks = (UINT16) RemainBlockNum;
2491 RemainBlockNum = 0;
2492 }
2493
2494 //
2495 // Calculate the number of PRD table to make sure the memory region
2496 // not cross 64K boundary
2497 //
2498 ByteCount = NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;
2499 PrdTableNum = ((ByteCount >> 16) + 1) + 1;
2500
2501 //
2502 // Build PRD table
2503 //
2504 PrdAddr = (IDE_DMA_PRD *) AllocateZeroPool ((2 * PrdTableNum * sizeof (IDE_DMA_PRD)));
2505 //
2506 // To make sure PRD is allocated in one 64K page
2507 //
2508 if (((UINTN) PrdAddr & 0x0FFFF) > (((UINTN) PrdAddr + PrdTableNum * sizeof (IDE_DMA_PRD) - 1) & 0x0FFFF)) {
2509 UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x10000) & 0xFFFF0000);
2510 } else {
2511 if ((UINTN) PrdAddr & 0x03) {
2512 UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x04) & 0xFFFFFFFC);
2513 } else {
2514 UsedPrdAddr = PrdAddr;
2515 }
2516 }
2517
2518 //
2519 // Build the PRD table
2520 //
2521 PrdBuffer = DataBuffer;
2522 TempPrdAddr = UsedPrdAddr;
2523 while (TRUE) {
2524
2525 ByteAvailable = 0x10000 - ((UINTN) PrdBuffer & 0xFFFF);
2526
2527 if (ByteCount <= ByteAvailable) {
2528 TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);
2529 TempPrdAddr->ByteCount = (UINT16) ByteCount;
2530 TempPrdAddr->EndOfTable = 0x8000;
2531 break;
2532 }
2533
2534 TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);
2535 TempPrdAddr->ByteCount = (UINT16) ByteAvailable;
2536
2537 ByteCount -= ByteAvailable;
2538 PrdBuffer += ByteAvailable;
2539 TempPrdAddr++;
2540 }
2541
2542 //
2543 // Set the base address to BMID register
2544 //
2545 IdeDev->PciIo->Io.Write (
2546 IdeDev->PciIo,
2547 EfiPciIoWidthUint32,
2548 EFI_PCI_IO_PASS_THROUGH_BAR,
2549 IoPortForBmid,
2550 1,
2551 &UsedPrdAddr
2552 );
2553
2554 //
2555 // Set BMIC register to identify the operation direction
2556 //
2557 IdeDev->PciIo->Io.Read (
2558 IdeDev->PciIo,
2559 EfiPciIoWidthUint8,
2560 EFI_PCI_IO_PASS_THROUGH_BAR,
2561 IoPortForBmic,
2562 1,
2563 &RegisterValue
2564 );
2565
2566 RegisterValue |= BMIC_nREAD;
2567
2568 IdeDev->PciIo->Io.Write (
2569 IdeDev->PciIo,
2570 EfiPciIoWidthUint8,
2571 EFI_PCI_IO_PASS_THROUGH_BAR,
2572 IoPortForBmic,
2573 1,
2574 &RegisterValue
2575 );
2576
2577 //
2578 // Read BMIS register and clear ERROR and INTR bit
2579 //
2580 IdeDev->PciIo->Io.Read (
2581 IdeDev->PciIo,
2582 EfiPciIoWidthUint8,
2583 EFI_PCI_IO_PASS_THROUGH_BAR,
2584 IoPortForBmis,
2585 1,
2586 &RegisterValue
2587 );
2588
2589 RegisterValue |= (BMIS_INTERRUPT | BMIS_ERROR);
2590
2591 IdeDev->PciIo->Io.Write (
2592 IdeDev->PciIo,
2593 EfiPciIoWidthUint8,
2594 EFI_PCI_IO_PASS_THROUGH_BAR,
2595 IoPortForBmis,
2596 1,
2597 &RegisterValue
2598 );
2599
2600 //
2601 // Issue READ DMA command
2602 //
2603 Status = AtaCommandIssue (
2604 IdeDev,
2605 READ_DMA_CMD,
2606 Device,
2607 0,
2608 (UINT16) NumberOfBlocks,
2609 StartLba
2610 );
2611 if (EFI_ERROR (Status)) {
2612 gBS->FreePool (PrdAddr);
2613 return EFI_DEVICE_ERROR;
2614 }
2615
2616 //
2617 // Set START bit of BMIC register
2618 //
2619 IdeDev->PciIo->Io.Read (
2620 IdeDev->PciIo,
2621 EfiPciIoWidthUint8,
2622 EFI_PCI_IO_PASS_THROUGH_BAR,
2623 IoPortForBmic,
2624 1,
2625 &RegisterValue
2626 );
2627
2628 RegisterValue |= BMIC_START;
2629
2630 IdeDev->PciIo->Io.Write (
2631 IdeDev->PciIo,
2632 EfiPciIoWidthUint8,
2633 EFI_PCI_IO_PASS_THROUGH_BAR,
2634 IoPortForBmic,
2635 1,
2636 &RegisterValue
2637 );
2638
2639 //
2640 // Check the INTERRUPT and ERROR bit of BMIS
2641 //
2642 while (TRUE) {
2643
2644 IdeDev->PciIo->Io.Read (
2645 IdeDev->PciIo,
2646 EfiPciIoWidthUint8,
2647 EFI_PCI_IO_PASS_THROUGH_BAR,
2648 IoPortForBmis,
2649 1,
2650 &RegisterValue
2651 );
2652 if (RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) {
2653 if (RegisterValue & BMIS_ERROR) {
2654 gBS->FreePool (PrdAddr);
2655 return EFI_DEVICE_ERROR;
2656 }
2657 break;
2658 }
2659
2660 gBS->Stall (1000);
2661 }
2662
2663 gBS->FreePool (PrdAddr);
2664
2665 //
2666 // Set START bit of BMIC register
2667 //
2668 IdeDev->PciIo->Io.Read (
2669 IdeDev->PciIo,
2670 EfiPciIoWidthUint8,
2671 EFI_PCI_IO_PASS_THROUGH_BAR,
2672 IoPortForBmic,
2673 1,
2674 &RegisterValue
2675 );
2676
2677 RegisterValue &= ~((UINT8) BMIC_START);
2678
2679 IdeDev->PciIo->Io.Write (
2680 IdeDev->PciIo,
2681 EfiPciIoWidthUint8,
2682 EFI_PCI_IO_PASS_THROUGH_BAR,
2683 IoPortForBmic,
2684 1,
2685 &RegisterValue
2686 );
2687
2688 if (RegisterValue & BMIS_ERROR) {
2689 return EFI_DEVICE_ERROR;
2690 }
2691
2692 DataBuffer = (UINT8 *) DataBuffer + NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;
2693 StartLba += NumberOfBlocks;
2694 }
2695
2696 return EFI_SUCCESS;
2697 }
2698
2699 /**
2700 This function is called by the AtaBlkIoWriteBlocks() to perform
2701 writing to media in block unit. The function has been enhanced to
2702 support >120GB access and transfer at most 65536 blocks per command
2703
2704 @param[in] *IdeDev pointer pointing to IDE_BLK_IO_DEV data structure, used
2705 to record all the information of the IDE device.
2706
2707 @param[in] *DataBuffer A pointer to the source buffer for the data.
2708
2709 @param[in] StartLba The starting logical block address to write to
2710 on the device media.
2711
2712 @param[in] NumberOfBlocks The number of transfer data blocks.
2713
2714 @return The device status of UDMA operation. If the operation is
2715 successful, return EFI_SUCCESS.
2716
2717 TODO: EFI_UNSUPPORTED - add return value to function comment
2718 TODO: EFI_DEVICE_ERROR - add return value to function comment
2719 TODO: EFI_DEVICE_ERROR - add return value to function comment
2720 **/
2721 EFI_STATUS
2722 AtaUdmaWriteExt (
2723 IN IDE_BLK_IO_DEV *IdeDev,
2724 IN VOID *DataBuffer,
2725 IN EFI_LBA StartLba,
2726 IN UINTN NumberOfBlocks
2727 )
2728 {
2729 IDE_DMA_PRD *PrdAddr;
2730 IDE_DMA_PRD *UsedPrdAddr;
2731 IDE_DMA_PRD *TempPrdAddr;
2732 UINT8 RegisterValue;
2733 UINT8 Device;
2734 UINT64 IoPortForBmic;
2735 UINT64 IoPortForBmis;
2736 UINT64 IoPortForBmid;
2737 EFI_STATUS Status;
2738 UINTN PrdTableNum;
2739 UINTN ByteCount;
2740 UINTN ByteAvailable;
2741 UINT8 *PrdBuffer;
2742 UINTN RemainBlockNum;
2743 UINT8 DeviceControl;
2744
2745 //
2746 // Channel and device differential
2747 //
2748 Device = (UINT8) ((IdeDev->Device << 4) | 0xe0);
2749
2750 //
2751 // Enable interrupt to support UDMA and Select device
2752 //
2753 DeviceControl = 0;
2754 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
2755
2756 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Head, Device);
2757
2758 if (IdePrimary == IdeDev->Channel) {
2759 IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICP_OFFSET;
2760 IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISP_OFFSET;
2761 IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDP_OFFSET;
2762 } else {
2763 if (IdeSecondary == IdeDev->Channel) {
2764 IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICS_OFFSET;
2765 IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISS_OFFSET;
2766 IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDS_OFFSET;
2767 } else {
2768 return EFI_UNSUPPORTED;
2769 }
2770 }
2771
2772 RemainBlockNum = NumberOfBlocks;
2773 while (RemainBlockNum > 0) {
2774
2775 if (RemainBlockNum >= MAX_DMA_EXT_COMMAND_SECTORS) {
2776 //
2777 // SectorCount is used to record the number of sectors to be read
2778 // Max 65536 sectors can be transfered at a time.
2779 //
2780 NumberOfBlocks = MAX_DMA_EXT_COMMAND_SECTORS;
2781 RemainBlockNum -= MAX_DMA_EXT_COMMAND_SECTORS;
2782 } else {
2783 NumberOfBlocks = (UINT16) RemainBlockNum;
2784 RemainBlockNum = 0;
2785 }
2786
2787 //
2788 // Calculate the number of PRD table to make sure the memory region
2789 // not cross 64K boundary
2790 //
2791 ByteCount = NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;
2792 PrdTableNum = ((ByteCount >> 16) + 1) + 1;
2793
2794 //
2795 // Build PRD table
2796 //
2797 PrdAddr = (IDE_DMA_PRD *) AllocateZeroPool ((2 * PrdTableNum * sizeof (IDE_DMA_PRD)));
2798 //
2799 // To make sure PRD is allocated in one 64K page
2800 //
2801 if (((UINTN) PrdAddr & 0x0FFFF) > (((UINTN) PrdAddr + PrdTableNum * sizeof (IDE_DMA_PRD) - 1) & 0x0FFFF)) {
2802 UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x10000) & 0xFFFF0000);
2803 } else {
2804 if ((UINTN) PrdAddr & 0x03) {
2805 UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x04) & 0xFFFFFFFC);
2806 } else {
2807 UsedPrdAddr = PrdAddr;
2808 }
2809 }
2810
2811 //
2812 // Build the PRD table
2813 //
2814 PrdBuffer = DataBuffer;
2815 TempPrdAddr = UsedPrdAddr;
2816 while (TRUE) {
2817
2818 ByteAvailable = 0x10000 - ((UINTN) PrdBuffer & 0xFFFF);
2819
2820 if (ByteCount <= ByteAvailable) {
2821 TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);
2822 TempPrdAddr->ByteCount = (UINT16) ByteCount;
2823 TempPrdAddr->EndOfTable = 0x8000;
2824 break;
2825 }
2826
2827 TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);
2828 TempPrdAddr->ByteCount = (UINT16) ByteAvailable;
2829
2830 ByteCount -= ByteAvailable;
2831 PrdBuffer += ByteAvailable;
2832 TempPrdAddr++;
2833 }
2834
2835 //
2836 // Set the base address to BMID register
2837 //
2838 IdeDev->PciIo->Io.Write (
2839 IdeDev->PciIo,
2840 EfiPciIoWidthUint32,
2841 EFI_PCI_IO_PASS_THROUGH_BAR,
2842 IoPortForBmid,
2843 1,
2844 &UsedPrdAddr
2845 );
2846
2847 //
2848 // Set BMIC register to identify the operation direction
2849 //
2850 IdeDev->PciIo->Io.Read (
2851 IdeDev->PciIo,
2852 EfiPciIoWidthUint8,
2853 EFI_PCI_IO_PASS_THROUGH_BAR,
2854 IoPortForBmic,
2855 1,
2856 &RegisterValue
2857 );
2858 //
2859 // 0000 1000
2860 //
2861 RegisterValue &= ~((UINT8) BMIC_nREAD);
2862
2863 IdeDev->PciIo->Io.Write (
2864 IdeDev->PciIo,
2865 EfiPciIoWidthUint8,
2866 EFI_PCI_IO_PASS_THROUGH_BAR,
2867 IoPortForBmic,
2868 1,
2869 &RegisterValue
2870 );
2871
2872 //
2873 // Read BMIS register and clear ERROR and INTR bit
2874 //
2875 IdeDev->PciIo->Io.Read (
2876 IdeDev->PciIo,
2877 EfiPciIoWidthUint8,
2878 EFI_PCI_IO_PASS_THROUGH_BAR,
2879 IoPortForBmis,
2880 1,
2881 &RegisterValue
2882 );
2883
2884 RegisterValue |= (BMIS_INTERRUPT | BMIS_ERROR);
2885
2886 IdeDev->PciIo->Io.Write (
2887 IdeDev->PciIo,
2888 EfiPciIoWidthUint8,
2889 EFI_PCI_IO_PASS_THROUGH_BAR,
2890 IoPortForBmis,
2891 1,
2892 &RegisterValue
2893 );
2894
2895 //
2896 // Issue WRITE DMA EXT command
2897 //
2898 Status = AtaCommandIssueExt (
2899 IdeDev,
2900 WRITE_DMA_EXT_CMD,
2901 Device,
2902 0,
2903 (UINT16) NumberOfBlocks,
2904 StartLba
2905 );
2906 if (EFI_ERROR (Status)) {
2907 gBS->FreePool (PrdAddr);
2908 return EFI_DEVICE_ERROR;
2909 }
2910
2911 //
2912 // Set START bit of BMIC register
2913 //
2914 IdeDev->PciIo->Io.Read (
2915 IdeDev->PciIo,
2916 EfiPciIoWidthUint8,
2917 EFI_PCI_IO_PASS_THROUGH_BAR,
2918 IoPortForBmic,
2919 1,
2920 &RegisterValue
2921 );
2922
2923 RegisterValue |= BMIC_START;
2924
2925 IdeDev->PciIo->Io.Write (
2926 IdeDev->PciIo,
2927 EfiPciIoWidthUint8,
2928 EFI_PCI_IO_PASS_THROUGH_BAR,
2929 IoPortForBmic,
2930 1,
2931 &RegisterValue
2932 );
2933
2934 //
2935 // Check the INTERRUPT and ERROR bit of BMIS
2936 //
2937 while (TRUE) {
2938
2939 IdeDev->PciIo->Io.Read (
2940 IdeDev->PciIo,
2941 EfiPciIoWidthUint8,
2942 EFI_PCI_IO_PASS_THROUGH_BAR,
2943 IoPortForBmis,
2944 1,
2945 &RegisterValue
2946 );
2947 if (RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) {
2948 if (RegisterValue & BMIS_ERROR) {
2949 gBS->FreePool (PrdAddr);
2950 return EFI_DEVICE_ERROR;
2951 }
2952 break;
2953 }
2954
2955 gBS->Stall (1000);
2956 }
2957
2958 gBS->FreePool (PrdAddr);
2959
2960 //
2961 // Set START bit of BMIC register
2962 //
2963 IdeDev->PciIo->Io.Read (
2964 IdeDev->PciIo,
2965 EfiPciIoWidthUint8,
2966 EFI_PCI_IO_PASS_THROUGH_BAR,
2967 IoPortForBmic,
2968 1,
2969 &RegisterValue
2970 );
2971
2972 RegisterValue &= ~((UINT8) BMIC_START);
2973
2974 IdeDev->PciIo->Io.Write (
2975 IdeDev->PciIo,
2976 EfiPciIoWidthUint8,
2977 EFI_PCI_IO_PASS_THROUGH_BAR,
2978 IoPortForBmic,
2979 1,
2980 &RegisterValue
2981 );
2982
2983 DataBuffer = (UINT8 *) DataBuffer + NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;
2984 StartLba += NumberOfBlocks;
2985 }
2986
2987 return EFI_SUCCESS;
2988 }
2989
2990 /**
2991 This function is called by the AtaBlkIoWriteBlocks() to perform
2992 writing to media in block unit. The function has been enhanced to
2993 support >120GB access and transfer at most 65536 blocks per command
2994
2995 @param[in] *IdeDev
2996 pointer pointing to IDE_BLK_IO_DEV data structure, used
2997 to record all the information of the IDE device.
2998
2999 @param[in] *DataBuffer
3000 A pointer to the source buffer for the data.
3001
3002 @param[in] StartLba
3003 The starting logical block address to write to
3004 on the device media.
3005
3006 @param[in] NumberOfBlocks
3007 The number of transfer data blocks.
3008
3009 @return The device status of UDMA operation. If the operation is
3010 successful, return EFI_SUCCESS.
3011
3012 TODO: EFI_UNSUPPORTED - add return value to function comment
3013 TODO: EFI_DEVICE_ERROR - add return value to function comment
3014 TODO: EFI_DEVICE_ERROR - add return value to function comment
3015 **/
3016 EFI_STATUS
3017 AtaUdmaWrite (
3018 IN IDE_BLK_IO_DEV *IdeDev,
3019 IN VOID *DataBuffer,
3020 IN EFI_LBA StartLba,
3021 IN UINTN NumberOfBlocks
3022 )
3023 {
3024 IDE_DMA_PRD *PrdAddr;
3025 IDE_DMA_PRD *UsedPrdAddr;
3026 IDE_DMA_PRD *TempPrdAddr;
3027 UINT8 RegisterValue;
3028 UINT8 Device;
3029 UINT64 IoPortForBmic;
3030 UINT64 IoPortForBmis;
3031 UINT64 IoPortForBmid;
3032 EFI_STATUS Status;
3033 UINTN PrdTableNum;
3034 UINTN ByteCount;
3035 UINTN ByteAvailable;
3036 UINT8 *PrdBuffer;
3037 UINTN RemainBlockNum;
3038 UINT8 DeviceControl;
3039
3040 //
3041 // Channel and device differential
3042 //
3043 Device = (UINT8) ((IdeDev->Device << 4) | 0xe0);
3044
3045 //
3046 // Enable interrupt to support UDMA
3047 //
3048 DeviceControl = 0;
3049 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Alt.DeviceControl, DeviceControl);
3050
3051 IDEWritePortB (IdeDev->PciIo, IdeDev->IoPort->Head, Device);
3052
3053 if (IdePrimary == IdeDev->Channel) {
3054 IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICP_OFFSET;
3055 IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISP_OFFSET;
3056 IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDP_OFFSET;
3057 } else {
3058 if (IdeSecondary == IdeDev->Channel) {
3059 IoPortForBmic = IdeDev->IoPort->BusMasterBaseAddr + BMICS_OFFSET;
3060 IoPortForBmis = IdeDev->IoPort->BusMasterBaseAddr + BMISS_OFFSET;
3061 IoPortForBmid = IdeDev->IoPort->BusMasterBaseAddr + BMIDS_OFFSET;
3062 } else {
3063 return EFI_UNSUPPORTED;
3064 }
3065 }
3066
3067 RemainBlockNum = NumberOfBlocks;
3068 while (RemainBlockNum > 0) {
3069
3070 if (RemainBlockNum >= MAX_DMA_COMMAND_SECTORS) {
3071 //
3072 // SectorCount is used to record the number of sectors to be read
3073 // Max 256 sectors can be transfered at a time.
3074 //
3075 NumberOfBlocks = MAX_DMA_COMMAND_SECTORS;
3076 RemainBlockNum -= MAX_DMA_COMMAND_SECTORS;
3077 } else {
3078 NumberOfBlocks = (UINT16) RemainBlockNum;
3079 RemainBlockNum = 0;
3080 }
3081
3082 //
3083 // Calculate the number of PRD table to make sure the memory region
3084 // not cross 64K boundary
3085 //
3086 ByteCount = NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;
3087 PrdTableNum = ((ByteCount >> 16) + 1) + 1;
3088
3089 //
3090 // Build PRD table
3091 //
3092 PrdAddr = (IDE_DMA_PRD *) AllocateZeroPool ((2 * PrdTableNum * sizeof (IDE_DMA_PRD)));
3093
3094 //
3095 // To make sure PRD is allocated in one 64K page
3096 //
3097 if (((UINTN) PrdAddr & 0x0FFFF) > (((UINTN) PrdAddr + PrdTableNum * sizeof (IDE_DMA_PRD) - 1) & 0x0FFFF)) {
3098 UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x10000) & 0xFFFF0000);
3099 } else {
3100 if ((UINTN) PrdAddr & 0x03) {
3101 UsedPrdAddr = (IDE_DMA_PRD *) ((UINTN) ((UINT8 *) PrdAddr + 0x04) & 0xFFFFFFFC);
3102 } else {
3103 UsedPrdAddr = PrdAddr;
3104 }
3105 }
3106
3107 //
3108 // Build the PRD table
3109 //
3110 PrdBuffer = DataBuffer;
3111 TempPrdAddr = UsedPrdAddr;
3112 while (TRUE) {
3113
3114 ByteAvailable = 0x10000 - ((UINTN) PrdBuffer & 0xFFFF);
3115
3116 if (ByteCount <= ByteAvailable) {
3117 TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);
3118 TempPrdAddr->ByteCount = (UINT16) ByteCount;
3119 TempPrdAddr->EndOfTable = 0x8000;
3120 break;
3121 }
3122
3123 TempPrdAddr->RegionBaseAddr = (UINT32) ((UINTN) PrdBuffer);
3124 TempPrdAddr->ByteCount = (UINT16) ByteAvailable;
3125
3126 ByteCount -= ByteAvailable;
3127 PrdBuffer += ByteAvailable;
3128 TempPrdAddr++;
3129 }
3130
3131 //
3132 // Set the base address to BMID register
3133 //
3134 IdeDev->PciIo->Io.Write (
3135 IdeDev->PciIo,
3136 EfiPciIoWidthUint32,
3137 EFI_PCI_IO_PASS_THROUGH_BAR,
3138 IoPortForBmid,
3139 1,
3140 &UsedPrdAddr
3141 );
3142
3143 //
3144 // Set BMIC register to identify the operation direction
3145 //
3146 IdeDev->PciIo->Io.Read (
3147 IdeDev->PciIo,
3148 EfiPciIoWidthUint8,
3149 EFI_PCI_IO_PASS_THROUGH_BAR,
3150 IoPortForBmic,
3151 1,
3152 &RegisterValue
3153 );
3154 //
3155 // 0000 1000
3156 //
3157 RegisterValue &= ~((UINT8) BMIC_nREAD);
3158
3159 IdeDev->PciIo->Io.Write (
3160 IdeDev->PciIo,
3161 EfiPciIoWidthUint8,
3162 EFI_PCI_IO_PASS_THROUGH_BAR,
3163 IoPortForBmic,
3164 1,
3165 &RegisterValue
3166 );
3167
3168 //
3169 // Read BMIS register and clear ERROR and INTR bit
3170 //
3171 IdeDev->PciIo->Io.Read (
3172 IdeDev->PciIo,
3173 EfiPciIoWidthUint8,
3174 EFI_PCI_IO_PASS_THROUGH_BAR,
3175 IoPortForBmis,
3176 1,
3177 &RegisterValue
3178 );
3179
3180 RegisterValue |= (BMIS_INTERRUPT | BMIS_ERROR);
3181
3182 IdeDev->PciIo->Io.Write (
3183 IdeDev->PciIo,
3184 EfiPciIoWidthUint8,
3185 EFI_PCI_IO_PASS_THROUGH_BAR,
3186 IoPortForBmis,
3187 1,
3188 &RegisterValue
3189 );
3190
3191 //
3192 // Issue WRITE DMA command
3193 //
3194 Status = AtaCommandIssue (
3195 IdeDev,
3196 WRITE_DMA_CMD,
3197 Device,
3198 0,
3199 (UINT16) NumberOfBlocks,
3200 StartLba
3201 );
3202 if (EFI_ERROR (Status)) {
3203 gBS->FreePool (PrdAddr);
3204 return EFI_DEVICE_ERROR;
3205 }
3206
3207 //
3208 // Set START bit of BMIC register
3209 //
3210 IdeDev->PciIo->Io.Read (
3211 IdeDev->PciIo,
3212 EfiPciIoWidthUint8,
3213 EFI_PCI_IO_PASS_THROUGH_BAR,
3214 IoPortForBmic,
3215 1,
3216 &RegisterValue
3217 );
3218
3219 RegisterValue |= BMIC_START;
3220
3221 IdeDev->PciIo->Io.Write (
3222 IdeDev->PciIo,
3223 EfiPciIoWidthUint8,
3224 EFI_PCI_IO_PASS_THROUGH_BAR,
3225 IoPortForBmic,
3226 1,
3227 &RegisterValue
3228 );
3229
3230 //
3231 // Check the INTERRUPT and ERROR bit of BMIS
3232 //
3233 while (TRUE) {
3234
3235 IdeDev->PciIo->Io.Read (
3236 IdeDev->PciIo,
3237 EfiPciIoWidthUint8,
3238 EFI_PCI_IO_PASS_THROUGH_BAR,
3239 IoPortForBmis,
3240 1,
3241 &RegisterValue
3242 );
3243 if (RegisterValue & (BMIS_INTERRUPT | BMIS_ERROR)) {
3244 if (RegisterValue & BMIS_ERROR) {
3245 gBS->FreePool (PrdAddr);
3246 return EFI_DEVICE_ERROR;
3247 }
3248 break;
3249 }
3250
3251 gBS->Stall (1000);
3252 }
3253
3254 gBS->FreePool (PrdAddr);
3255
3256 //
3257 // Set START bit of BMIC register
3258 //
3259 IdeDev->PciIo->Io.Read (
3260 IdeDev->PciIo,
3261 EfiPciIoWidthUint8,
3262 EFI_PCI_IO_PASS_THROUGH_BAR,
3263 IoPortForBmic,
3264 1,
3265 &RegisterValue
3266 );
3267
3268 RegisterValue &= ~((UINT8) BMIC_START);
3269
3270 IdeDev->PciIo->Io.Write (
3271 IdeDev->PciIo,
3272 EfiPciIoWidthUint8,
3273 EFI_PCI_IO_PASS_THROUGH_BAR,
3274 IoPortForBmic,
3275 1,
3276 &RegisterValue
3277 );
3278
3279 DataBuffer = (UINT8 *) DataBuffer + NumberOfBlocks * IdeDev->BlkIo.Media->BlockSize;
3280 StartLba += NumberOfBlocks;
3281 }
3282
3283 return EFI_SUCCESS;
3284 }