EdkModulePkg/Bus/Pci/PciBus/Dxe/PciCommand.c

   1 /*++
   2
   3 Copyright (c) 2006, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 Module Name:
  13
  14   PciCommand.c
  15
  16 Abstract:
  17
  18   PCI Bus Driver
  19
  20 Revision History
  21
  22 --*/
  23
  24 #include "pcibus.h"
  25
  26 EFI_STATUS
  27 PciOperateRegister (
  28   IN  PCI_IO_DEVICE *PciIoDevice,
  29   IN  UINT16        Command,
  30   IN  UINT8         Offset,
  31   IN  UINT8         Operation,
  32   OUT UINT16        *PtrCommand
  33   )
  34 /*++
  35
  36 Routine Description:
  37
  38 Arguments:
  39
  40 Returns:
  41
  42   None
  43
  44 --*/
  45 // TODO:    PciIoDevice - add argument and description to function comment
  46 // TODO:    Command - add argument and description to function comment
  47 // TODO:    Offset - add argument and description to function comment
  48 // TODO:    Operation - add argument and description to function comment
  49 // TODO:    PtrCommand - add argument and description to function comment
  50 {
  51   UINT16              OldCommand;
  52   EFI_STATUS          Status;
  53   EFI_PCI_IO_PROTOCOL *PciIo;
  54
  55   OldCommand  = 0;
  56   PciIo       = &PciIoDevice->PciIo;
  57
  58   if (Operation != EFI_SET_REGISTER) {
  59     Status = PciIo->Pci.Read (
  60                           PciIo,
  61                           EfiPciIoWidthUint16,
  62                           Offset,
  63                           1,
  64                           &OldCommand
  65                           );
  66
  67     if (Operation == EFI_GET_REGISTER) {
  68       *PtrCommand = OldCommand;
  69       return Status;
  70     }
  71   }
  72
  73   if (Operation == EFI_ENABLE_REGISTER) {
  74     OldCommand |= Command;
  75   } else if (Operation == EFI_DISABLE_REGISTER) {
  76     OldCommand &= ~(Command);
  77   } else {
  78     OldCommand = Command;
  79   }
  80
  81   return PciIo->Pci.Write (
  82                       PciIo,
  83                       EfiPciIoWidthUint16,
  84                       Offset,
  85                       1,
  86                       &OldCommand
  87                       );
  88 }
  89
  90 BOOLEAN
  91 PciCapabilitySupport (
  92   IN PCI_IO_DEVICE  *PciIoDevice
  93   )
  94 /*++
  95
  96 Routine Description:
  97
  98 Arguments:
  99
 100 Returns:
 101
 102   None
 103
 104 --*/
 105 // TODO:    PciIoDevice - add argument and description to function comment
 106 {
 107
 108   if (PciIoDevice->Pci.Hdr.Status & EFI_PCI_STATUS_CAPABILITY) {
 109     return TRUE;
 110   }
 111
 112   return FALSE;
 113 }
 114
 115 EFI_STATUS
 116 LocateCapabilityRegBlock (
 117   IN PCI_IO_DEVICE  *PciIoDevice,
 118   IN UINT8          CapId,
 119   IN OUT UINT8      *Offset,
 120   OUT UINT8         *NextRegBlock OPTIONAL
 121   )
 122 /*++
 123
 124 Routine Description:
 125   Locate cap reg.
 126
 127 Arguments:
 128   PciIoDevice         - A pointer to the PCI_IO_DEVICE.
 129   CapId               - The cap ID.
 130   Offset              - A pointer to the offset.
 131   NextRegBlock        - A pointer to the next block.
 132
 133 Returns:
 134
 135   None
 136
 137 --*/
 138 // TODO:    EFI_UNSUPPORTED - add return value to function comment
 139 // TODO:    EFI_SUCCESS - add return value to function comment
 140 // TODO:    EFI_NOT_FOUND - add return value to function comment
 141 {
 142   UINT8   CapabilityPtr;
 143   UINT16  CapabilityEntry;
 144   UINT8   CapabilityID;
 145
 146   //
 147   // To check the cpability of this device supports
 148   //
 149   if (!PciCapabilitySupport (PciIoDevice)) {
 150     return EFI_UNSUPPORTED;
 151   }
 152
 153   if (*Offset != 0) {
 154     CapabilityPtr = *Offset;
 155   } else {
 156
 157     CapabilityPtr = 0;
 158     if (IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) {
 159
 160       PciIoDevice->PciIo.Pci.Read (
 161                               &PciIoDevice->PciIo,
 162                               EfiPciIoWidthUint8,
 163                               EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR,
 164                               1,
 165                               &CapabilityPtr
 166                               );
 167     } else {
 168
 169       PciIoDevice->PciIo.Pci.Read (
 170                               &PciIoDevice->PciIo,
 171                               EfiPciIoWidthUint8,
 172                               EFI_PCI_CAPABILITY_PTR,
 173                               1,
 174                               &CapabilityPtr
 175                               );
 176     }
 177   }
 178
 179   while (CapabilityPtr > 0x3F) {
 180     //
 181     // Mask it to DWORD alignment per PCI spec
 182     //
 183     CapabilityPtr &= 0xFC;
 184     PciIoDevice->PciIo.Pci.Read (
 185                             &PciIoDevice->PciIo,
 186                             EfiPciIoWidthUint16,
 187                             CapabilityPtr,
 188                             1,
 189                             &CapabilityEntry
 190                             );
 191
 192     CapabilityID = (UINT8) CapabilityEntry;
 193
 194     if (CapabilityID == CapId) {
 195       *Offset = CapabilityPtr;
 196       if (NextRegBlock != NULL) {
 197         *NextRegBlock = (UINT8) (CapabilityEntry >> 8);
 198       }
 199
 200       return EFI_SUCCESS;
 201     }
 202
 203     CapabilityPtr = (UINT8) (CapabilityEntry >> 8);
 204   }
 205
 206   return EFI_NOT_FOUND;
 207 }