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Optimize to preallocate big bigs to avoid latter allocations.
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1 /*++
2
3 Copyright (c) 2006, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
8
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11
12 Module Name:
13 VirtualMemory.c
14
15 Abstract:
16
17 x64 Virtual Memory Management Services in the form of an IA-32 driver.
18 Used to establish a 1:1 Virtual to Physical Mapping that is required to
19 enter Long Mode (x64 64-bit mode).
20
21 While we make a 1:1 mapping (identity mapping) for all physical pages
22 we still need to use the MTRR's to ensure that the cachability attirbutes
23 for all memory regions is correct.
24
25 The basic idea is to use 2MB page table entries where ever possible. If
26 more granularity of cachability is required then 4K page tables are used.
27
28 References:
29 1) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 1:Basic Architecture, Intel
30 2) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 2:Instruction Set Reference, Intel
31 3) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel
32
33 --*/
34
35 #include "VirtualMemory.h"
36
37 UINTN
38 CreateIdentityMappingPageTables (
39 VOID
40 )
41 /*++
42
43 Routine Description:
44
45 Allocates and fills in the Page Directory and Page Table Entries to
46 establish a 1:1 Virtual to Physical mapping.
47
48 Arguments:
49
50 NumberOfProcessorPhysicalAddressBits - Number of processor address bits to use.
51 Limits the number of page table entries
52 to the physical address space.
53
54 Returns:
55
56 EFI_SUCCESS The 1:1 Virtual to Physical identity mapping was created
57
58 --*/
59 {
60 UINT32 RegEax;
61 UINT8 PhysicalAddressBits;
62 EFI_PHYSICAL_ADDRESS PageAddress;
63 UINTN IndexOfPml4Entries;
64 UINTN IndexOfPdpEntries;
65 UINTN IndexOfPageDirectoryEntries;
66 UINTN NumberOfPml4EntriesNeeded;
67 UINTN NumberOfPdpEntriesNeeded;
68 PAGE_MAP_AND_DIRECTORY_POINTER *PageMapLevel4Entry;
69 PAGE_MAP_AND_DIRECTORY_POINTER *PageMap;
70 PAGE_MAP_AND_DIRECTORY_POINTER *PageDirectoryPointerEntry;
71 PAGE_TABLE_ENTRY *PageDirectoryEntry;
72 UINTN TotalPagesNum;
73 UINTN BigPageAddress;
74
75 //
76 // Get physical address bits supported.
77 //
78 AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);
79 if (RegEax >= 0x80000008) {
80 AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);
81 PhysicalAddressBits = (UINT8) RegEax;
82 } else {
83 PhysicalAddressBits = 36;
84 }
85
86 //
87 // Calculate the table entries needed.
88 //
89 if (PhysicalAddressBits <= 39 ) {
90 NumberOfPml4EntriesNeeded = 1;
91 NumberOfPdpEntriesNeeded = 1 << (PhysicalAddressBits - 30);
92 } else {
93 NumberOfPml4EntriesNeeded = 1 << (PhysicalAddressBits - 39);
94 NumberOfPdpEntriesNeeded = 512;
95 }
96
97 //
98 // Pre-allocate big pages to avoid later allocations.
99 //
100 TotalPagesNum = (NumberOfPdpEntriesNeeded + 1) * NumberOfPml4EntriesNeeded + 1;
101 BigPageAddress = (UINTN) AllocatePages (TotalPagesNum);
102 ASSERT (BigPageAddress != 0);
103
104 //
105 // By architecture only one PageMapLevel4 exists - so lets allocate storage for it.
106 //
107 PageMap = (VOID *) BigPageAddress;
108 BigPageAddress += EFI_PAGE_SIZE;
109
110 PageMapLevel4Entry = PageMap;
111 PageAddress = 0;
112 for (IndexOfPml4Entries = 0; IndexOfPml4Entries < NumberOfPml4EntriesNeeded; IndexOfPml4Entries++, PageMapLevel4Entry++) {
113 //
114 // Each PML4 entry points to a page of Page Directory Pointer entires.
115 // So lets allocate space for them and fill them in in the IndexOfPdpEntries loop.
116 //
117 PageDirectoryPointerEntry = (VOID *) BigPageAddress;
118 BigPageAddress += EFI_PAGE_SIZE;
119
120 //
121 // Make a PML4 Entry
122 //
123 PageMapLevel4Entry->Uint64 = (UINT64)(UINTN)PageDirectoryPointerEntry;
124 PageMapLevel4Entry->Bits.ReadWrite = 1;
125 PageMapLevel4Entry->Bits.Present = 1;
126
127 for (IndexOfPdpEntries = 0; IndexOfPdpEntries < NumberOfPdpEntriesNeeded; IndexOfPdpEntries++, PageDirectoryPointerEntry++) {
128 //
129 // Each Directory Pointer entries points to a page of Page Directory entires.
130 // So allocate space for them and fill them in in the IndexOfPageDirectoryEntries loop.
131 //
132 PageDirectoryEntry = (VOID *) BigPageAddress;
133 BigPageAddress += EFI_PAGE_SIZE;
134
135 //
136 // Fill in a Page Directory Pointer Entries
137 //
138 PageDirectoryPointerEntry->Uint64 = (UINT64)(UINTN)PageDirectoryEntry;
139 PageDirectoryPointerEntry->Bits.ReadWrite = 1;
140 PageDirectoryPointerEntry->Bits.Present = 1;
141
142 for (IndexOfPageDirectoryEntries = 0; IndexOfPageDirectoryEntries < 512; IndexOfPageDirectoryEntries++, PageDirectoryEntry++, PageAddress += 0x200000) {
143 //
144 // Fill in the Page Directory entries
145 //
146 PageDirectoryEntry->Uint64 = (UINT64)PageAddress;
147 PageDirectoryEntry->Bits.ReadWrite = 1;
148 PageDirectoryEntry->Bits.Present = 1;
149 PageDirectoryEntry->Bits.MustBe1 = 1;
150
151 }
152 }
153 }
154
155 //
156 // For the PML4 entries we are not using fill in a null entry.
157 // For now we just copy the first entry.
158 //
159 for (; IndexOfPml4Entries < 512; IndexOfPml4Entries++, PageMapLevel4Entry++) {
160 CopyMem (
161 PageMapLevel4Entry,
162 PageMap,
163 sizeof (PAGE_MAP_AND_DIRECTORY_POINTER)
164 );
165 }
166
167 return (UINTN)PageMap; // FIXME
168 }
169