EmbeddedPkg/Isp1761UsbDxe: Driver for the NXP ISP1761's USB peripheral controller
[mirror_edk2.git] / EmbeddedPkg / Drivers / Isp1761UsbDxe / Isp1761UsbDxe.c
1 /** @file
2
3 Copyright (c) 2013-2014, ARM Ltd. All rights reserved.<BR>
4
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #include <Library/TimerLib.h>
16 #include <Library/DebugLib.h>
17 #include <Library/UefiBootServicesTableLib.h>
18 #include <Library/UefiDriverEntryPoint.h>
19 #include <Library/IoLib.h>
20 #include <Library/MemoryAllocationLib.h>
21
22 #include <IndustryStandard/Usb.h>
23
24 #include <Protocol/UsbDevice.h>
25
26 #include "Isp1761UsbDxe.h"
27
28 /*
29 Driver for using the NXP ISP1761 as a USB Peripheral controller.
30 Doesn't use USB OTG - just sets it in Pure Peripheral mode.
31
32 The ISP1582 datasheet has a little more info on the Peripheral controller
33 registers than the ISP1761 datasheet
34
35 We don't do string descriptors. They're optional.
36 We currently assume the device has one configuration, one interface, one IN
37 endpoint, and one OUT endpoint (plus the default control endpoint).
38
39 In fact, this driver is the minimum required to implement fastboot.
40 */
41
42 // TODO Make sure the controller isn't sending empty packets when it shouldn't
43 // (check behaviour in cases when Buffer Length isn't explcitly set)
44
45 // ISP1582 Datasheet:
46 // "Data transfers preceding the status stage must first be fully
47 // completed before the STATUS bit can be set."
48 // This variable stores whether some control data has been pended in the EP0TX
49 // Tx buffer, so that when an EP0TX interrupt is received we can set the STATUS
50 // bit to go to the Status stage of the control transfer.
51 STATIC BOOLEAN mControlTxPending = FALSE;
52
53 STATIC USB_DEVICE_DESCRIPTOR *mDeviceDescriptor;
54
55 // The config descriptor, interface descriptor, and endpoint descriptors in a
56 // buffer (in that order)
57 STATIC VOID *mDescriptors;
58 // Convenience pointers to those descriptors inside the buffer:
59 STATIC USB_INTERFACE_DESCRIPTOR *mInterfaceDescriptor;
60 STATIC USB_CONFIG_DESCRIPTOR *mConfigDescriptor;
61 STATIC USB_ENDPOINT_DESCRIPTOR *mEndpointDescriptors;
62
63 STATIC USB_DEVICE_RX_CALLBACK mDataReceivedCallback;
64 STATIC USB_DEVICE_TX_CALLBACK mDataSentCallback;
65
66 // The time between interrupt polls, in units of 100 nanoseconds
67 // 10 Microseconds
68 #define ISP1761_INTERRUPT_POLL_PERIOD 10000
69
70 STATIC
71 VOID
72 SelectEndpoint (
73 IN UINT8 Endpoint
74 )
75 {
76 // The DMA Endpoint Index must not point to the same as the
77 // Endpoint Index Register.
78 WRITE_REG32 (ISP1761_DMA_ENDPOINT_INDEX, ((Endpoint + 2) % ISP1761_NUM_ENDPOINTS));
79 WRITE_REG32 (ISP1761_ENDPOINT_INDEX, Endpoint);
80 }
81
82 // Enable going to the Data stage of a control transfer
83 STATIC
84 VOID
85 DataStageEnable (
86 IN UINT8 Endpoint
87 )
88 {
89 SelectEndpoint (Endpoint);
90 WRITE_REG32 (ISP1761_CTRL_FUNCTION, ISP1761_CTRL_FUNCTION_DSEN);
91 }
92
93 // Go to the Status stage of a successful control transfer
94 STATIC
95 VOID
96 StatusAcknowledge (
97 IN UINT8 Endpoint
98 )
99 {
100 SelectEndpoint (Endpoint);
101 WRITE_REG32 (ISP1761_CTRL_FUNCTION, ISP1761_CTRL_FUNCTION_STATUS);
102 }
103
104 // Read the FIFO for the endpoint indexed by Endpoint, into the buffer pointed
105 // at by Buffer, whose size is *Size bytes.
106 //
107 // If *Size is less than the number of bytes in the FIFO, return EFI_BUFFER_TOO_SMALL
108 //
109 // Update *Size with the number of bytes of data in the FIFO.
110 STATIC
111 EFI_STATUS
112 ReadEndpointBuffer (
113 IN UINT8 Endpoint,
114 IN OUT UINTN *Size,
115 IN OUT VOID *Buffer
116 )
117 {
118 UINT16 NumBytesAvailable;
119 UINT32 Val32;
120 UINTN Index;
121 UINTN NumBytesRead;
122
123 SelectEndpoint (Endpoint);
124
125 NumBytesAvailable = READ_REG16 (ISP1761_BUFFER_LENGTH);
126
127 if (NumBytesAvailable > *Size) {
128 *Size = NumBytesAvailable;
129 return EFI_BUFFER_TOO_SMALL;
130 }
131 *Size = NumBytesAvailable;
132
133 /* -- NB! --
134 The datasheet says the Data Port is 16 bits but it actually appears to
135 be 32 bits.
136 */
137
138 // Read 32-bit chunks
139 for (Index = 0; Index < NumBytesAvailable / 4; Index++) {
140 ((UINT32 *) Buffer)[Index] = READ_REG32 (ISP1761_DATA_PORT);
141 }
142
143 // Read remaining bytes
144
145 // Round NumBytesAvailable down to nearest power of 4
146 NumBytesRead = NumBytesAvailable & (~0x3);
147 if (NumBytesRead != NumBytesAvailable) {
148 Val32 = READ_REG32 (ISP1761_DATA_PORT);
149 // Copy each required byte of 32-bit word into buffer
150 for (Index = 0; Index < NumBytesAvailable % 4; Index++) {
151 ((UINT8 *) Buffer)[NumBytesRead + Index] = Val32 >> (Index * 8);
152 }
153 }
154 return EFI_SUCCESS;
155 }
156
157 /*
158 Write an endpoint buffer. Parameters:
159 Endpoint Endpoint index (see Endpoint Index Register in datasheet)
160 MaxPacketSize The MaxPacketSize this endpoint is configured for
161 Size The size of the Buffer
162 Buffer The data
163
164 Assumes MaxPacketSize is a multiple of 4.
165 (It seems that all valid values for MaxPacketSize _are_ multiples of 4)
166 */
167 STATIC
168 EFI_STATUS
169 WriteEndpointBuffer (
170 IN UINT8 Endpoint,
171 IN UINTN MaxPacketSize,
172 IN UINTN Size,
173 IN CONST VOID *Buffer
174 )
175 {
176 UINTN Index;
177 UINT32 *DwordBuffer;
178
179 DwordBuffer = (UINT32 *) Buffer;
180 SelectEndpoint (Endpoint);
181
182 /* -- NB! --
183 The datasheet says the Data Port is 16 bits but it actually appears to
184 be 32 bits.
185 */
186
187 // Write packets of size MaxPacketSize
188 while (Size > MaxPacketSize) {
189 for (Index = 0; Index < MaxPacketSize / 4; Index++) {
190 WRITE_REG32 (ISP1761_DATA_PORT, DwordBuffer[Index]);
191 }
192 Size -= MaxPacketSize;
193 DwordBuffer += (MaxPacketSize / sizeof (UINT32));
194 }
195
196 // Write remaining data
197
198 if (Size > 0) {
199 WRITE_REG32 (ISP1761_BUFFER_LENGTH, Size);
200
201 while (Size > 4) {
202 WRITE_REG32 (ISP1761_DATA_PORT, DwordBuffer[0]);
203 Size -= 4;
204 DwordBuffer++;
205 }
206
207 if (Size > 0) {
208 WRITE_REG32 (ISP1761_DATA_PORT, DwordBuffer[0]);
209 }
210 }
211
212 return EFI_SUCCESS;
213 }
214
215 STATIC
216 EFI_STATUS
217 HandleGetDescriptor (
218 IN USB_DEVICE_REQUEST *Request
219 )
220 {
221 EFI_STATUS Status;
222 UINT8 DescriptorType;
223 UINTN ResponseSize;
224 VOID *ResponseData;
225
226 ResponseSize = 0;
227 ResponseData = NULL;
228 Status = EFI_SUCCESS;
229
230 // Pretty confused if bmRequestType is anything but this:
231 ASSERT (Request->RequestType == USB_DEV_GET_DESCRIPTOR_REQ_TYPE);
232
233 // Choose the response
234 DescriptorType = Request->Value >> 8;
235 switch (DescriptorType) {
236 case USB_DESC_TYPE_DEVICE:
237 DEBUG ((EFI_D_INFO, "USB: Got a request for device descriptor\n"));
238 ResponseSize = sizeof (USB_DEVICE_DESCRIPTOR);
239 ResponseData = mDeviceDescriptor;
240 break;
241 case USB_DESC_TYPE_CONFIG:
242 DEBUG ((EFI_D_INFO, "USB: Got a request for config descriptor\n"));
243 ResponseSize = mConfigDescriptor->TotalLength;
244 ResponseData = mDescriptors;
245 break;
246 case USB_DESC_TYPE_STRING:
247 DEBUG ((EFI_D_INFO, "USB: Got a request for String descriptor %d\n", Request->Value & 0xFF));
248 break;
249 default:
250 DEBUG ((EFI_D_INFO, "USB: Didn't understand request for descriptor 0x%04x\n", Request->Value));
251 Status = EFI_NOT_FOUND;
252 break;
253 }
254
255 // Send the response
256 if (ResponseData) {
257 ASSERT (ResponseSize != 0);
258
259 if (Request->Length < ResponseSize) {
260 // Truncate response
261 ResponseSize = Request->Length;
262 } else if (Request->Length > ResponseSize) {
263 DEBUG ((EFI_D_INFO, "USB: Info: ResponseSize < wLength\n"));
264 }
265
266 DataStageEnable (ISP1761_EP0TX);
267 Status = WriteEndpointBuffer (
268 ISP1761_EP0TX,
269 MAX_PACKET_SIZE_CONTROL,
270 ResponseSize,
271 ResponseData
272 );
273 if (!EFI_ERROR (Status)) {
274 // Setting this value should cause us to go to the Status stage on the
275 // next EP0TX interrupt
276 mControlTxPending = TRUE;
277 }
278 }
279
280 return EFI_SUCCESS;
281 }
282
283 STATIC
284 EFI_STATUS
285 HandleSetAddress (
286 IN USB_DEVICE_REQUEST *Request
287 )
288 {
289 // Pretty confused if bmRequestType is anything but this:
290 ASSERT (Request->RequestType == USB_DEV_SET_ADDRESS_REQ_TYPE);
291 // USB Spec: "The USB device does not change its device address until after
292 // the Status stage of this request is completed successfully."
293 // ISP1582 datasheet: "The new device address is activated when the
294 // device receives an acknowledgment from the host for the empty packet
295 // token". (StatusAcknowledge causes an empty packet to be sent).
296 // So, we write the Address register _before_ acking the SET_ADDRESS.
297 DEBUG ((EFI_D_INFO, "USB: Setting address to %d\n", Request->Value));
298 WRITE_REG32 (ISP1761_ADDRESS, Request->Value | ISP1761_ADDRESS_DEVEN);
299 StatusAcknowledge (ISP1761_EP0TX);
300
301 return EFI_SUCCESS;
302 }
303
304 // Move the device to the Configured state.
305 // (This code only supports one configuration for a device, so the configuration
306 // index is ignored)
307 STATIC
308 EFI_STATUS
309 HandleSetConfiguration (
310 IN USB_DEVICE_REQUEST *Request
311 )
312 {
313 USB_ENDPOINT_DESCRIPTOR *EPDesc;
314 UINTN Index;
315 UINT8 EndpointIndex;
316
317 ASSERT (Request->RequestType == USB_DEV_SET_CONFIGURATION_REQ_TYPE);
318 DEBUG ((EFI_D_INFO, "USB: Setting configuration.\n"));
319
320 // Configure endpoints
321 for (Index = 0; Index < mInterfaceDescriptor->NumEndpoints; Index++) {
322 EPDesc = &mEndpointDescriptors[Index];
323
324 // To simplify for now, assume endpoints aren't "sparse", and are in order.
325 ASSERT ((EPDesc->EndpointAddress & 0xF) == ((Index / 2) + 1));
326
327 // Convert from USB endpoint index to ISP1761 endpoint Index
328 // USB: Endpoint number is bits [3:0], IN/OUT is bit [7]
329 // ISP1761: Endpoint number is bits [4:1], IN/OUT is bit [0]
330 EndpointIndex = ((EPDesc->EndpointAddress & 0xF) << 1) |
331 ((EPDesc->EndpointAddress & BIT7) >> 7);
332 SelectEndpoint (EndpointIndex);
333 // Set endpoint type (Bulk/Isochronous/Interrupt)
334 WRITE_REG32 (ISP1761_ENDPOINT_MAX_PACKET_SIZE, EPDesc->MaxPacketSize);
335 // Hardware foible (bug?): Although the datasheet seems to suggest it should
336 // automatically be set to MaxPacketSize, the Buffer Length register appears
337 // to be reset to 0, which causes an empty packet to be sent in response to
338 // the first IN token of the session. The NOEMPKT field of the Endpoint Type
339 // register sounds like it might fix this problem, but it doesn't
340 // (it's "applicable only in the DMA mode").
341 WRITE_REG32 (ISP1761_BUFFER_LENGTH, EPDesc->MaxPacketSize);
342 WRITE_REG32 (ISP1761_ENDPOINT_TYPE, (EPDesc->Attributes & 0x3) |
343 ISP1761_ENDPOINT_TYPE_ENABLE);
344 }
345
346 StatusAcknowledge (ISP1761_EP0TX);
347 return EFI_SUCCESS;
348 }
349
350 STATIC
351 EFI_STATUS
352 HandleDeviceRequest (
353 IN USB_DEVICE_REQUEST *Request
354 )
355 {
356 EFI_STATUS Status;
357
358 Status = EFI_SUCCESS;
359
360 switch (Request->Request) {
361 case USB_DEV_GET_DESCRIPTOR:
362 Status = HandleGetDescriptor (Request);
363 break;
364 case USB_DEV_SET_ADDRESS:
365 Status = HandleSetAddress (Request);
366 break;
367 case USB_DEV_SET_CONFIGURATION:
368 Status = HandleSetConfiguration (Request);
369 break;
370 default:
371 DEBUG ((EFI_D_ERROR,
372 "Didn't understand RequestType 0x%x Request 0x%x\n",
373 Request->RequestType, Request->Request));
374 Status = EFI_INVALID_PARAMETER;
375 break;
376 }
377
378 return Status;
379 }
380
381 // Instead of actually registering interrupt handlers, we poll the controller's
382 // interrupt source register in this function.
383 STATIC
384 VOID
385 CheckInterrupts (
386 IN EFI_EVENT Event,
387 IN VOID *Context
388 )
389 {
390 UINT32 DcInterrupts;
391 UINTN NumBytes;
392 UINTN MoreBytes;
393 UINT8 Packet[512];
394 VOID *DataPacket;
395 UINT32 HandledInterrupts;
396 UINT32 UnhandledInterrupts;
397 EFI_STATUS Status;
398
399 // Set bits in HandledInterrupts to mark the interrupt source handled.
400 HandledInterrupts = 0;
401
402 WRITE_REG32 (ISP1761_DEVICE_UNLOCK, ISP1761_DEVICE_UNLOCK_MAGIC);
403
404 DcInterrupts = READ_REG32 (ISP1761_DC_INTERRUPT);
405 if (DcInterrupts & ISP1761_DC_INTERRUPT_SUSP) {
406 DEBUG ((EFI_D_INFO, "USB: Suspend\n"));
407 HandledInterrupts |= ISP1761_DC_INTERRUPT_SUSP;
408 }
409 if (DcInterrupts & ISP1761_DC_INTERRUPT_RESUME) {
410 DEBUG ((EFI_D_INFO, "USB: Resume\n"));
411 HandledInterrupts |= ISP1761_DC_INTERRUPT_RESUME;
412 }
413 if (DcInterrupts & ISP1761_DC_INTERRUPT_EP0SETUP) {
414 NumBytes = 512;
415 ReadEndpointBuffer (0x20, &NumBytes, &Packet);
416 ASSERT (NumBytes == 8);
417 HandleDeviceRequest ((USB_DEVICE_REQUEST *) Packet);
418 HandledInterrupts |= ISP1761_DC_INTERRUPT_EP0SETUP;
419 }
420 if (DcInterrupts & ISP1761_DC_INTERRUPT_EP0RX) {
421 HandledInterrupts |= ISP1761_DC_INTERRUPT_EP0RX;
422 }
423 if (DcInterrupts & ISP1761_DC_INTERRUPT_EP0TX) {
424 if (mControlTxPending) {
425 // We previously put some data in the Control Endpoint's IN (Tx) FIFO.
426 // We assume that that data has now been sent in response to the IN token
427 // that triggered this interrupt. We can therefore go to the Status stage
428 // of the control transfer.
429 StatusAcknowledge (ISP1761_EP0TX);
430 mControlTxPending = FALSE;
431 }
432 HandledInterrupts |= ISP1761_DC_INTERRUPT_EP0TX;
433 }
434 if (DcInterrupts & ISP1761_DC_INTERRUPT_EP1RX) {
435 NumBytes = 512;
436 DataPacket = AllocatePool (NumBytes);
437 Status = ReadEndpointBuffer (ISP1761_EP1RX, &NumBytes, DataPacket);
438 if (EFI_ERROR (Status) || NumBytes == 0) {
439 if (EFI_ERROR (Status)) {
440 DEBUG ((EFI_D_ERROR, "Couldn't read EP1RX data: %r\n", Status));
441 }
442 FreePool (DataPacket);
443 } else {
444 // Signal this event again so we poll again ASAP
445 gBS->SignalEvent (Event);
446 mDataReceivedCallback (NumBytes, DataPacket);
447 }
448 HandledInterrupts |= ISP1761_DC_INTERRUPT_EP1RX;
449 }
450 if (DcInterrupts & ISP1761_DC_INTERRUPT_EP1TX) {
451 mDataSentCallback (1);
452 HandledInterrupts |= ISP1761_DC_INTERRUPT_EP1TX;
453 }
454 if (DcInterrupts & (ISP1761_DC_INTERRUPT_SOF | ISP1761_DC_INTERRUPT_PSOF)) {
455 // Don't care about SOFs or pseudo-SOFs
456 HandledInterrupts |= (ISP1761_DC_INTERRUPT_SOF | ISP1761_DC_INTERRUPT_PSOF);
457 }
458 if (ISP1761_DC_INTERRUPT_BRESET) {
459 HandledInterrupts |= ISP1761_DC_INTERRUPT_BRESET;
460 }
461 if (ISP1761_DC_INTERRUPT_HS_STAT) {
462 HandledInterrupts |= ISP1761_DC_INTERRUPT_HS_STAT;
463 }
464 if (ISP1761_DC_INTERRUPT_VBUS) {
465 HandledInterrupts |= ISP1761_DC_INTERRUPT_VBUS;
466 }
467
468 UnhandledInterrupts = DcInterrupts & (~HandledInterrupts) & ISP1761_DC_INTERRUPT_MASK;
469 if (UnhandledInterrupts) {
470 DEBUG ((EFI_D_ERROR, "USB: Unhandled DC Interrupts: 0x%08x\n",
471 UnhandledInterrupts));
472 }
473
474 // Check if we received any more data while we were handling the interrupt.
475 SelectEndpoint (ISP1761_EP1RX);
476 MoreBytes = READ_REG16 (ISP1761_BUFFER_LENGTH);
477 if (MoreBytes) {
478 HandledInterrupts &= ~ISP1761_DC_INTERRUPT_EP1RX;
479 }
480
481 WRITE_REG32 (ISP1761_DC_INTERRUPT, HandledInterrupts);
482 }
483
484 EFI_STATUS
485 Isp1761PeriphSend (
486 IN UINT8 EndpointIndex,
487 IN UINTN Size,
488 IN CONST VOID *Buffer
489 )
490 {
491 return WriteEndpointBuffer (
492 (EndpointIndex << 1) | 0x1, //Convert to ISP1761 endpoint index, Tx
493 MAX_PACKET_SIZE_BULK,
494 Size,
495 Buffer
496 );
497 }
498
499 EFI_STATUS
500 EFIAPI
501 Isp1761PeriphStart (
502 IN USB_DEVICE_DESCRIPTOR *DeviceDescriptor,
503 IN VOID **Descriptors,
504 IN USB_DEVICE_RX_CALLBACK RxCallback,
505 IN USB_DEVICE_TX_CALLBACK TxCallback
506 )
507 {
508 UINT16 OtgStatus;
509 UINT8 *Ptr;
510 EFI_STATUS Status;
511 EFI_EVENT TimerEvent;
512
513 ASSERT (DeviceDescriptor != NULL);
514 ASSERT (Descriptors[0] != NULL);
515 ASSERT (RxCallback != NULL);
516 ASSERT (TxCallback != NULL);
517
518 WRITE_REG32 (ISP1761_DEVICE_UNLOCK, ISP1761_DEVICE_UNLOCK_MAGIC);
519
520 WRITE_REG32 (ISP1761_SW_RESET_REG, ISP1761_SW_RESET_ALL);
521 while (READ_REG32 (ISP1761_SW_RESET_REG) & ISP1761_SW_RESET_ALL) {
522 //busy wait
523 }
524 WRITE_REG32 (ISP1761_MODE, ISP1761_MODE_SFRESET);
525 while (READ_REG32 (ISP1761_MODE) & ISP1761_MODE_SFRESET) {
526 //busy wait
527 }
528 DEBUG ((EFI_D_INFO, "USB: Software reset done\n"));
529
530 WRITE_REG32 (ISP1761_DC_INTERRUPT_ENABLE, 0x03FFFFFF);
531 WRITE_REG32 (ISP1761_OTG_INTERRUPT_ENABLE_RISE, 0x07FF);
532
533 WRITE_REG8 (ISP1761_ADDRESS, ISP1761_ADDRESS_DEVEN);
534 WRITE_REG8 (ISP1761_MODE, ISP1761_MODE_WKUPCS | ISP1761_MODE_CLKAON);
535
536 // Use port 1 as peripheral controller (magic - disagrees with datasheet)
537 WRITE_REG32 (ISP1761_OTG_CTRL_SET, 0xffff0000);
538 WRITE_REG32 (ISP1761_OTG_CTRL_SET, 0x000014d1);
539
540 OtgStatus = READ_REG16 (ISP1761_OTG_STATUS);
541 if ((OtgStatus & ISP1761_OTG_STATUS_B_SESS_END) != 0) {
542 DEBUG ((EFI_D_ERROR, "USB: Vbus not powered.\n"));
543 }
544 if ((OtgStatus & ISP1761_OTG_STATUS_A_B_SESS_VLD) == 0) {
545 DEBUG ((EFI_D_ERROR, "USB: Session not valid.\n"));
546 }
547
548 // Configure Control endpoints
549 SelectEndpoint (0x20);
550 WRITE_REG32 (ISP1761_ENDPOINT_MAX_PACKET_SIZE, MAX_PACKET_SIZE_CONTROL);
551 WRITE_REG32 (ISP1761_ENDPOINT_TYPE, ISP1761_ENDPOINT_TYPE_ENABLE);
552 SelectEndpoint (0x0);
553 WRITE_REG32 (ISP1761_ENDPOINT_MAX_PACKET_SIZE, MAX_PACKET_SIZE_CONTROL);
554 WRITE_REG32 (ISP1761_ENDPOINT_TYPE, ISP1761_ENDPOINT_TYPE_ENABLE);
555 SelectEndpoint (0x1);
556 WRITE_REG32 (ISP1761_ENDPOINT_MAX_PACKET_SIZE, MAX_PACKET_SIZE_CONTROL);
557 WRITE_REG32 (ISP1761_ENDPOINT_TYPE, ISP1761_ENDPOINT_TYPE_ENABLE);
558
559 // Interrupt on all ACK and NAK
560 WRITE_REG32 (ISP1761_INTERRUPT_CONFIG, ISP1761_INTERRUPT_CONFIG_ACK_ONLY);
561
562 mDeviceDescriptor = DeviceDescriptor;
563 mDescriptors = Descriptors[0];
564
565 // Right now we just support one configuration
566 ASSERT (mDeviceDescriptor->NumConfigurations == 1);
567 // ... and one interface
568 mConfigDescriptor = (USB_CONFIG_DESCRIPTOR *)mDescriptors;
569 ASSERT (mConfigDescriptor->NumInterfaces == 1);
570
571 Ptr = ((UINT8 *) mDescriptors) + sizeof (USB_CONFIG_DESCRIPTOR);
572 mInterfaceDescriptor = (USB_INTERFACE_DESCRIPTOR *) Ptr;
573 Ptr += sizeof (USB_INTERFACE_DESCRIPTOR);
574
575 mEndpointDescriptors = (USB_ENDPOINT_DESCRIPTOR *) Ptr;
576
577 mDataReceivedCallback = RxCallback;
578 mDataSentCallback = TxCallback;
579
580 // Register a timer event so CheckInterupts gets called periodically
581 Status = gBS->CreateEvent (
582 EVT_TIMER | EVT_NOTIFY_SIGNAL,
583 TPL_CALLBACK,
584 CheckInterrupts,
585 NULL,
586 &TimerEvent
587 );
588 ASSERT_EFI_ERROR (Status);
589 if (EFI_ERROR (Status)) {
590 return Status;
591 }
592
593 Status = gBS->SetTimer (
594 TimerEvent,
595 TimerPeriodic,
596 ISP1761_INTERRUPT_POLL_PERIOD
597 );
598 ASSERT_EFI_ERROR (Status);
599
600 return Status;
601 }
602
603 USB_DEVICE_PROTOCOL mUsbDevice = {
604 Isp1761PeriphStart,
605 Isp1761PeriphSend
606 };
607
608
609 EFI_STATUS
610 EFIAPI
611 Isp1761PeriphEntryPoint (
612 IN EFI_HANDLE ImageHandle,
613 IN EFI_SYSTEM_TABLE *SystemTable
614 )
615 {
616 UINT32 DeviceId;
617 EFI_HANDLE Handle;
618
619 DeviceId = READ_REG32 (ISP1761_DEVICE_ID);
620
621 if (DeviceId != ISP1761_DEVICE_ID_VAL) {
622 DEBUG ((EFI_D_ERROR,
623 "ERROR: Read incorrect device ID for ISP1761: 0x%08x, expected 0x%08x\n",
624 DeviceId , ISP1761_DEVICE_ID_VAL
625 ));
626 return EFI_DEVICE_ERROR;
627 }
628
629 Handle = NULL;
630 return gBS->InstallProtocolInterface (
631 &Handle,
632 &gUsbDeviceProtocolGuid,
633 EFI_NATIVE_INTERFACE,
634 &mUsbDevice
635 );
636 }