EmbeddedPkg/Library/GdbDebugAgent/Arm/ExceptionSupport.ARMv6.S

   1 #------------------------------------------------------------------------------
   2 #
   3 # Use ARMv6 instruction to operate on a single stack
   4 #
   5 # Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
   6 #
   7 # This program and the accompanying materials
   8 # are licensed and made available under the terms and conditions of the BSD License
   9 # which accompanies this distribution.  The full text of the license may be found at
  10 # http://opensource.org/licenses/bsd-license.php
  11 #
  12 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14 #
  15 #------------------------------------------------------------------------------
  16
  17 /*
  18
  19 This is the stack constructed by the exception handler (low address to high address)
  20                 # R0 - IFAR is EFI_SYSTEM_CONTEXT for ARM
  21   Reg   Offset
  22   ===   ======
  23   R0    0x00    # stmfd     SP!,{R0-R12}
  24   R1    0x04
  25   R2    0x08
  26   R3    0x0c
  27   R4    0x10
  28   R5    0x14
  29   R6    0x18
  30   R7    0x1c
  31   R8    0x20
  32   R9    0x24
  33   R10   0x28
  34   R11   0x2c
  35   R12   0x30
  36   SP    0x34    # reserved via adding 0x20 (32) to the SP
  37   LR    0x38
  38   PC    0x3c
  39   CPSR  0x40
  40   DFSR  0x44
  41   DFAR  0x48
  42   IFSR  0x4c
  43   IFAR  0x50
  44
  45   LR    0x54    # SVC Link register (we need to restore it)
  46
  47   LR    0x58    # pushed by srsfd
  48   CPSR  0x5c
  49
  50  */
  51
  52
  53 .globl ASM_PFX(ExceptionHandlersStart)
  54 INTERWORK_FUNC(ExceptionHandlersStart)
  55 .globl ASM_PFX(ExceptionHandlersEnd)
  56 INTERWORK_FUNC(ExceptionHandlersEnd)
  57 .globl ASM_PFX(CommonExceptionEntry)
  58 INTERWORK_FUNC(CommonExceptionEntry)
  59 .globl ASM_PFX(AsmCommonExceptionEntry)
  60 INTERWORK_FUNC(AsmCommonExceptionEntry)
  61 .globl ASM_PFX(GdbExceptionHandler)
  62 INTERWORK_FUNC(GdbExceptionHandler)
  63
  64 .text
  65 .align 3
  66
  67
  68 //
  69 // This code gets copied to the ARM vector table
  70 // ExceptionHandlersStart - ExceptionHandlersEnd gets copied
  71 //
  72 ASM_PFX(ExceptionHandlersStart):
  73
  74 ASM_PFX(Reset):
  75   b ASM_PFX(Reset)
  76
  77 ASM_PFX(UndefinedInstruction):
  78   b ASM_PFX(UndefinedInstructionEntry)
  79
  80 ASM_PFX(SoftwareInterrupt):
  81   b ASM_PFX(SoftwareInterruptEntry)
  82
  83 ASM_PFX(PrefetchAbort):
  84   b ASM_PFX(PrefetchAbortEntry)
  85
  86 ASM_PFX(DataAbort):
  87   b ASM_PFX(DataAbortEntry)
  88
  89 ASM_PFX(ReservedException):
  90   b ASM_PFX(ReservedExceptionEntry)
  91
  92 ASM_PFX(Irq):
  93   b ASM_PFX(Irq)
  94
  95 ASM_PFX(Fiq):
  96   b ASM_PFX(FiqEntry)
  97
  98
  99 ASM_PFX(UndefinedInstructionEntry):
 100   sub       LR, LR, #4                @ Only -2 for Thumb, adjust in CommonExceptionEntry
 101   srsdb     #0x13!                    @ Store return state on SVC stack
 102   cpsid     f,#0x13                   @ Switch to SVC for common stack
 103   stmfd     SP!,{LR}                  @ Store the link register for the current mode
 104   sub       SP,SP,#0x20               @ Save space for SP, LR, PC, IFAR - CPSR
 105   stmfd     SP!,{R0-R12}              @ Store the register state
 106
 107   mov       R0,#1                     @ ExceptionType
 108   ldr       R1,ASM_PFX(CommonExceptionEntry)
 109   bx        R1
 110
 111 ASM_PFX(SoftwareInterruptEntry):
 112   sub       LR, LR, #4                @ Only -2 for Thumb, adjust in CommonExceptionEntry
 113   srsdb     #0x13!                    @ Store return state on SVC stack
 114   cpsid     f                         @ We are already in SVC mode
 115   stmfd     SP!,{LR}                  @ Store the link register for the current mode
 116   sub       SP,SP,#0x20               @ Save space for SP, LR, PC, IFAR - CPSR
 117   stmfd     SP!,{R0-R12}              @ Store the register state
 118
 119   mov       R0,#2                     @ ExceptionType
 120   ldr       R1,ASM_PFX(CommonExceptionEntry)
 121   bx        R1
 122
 123 ASM_PFX(PrefetchAbortEntry):
 124   sub       LR,LR,#4
 125   srsdb     #0x13!                    @ Store return state on SVC stack
 126   cpsid     f,#0x13                   @ Switch to SVC for common stack
 127   stmfd     SP!,{LR}                  @ Store the link register for the current mode
 128   sub       SP,SP,#0x20               @ Save space for SP, LR, PC, IFAR - CPSR
 129   stmfd     SP!,{R0-R12}              @ Store the register state
 130
 131   mov       R0,#3                     @ ExceptionType
 132   ldr       R1,ASM_PFX(CommonExceptionEntry)
 133   bx        R1
 134
 135 ASM_PFX(DataAbortEntry):
 136   sub       LR,LR,#8
 137   srsdb     #0x13!                    @ Store return state on SVC stack
 138   cpsid     f,#0x13                   @ Switch to SVC for common stack
 139   stmfd     SP!,{LR}                  @ Store the link register for the current mode
 140   sub       SP,SP,#0x20               @ Save space for SP, LR, PC, IFAR - CPSR
 141   stmfd     SP!,{R0-R12}              @ Store the register state
 142
 143   mov       R0,#4
 144   ldr       R1,ASM_PFX(CommonExceptionEntry)
 145   bx        R1
 146
 147 ASM_PFX(ReservedExceptionEntry):
 148   srsdb     #0x13!                    @ Store return state on SVC stack
 149   cpsid     f,#0x13                   @ Switch to SVC for common stack
 150   stmfd     SP!,{LR}                  @ Store the link register for the current mode
 151   sub       SP,SP,#0x20               @ Save space for SP, LR, PC, IFAR - CPSR
 152   stmfd     SP!,{R0-R12}              @ Store the register state
 153
 154   mov       R0,#5
 155   ldr       R1,ASM_PFX(CommonExceptionEntry)
 156   bx        R1
 157
 158 ASM_PFX(FiqEntry):
 159   sub       LR,LR,#4
 160   srsdb     #0x13!                    @ Store return state on SVC stack
 161   cps       #0x13                     @ Switch to SVC for common stack
 162   stmfd     SP!,{LR}                  @ Store the link register for the current mode
 163   sub       SP,SP,#0x20               @ Save space for SP, LR, PC, IFAR - CPSR
 164   stmfd     SP!,{R0-R12}              @ Store the register state
 165                                       @ Since we have already switch to SVC R8_fiq - R12_fiq
 166                                       @ never get used or saved
 167   mov       R0,#7                     @ ExceptionType
 168   ldr       R1,ASM_PFX(CommonExceptionEntry)
 169   bx        R1
 170
 171 //
 172 // This gets patched by the C code that patches in the vector table
 173 //
 174 ASM_PFX(CommonExceptionEntry):
 175   .byte       0x12
 176   .byte       0x34
 177   .byte       0x56
 178   .byte       0x78
 179
 180 ASM_PFX(ExceptionHandlersEnd):
 181
 182 //
 183 // This code runs from CpuDxe driver loaded address. It is patched into
 184 // CommonExceptionEntry.
 185 //
 186 ASM_PFX(AsmCommonExceptionEntry):
 187   mrc       p15, 0, R1, c6, c0, 2   @ Read IFAR
 188   str       R1, [SP, #0x50]         @ Store it in EFI_SYSTEM_CONTEXT_ARM.IFAR
 189
 190   mrc       p15, 0, R1, c5, c0, 1   @ Read IFSR
 191   str       R1, [SP, #0x4c]         @ Store it in EFI_SYSTEM_CONTEXT_ARM.IFSR
 192
 193   mrc       p15, 0, R1, c6, c0, 0   @ Read DFAR
 194   str       R1, [SP, #0x48]         @ Store it in EFI_SYSTEM_CONTEXT_ARM.DFAR
 195
 196   mrc       p15, 0, R1, c5, c0, 0   @ Read DFSR
 197   str       R1, [SP, #0x44]         @ Store it in EFI_SYSTEM_CONTEXT_ARM.DFSR
 198
 199   ldr       R1, [SP, #0x5c]         @ srsdb saved pre-exception CPSR on the stack
 200   str       R1, [SP, #0x40]         @ Store it in EFI_SYSTEM_CONTEXT_ARM.CPSR
 201
 202   add       R2, SP, #0x38           @ Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR
 203   and       R3, R1, #0x1f           @ Check CPSR to see if User or System Mode
 204   cmp       R3, #0x1f               @ if ((CPSR == 0x10) || (CPSR == 0x1df))
 205   cmpne     R3, #0x10               @
 206   stmeqed   R2, {lr}^               @   save unbanked lr
 207                                     @ else
 208   stmneed   R2, {lr}                @   save SVC lr
 209
 210
 211   ldr       R5, [SP, #0x58]         @ PC is the LR pushed by srsfd
 212                                     @ Check to see if we have to adjust for Thumb entry
 213   sub       r4, r0, #1              @ if (ExceptionType == 1 || ExceptionType ==2)) {
 214   cmp       r4, #1                  @   // UND & SVC have differnt LR adjust for Thumb
 215   bhi       NoAdjustNeeded
 216
 217   tst       r1, #0x20               @   if ((CPSR & T)) == T) {  // Thumb Mode on entry
 218   addne     R5, R5, #2              @     PC += 2@
 219   str       R5,[SP,#0x58]           @ Update LR value pused by srsfd
 220
 221 NoAdjustNeeded:
 222
 223   str       R5, [SP, #0x3c]         @ Store it in EFI_SYSTEM_CONTEXT_ARM.PC
 224
 225   sub       R1, SP, #0x60           @ We pused 0x60 bytes on the stack
 226   str       R1, [SP, #0x34]         @ Store it in EFI_SYSTEM_CONTEXT_ARM.SP
 227
 228                                     @ R0 is ExceptionType
 229   mov       R1,SP                   @ R1 is SystemContext
 230
 231 /*
 232 VOID
 233 EFIAPI
 234 GdbExceptionHandler (
 235   IN     EFI_EXCEPTION_TYPE           ExceptionType,   R0
 236   IN OUT EFI_SYSTEM_CONTEXT           SystemContext    R1
 237   )
 238
 239 */
 240   blx       ASM_PFX(GdbExceptionHandler)  @ Call exception handler
 241
 242   ldr       R1,[SP,#0x3c]           @ EFI_SYSTEM_CONTEXT_ARM.PC
 243   str       R1,[SP,#0x58]           @ Store it back to srsfd stack slot so it can be restored
 244
 245   ldr       R1,[SP,#0x40]           @ EFI_SYSTEM_CONTEXT_ARM.CPSR
 246   str       R1,[SP,#0x5c]           @ Store it back to srsfd stack slot so it can be restored
 247
 248   add       R3, SP, #0x54           @ Make R3 point to SVC LR saved on entry
 249   add       R2, SP, #0x38           @ Make R2 point to EFI_SYSTEM_CONTEXT_ARM.LR
 250   and       R1, R1, #0x1f           @ Check to see if User or System Mode
 251   cmp       R1, #0x1f               @ if ((CPSR == 0x10) || (CPSR == 0x1f))
 252   cmpne     R1, #0x10               @
 253   ldmeqed   R2, {lr}^               @   restore unbanked lr
 254                                     @ else
 255   ldmneed   R3, {lr}                @   restore SVC lr, via ldmfd SP!, {LR}
 256
 257   ldmfd     SP!,{R0-R12}            @ Restore general purpose registers
 258                                     @ Exception handler can not change SP
 259
 260   add       SP,SP,#0x20             @ Clear out the remaining stack space
 261   ldmfd     SP!,{LR}                @ restore the link register for this context
 262   rfefd     SP!                     @ return from exception via srsfd stack slot
 263