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1 /*++
2
3 Copyright (c) 2006 - 2007, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
8
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11
12 Module Name:
13
14 pcibus.h
15
16 Abstract:
17
18 PCI Bus Driver
19
20 Revision History
21
22 --*/
23
24 #ifndef _EFI_PCI_BUS_H
25 #define _EFI_PCI_BUS_H
26
27 //
28 // The package level header files this module uses
29 //
30 #include <PiDxe.h>
31 #include <Common/FrameworkStatusCode.h>
32 //
33 // The protocols, PPI and GUID defintions for this module
34 //
35 #include <Protocol/LoadedImage.h>
36 #include <Protocol/PciHostBridgeResourceAllocation.h>
37 #include <Protocol/PciIo.h>
38 #include <Guid/PciHotplugDevice.h>
39 #include <Protocol/PciRootBridgeIo.h>
40 #include <Protocol/PciHotPlugRequest.h>
41 #include <Protocol/DevicePath.h>
42 #include <Protocol/PciPlatform.h>
43 #include <Protocol/PciHotPlugInit.h>
44 #include <Protocol/Decompress.h>
45 #include <Guid/PciOptionRomTable.h>
46 #include <Protocol/BusSpecificDriverOverride.h>
47 #include <Protocol/UgaIo.h>
48 //
49 // The Library classes this module consumes
50 //
51 #include <Library/DebugLib.h>
52 #include <Library/UefiDriverEntryPoint.h>
53 #include <Library/BaseLib.h>
54 #include <Library/UefiLib.h>
55 #include <Library/BaseMemoryLib.h>
56 #include <Library/ReportStatusCodeLib.h>
57 #include <Library/MemoryAllocationLib.h>
58 #include <Library/UefiBootServicesTableLib.h>
59 #include <Library/DevicePathLib.h>
60 #include <Library/PcdLib.h>
61 #include <Library/PciIncompatibleDeviceSupportLib.h>
62
63 #include <IndustryStandard/Pci23.h>
64 #include <IndustryStandard/PeImage.h>
65 #include <IndustryStandard/Acpi.h>
66 #include "ComponentName.h"
67
68 ///
69 /// Device handle Extended Data. Used for many
70 /// errors and progress codes to point to the device.
71 ///
72 typedef struct {
73 EFI_HANDLE Handle;
74 } REPORT_STATUS_CODE_LIBRARY_DEVICE_HANDLE_EXTENDED_DATA;
75
76 ///
77 /// Resource Allocation Failure Extended Error Data
78 ///
79 typedef struct {
80 UINT32 Bar;
81 UINT16 DevicePathSize;
82 UINT16 ReqResSize;
83 UINT16 AllocResSize;
84 UINT8 *DevicePath;
85 UINT8 *ReqRes;
86 UINT8 *AllocRes;
87 } REPORT_STATUS_CODE_LIBRARY_RESOURCE_ALLOC_FAILURE_ERROR_DATA;
88
89
90 //
91 // Driver Produced Protocol Prototypes
92 //
93
94 #define VGABASE1 0x3B0
95 #define VGALIMIT1 0x3BB
96
97 #define VGABASE2 0x3C0
98 #define VGALIMIT2 0x3DF
99
100 #define ISABASE 0x100
101 #define ISALIMIT 0x3FF
102
103 typedef enum {
104 PciBarTypeUnknown = 0,
105 PciBarTypeIo16,
106 PciBarTypeIo32,
107 PciBarTypeMem32,
108 PciBarTypePMem32,
109 PciBarTypeMem64,
110 PciBarTypePMem64,
111 PciBarTypeIo,
112 PciBarTypeMem,
113 PciBarTypeMaxType
114 } PCI_BAR_TYPE;
115
116 typedef struct {
117 UINT64 BaseAddress;
118 UINT64 Length;
119 UINT64 Alignment;
120 PCI_BAR_TYPE BarType;
121 BOOLEAN Prefetchable;
122 UINT8 MemType;
123 UINT8 Offset;
124 } PCI_BAR;
125
126 #define PPB_BAR_0 0
127 #define PPB_BAR_1 1
128 #define PPB_IO_RANGE 2
129 #define PPB_MEM32_RANGE 3
130 #define PPB_PMEM32_RANGE 4
131 #define PPB_PMEM64_RANGE 5
132 #define PPB_MEM64_RANGE 0xFF
133
134 #define P2C_BAR_0 0
135 #define P2C_MEM_1 1
136 #define P2C_MEM_2 2
137 #define P2C_IO_1 3
138 #define P2C_IO_2 4
139
140 #define PCI_IO_DEVICE_SIGNATURE EFI_SIGNATURE_32 ('p', 'c', 'i', 'o')
141
142 #define EFI_BRIDGE_IO32_DECODE_SUPPORTED 0x0001
143 #define EFI_BRIDGE_PMEM32_DECODE_SUPPORTED 0x0002
144 #define EFI_BRIDGE_PMEM64_DECODE_SUPPORTED 0x0004
145 #define EFI_BRIDGE_IO16_DECODE_SUPPORTED 0x0008
146 #define EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED 0x0010
147 #define EFI_BRIDGE_MEM64_DECODE_SUPPORTED 0x0020
148 #define EFI_BRIDGE_MEM32_DECODE_SUPPORTED 0x0040
149
150 #define PCI_MAX_HOST_BRIDGE_NUM 0x0010
151 //
152 // Define resource status constant
153 //
154 #define EFI_RESOURCE_NONEXISTENT 0xFFFFFFFFFFFFFFFFULL
155 #define EFI_RESOURCE_LESS 0xFFFFFFFFFFFFFFFEULL
156 #define EFI_RESOURCE_SATISFIED 0x0000000000000000ULL
157
158 //
159 // Define option for attribute
160 //
161 #define EFI_SET_SUPPORTS 0
162 #define EFI_SET_ATTRIBUTES 1
163
164 typedef struct _PCI_IO_DEVICE {
165 UINT32 Signature;
166 EFI_HANDLE Handle;
167 EFI_PCI_IO_PROTOCOL PciIo;
168 LIST_ENTRY Link;
169
170 EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL PciDriverOverride;
171 EFI_DEVICE_PATH_PROTOCOL *DevicePath;
172 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
173
174 //
175 // PCI configuration space header type
176 //
177 PCI_TYPE00 Pci;
178
179 //
180 // Bus number, Device number, Function number
181 //
182 UINT8 BusNumber;
183 UINT8 DeviceNumber;
184 UINT8 FunctionNumber;
185
186 //
187 // BAR for this PCI Device
188 //
189 PCI_BAR PciBar[PCI_MAX_BAR];
190
191 //
192 // The bridge device this pci device is subject to
193 //
194 struct _PCI_IO_DEVICE *Parent;
195
196 //
197 // A linked list for children Pci Device if it is bridge device
198 //
199 LIST_ENTRY ChildList;
200
201 //
202 // TURE if the PCI bus driver creates the handle for this PCI device
203 //
204 BOOLEAN Registered;
205
206 //
207 // TRUE if the PCI bus driver successfully allocates the resource required by
208 // this PCI device
209 //
210 BOOLEAN Allocated;
211
212 //
213 // The attribute this PCI device currently set
214 //
215 UINT64 Attributes;
216
217 //
218 // The attributes this PCI device actually supports
219 //
220 UINT64 Supports;
221
222 //
223 // The resource decode the bridge supports
224 //
225 UINT32 Decodes;
226
227 //
228 // The OptionRom Size
229 //
230 UINT64 RomSize;
231
232 //
233 // The OptionRom Size
234 //
235 UINT64 RomBase;
236
237 //
238 // TRUE if all OpROM (in device or in platform specific position) have been processed
239 //
240 BOOLEAN AllOpRomProcessed;
241
242 //
243 // TRUE if there is any EFI driver in the OptionRom
244 //
245 BOOLEAN BusOverride;
246
247 //
248 // A list tracking reserved resource on a bridge device
249 //
250 LIST_ENTRY ReservedResourceList;
251
252 //
253 // A list tracking image handle of platform specific overriding driver
254 //
255 LIST_ENTRY OptionRomDriverList;
256
257 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *ResourcePaddingDescriptors;
258 EFI_HPC_PADDING_ATTRIBUTES PaddingAttributes;
259
260 BOOLEAN IsPciExp;
261
262 } PCI_IO_DEVICE;
263
264
265 #define PCI_IO_DEVICE_FROM_PCI_IO_THIS(a) \
266 CR (a, PCI_IO_DEVICE, PciIo, PCI_IO_DEVICE_SIGNATURE)
267
268 #define PCI_IO_DEVICE_FROM_PCI_DRIVER_OVERRIDE_THIS(a) \
269 CR (a, PCI_IO_DEVICE, PciDriverOverride, PCI_IO_DEVICE_SIGNATURE)
270
271 #define PCI_IO_DEVICE_FROM_LINK(a) \
272 CR (a, PCI_IO_DEVICE, Link, PCI_IO_DEVICE_SIGNATURE)
273
274 //
275 // Global Variables
276 //
277 extern EFI_DRIVER_BINDING_PROTOCOL gPciBusDriverBinding;
278 extern EFI_COMPONENT_NAME_PROTOCOL gPciBusComponentName;
279 extern LIST_ENTRY gPciDevicePool;
280 extern BOOLEAN gFullEnumeration;
281 extern UINTN gPciHostBridgeNumber;
282 extern EFI_HANDLE gPciHostBrigeHandles[PCI_MAX_HOST_BRIDGE_NUM];
283 extern UINT64 gAllOne;
284 extern UINT64 gAllZero;
285
286 extern EFI_PCI_PLATFORM_PROTOCOL *gPciPlatformProtocol;
287
288 #include "PciIo.h"
289 #include "PciCommand.h"
290 #include "PciDeviceSupport.h"
291 #include "PciEnumerator.h"
292 #include "PciEnumeratorSupport.h"
293 #include "PciDriverOverride.h"
294 #include "PciRomTable.h"
295 #include "PciOptionRomSupport.h"
296 #include "PciPowerManagement.h"
297 #include "PciHotPlugSupport.h"
298 #include "PciLib.h"
299
300 //
301 // PCI Bus Support Function Prototypes
302 //
303 EFI_STATUS
304 EFIAPI
305 PciBusDriverBindingSupported (
306 IN EFI_DRIVER_BINDING_PROTOCOL *This,
307 IN EFI_HANDLE Controller,
308 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
309 );
310
311 EFI_STATUS
312 EFIAPI
313 PciBusDriverBindingStart (
314 IN EFI_DRIVER_BINDING_PROTOCOL *This,
315 IN EFI_HANDLE Controller,
316 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
317 );
318
319 EFI_STATUS
320 EFIAPI
321 PciBusDriverBindingStop (
322 IN EFI_DRIVER_BINDING_PROTOCOL *This,
323 IN EFI_HANDLE Controller,
324 IN UINTN NumberOfChildren,
325 IN EFI_HANDLE *ChildHandleBuffer
326 );
327
328 #endif