IntelFrameworkModulePkg/Bus/Pci/PciBus/Dxe/pcibus.h

   1 /*++
   2
   3 Copyright (c) 2006 - 2007, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 Module Name:
  13
  14   pcibus.h
  15
  16 Abstract:
  17
  18   PCI Bus Driver
  19
  20 Revision History
  21
  22 --*/
  23
  24 #ifndef _EFI_PCI_BUS_H
  25 #define _EFI_PCI_BUS_H
  26
  27 //
  28 // The package level header files this module uses
  29 //
  30 #include <FrameworkDxe.h>
  31
  32 //
  33 // The protocols, PPI and GUID defintions for this module
  34 //
  35 #include <Protocol/LoadedImage.h>
  36 #include <Protocol/PciHostBridgeResourceAllocation.h>
  37 #include <Protocol/PciIo.h>
  38 #include <Guid/PciHotplugDevice.h>
  39 #include <Protocol/PciRootBridgeIo.h>
  40 #include <Protocol/PciHotPlugRequest.h>
  41 #include <Protocol/DevicePath.h>
  42 #include <Protocol/PciPlatform.h>
  43 #include <Protocol/PciHotPlugInit.h>
  44 #include <Protocol/Decompress.h>
  45 #include <Guid/PciOptionRomTable.h>
  46 #include <Protocol/BusSpecificDriverOverride.h>
  47 #include <Protocol/UgaIo.h>
  48 //
  49 // The Library classes this module consumes
  50 //
  51 #include <Library/DebugLib.h>
  52 #include <Library/UefiDriverEntryPoint.h>
  53 #include <Library/BaseLib.h>
  54 #include <Library/UefiLib.h>
  55 #include <Library/BaseMemoryLib.h>
  56 #include <Library/ReportStatusCodeLib.h>
  57 #include <Library/MemoryAllocationLib.h>
  58 #include <Library/UefiBootServicesTableLib.h>
  59 #include <Library/DevicePathLib.h>
  60 #include <Library/PcdLib.h>
  61 #include <Library/PciIncompatibleDeviceSupportLib.h>
  62
  63 #include <IndustryStandard/Pci23.h>
  64 #include <IndustryStandard/PeImage.h>
  65 #include <IndustryStandard/Acpi.h>
  66 #include "ComponentName.h"
  67
  68 //
  69 // Driver Produced Protocol Prototypes
  70 //
  71
  72 #define VGABASE1  0x3B0
  73 #define VGALIMIT1 0x3BB
  74
  75 #define VGABASE2  0x3C0
  76 #define VGALIMIT2 0x3DF
  77
  78 #define ISABASE   0x100
  79 #define ISALIMIT  0x3FF
  80
  81 typedef enum {
  82   PciBarTypeUnknown = 0,
  83   PciBarTypeIo16,
  84   PciBarTypeIo32,
  85   PciBarTypeMem32,
  86   PciBarTypePMem32,
  87   PciBarTypeMem64,
  88   PciBarTypePMem64,
  89   PciBarTypeIo,
  90   PciBarTypeMem,
  91   PciBarTypeMaxType
  92 } PCI_BAR_TYPE;
  93
  94 typedef struct {
  95   UINT64        BaseAddress;
  96   UINT64        Length;
  97   UINT64        Alignment;
  98   PCI_BAR_TYPE  BarType;
  99   BOOLEAN       Prefetchable;
 100   UINT8         MemType;
 101   UINT8         Offset;
 102 } PCI_BAR;
 103
 104 #define PPB_BAR_0                             0
 105 #define PPB_BAR_1                             1
 106 #define PPB_IO_RANGE                          2
 107 #define PPB_MEM32_RANGE                       3
 108 #define PPB_PMEM32_RANGE                      4
 109 #define PPB_PMEM64_RANGE                      5
 110 #define PPB_MEM64_RANGE                       0xFF
 111
 112 #define P2C_BAR_0                             0
 113 #define P2C_MEM_1                             1
 114 #define P2C_MEM_2                             2
 115 #define P2C_IO_1                              3
 116 #define P2C_IO_2                              4
 117
 118 #define PCI_IO_DEVICE_SIGNATURE               EFI_SIGNATURE_32 ('p', 'c', 'i', 'o')
 119
 120 #define EFI_BRIDGE_IO32_DECODE_SUPPORTED      0x0001
 121 #define EFI_BRIDGE_PMEM32_DECODE_SUPPORTED    0x0002
 122 #define EFI_BRIDGE_PMEM64_DECODE_SUPPORTED    0x0004
 123 #define EFI_BRIDGE_IO16_DECODE_SUPPORTED      0x0008
 124 #define EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED 0x0010
 125 #define EFI_BRIDGE_MEM64_DECODE_SUPPORTED     0x0020
 126 #define EFI_BRIDGE_MEM32_DECODE_SUPPORTED     0x0040
 127
 128 #define PCI_MAX_HOST_BRIDGE_NUM               0x0010
 129 //
 130 // Define resource status constant
 131 //
 132 #define EFI_RESOURCE_NONEXISTENT  0xFFFFFFFFFFFFFFFFULL
 133 #define EFI_RESOURCE_LESS         0xFFFFFFFFFFFFFFFEULL
 134 #define EFI_RESOURCE_SATISFIED    0x0000000000000000ULL
 135
 136 //
 137 // Define option for attribute
 138 //
 139 #define EFI_SET_SUPPORTS    0
 140 #define EFI_SET_ATTRIBUTES  1
 141
 142 typedef struct _PCI_IO_DEVICE {
 143   UINT32                                    Signature;
 144   EFI_HANDLE                                Handle;
 145   EFI_PCI_IO_PROTOCOL                       PciIo;
 146   LIST_ENTRY                                Link;
 147
 148   EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL PciDriverOverride;
 149   EFI_DEVICE_PATH_PROTOCOL                  *DevicePath;
 150   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *PciRootBridgeIo;
 151
 152   //
 153   // PCI configuration space header type
 154   //
 155   PCI_TYPE00                                Pci;
 156
 157   //
 158   // Bus number, Device number, Function number
 159   //
 160   UINT8                                     BusNumber;
 161   UINT8                                     DeviceNumber;
 162   UINT8                                     FunctionNumber;
 163
 164   //
 165   // BAR for this PCI Device
 166   //
 167   PCI_BAR                                   PciBar[PCI_MAX_BAR];
 168
 169   //
 170   // The bridge device this pci device is subject to
 171   //
 172   struct _PCI_IO_DEVICE                     *Parent;
 173
 174   //
 175   // A linked list for children Pci Device if it is bridge device
 176   //
 177   LIST_ENTRY                                ChildList;
 178
 179   //
 180   // TURE if the PCI bus driver creates the handle for this PCI device
 181   //
 182   BOOLEAN                                   Registered;
 183
 184   //
 185   // TRUE if the PCI bus driver successfully allocates the resource required by
 186   // this PCI device
 187   //
 188   BOOLEAN                                   Allocated;
 189
 190   //
 191   // The attribute this PCI device currently set
 192   //
 193   UINT64                                    Attributes;
 194
 195   //
 196   // The attributes this PCI device actually supports
 197   //
 198   UINT64                                    Supports;
 199
 200   //
 201   // The resource decode the bridge supports
 202   //
 203   UINT32                                    Decodes;
 204
 205   //
 206   // The OptionRom Size
 207   //
 208   UINT64                                    RomSize;
 209
 210   //
 211   // The OptionRom Size
 212   //
 213   UINT64                                    RomBase;
 214
 215   //
 216   // TRUE if all OpROM (in device or in platform specific position) have been processed
 217   //
 218   BOOLEAN                                   AllOpRomProcessed;
 219
 220   //
 221   // TRUE if there is any EFI driver in the OptionRom
 222   //
 223   BOOLEAN                                   BusOverride;
 224
 225   //
 226   //  A list tracking reserved resource on a bridge device
 227   //
 228   LIST_ENTRY                                ReservedResourceList;
 229
 230   //
 231   // A list tracking image handle of platform specific overriding driver
 232   //
 233   LIST_ENTRY                                OptionRomDriverList;
 234
 235   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR         *ResourcePaddingDescriptors;
 236   EFI_HPC_PADDING_ATTRIBUTES                PaddingAttributes;
 237
 238   BOOLEAN                                   IsPciExp;
 239
 240 } PCI_IO_DEVICE;
 241
 242
 243 #define PCI_IO_DEVICE_FROM_PCI_IO_THIS(a) \
 244   CR (a, PCI_IO_DEVICE, PciIo, PCI_IO_DEVICE_SIGNATURE)
 245
 246 #define PCI_IO_DEVICE_FROM_PCI_DRIVER_OVERRIDE_THIS(a) \
 247   CR (a, PCI_IO_DEVICE, PciDriverOverride, PCI_IO_DEVICE_SIGNATURE)
 248
 249 #define PCI_IO_DEVICE_FROM_LINK(a) \
 250   CR (a, PCI_IO_DEVICE, Link, PCI_IO_DEVICE_SIGNATURE)
 251
 252 //
 253 // Global Variables
 254 //
 255 extern EFI_DRIVER_BINDING_PROTOCOL                  gPciBusDriverBinding;
 256 extern EFI_COMPONENT_NAME_PROTOCOL                  gPciBusComponentName;
 257 extern LIST_ENTRY                                   gPciDevicePool;
 258 extern BOOLEAN                                      gFullEnumeration;
 259 extern UINTN                                        gPciHostBridgeNumber;
 260 extern EFI_HANDLE                                   gPciHostBrigeHandles[PCI_MAX_HOST_BRIDGE_NUM];
 261 extern UINT64                                       gAllOne;
 262 extern UINT64                                       gAllZero;
 263
 264 extern EFI_PCI_PLATFORM_PROTOCOL                    *gPciPlatformProtocol;
 265
 266 #include "PciIo.h"
 267 #include "PciCommand.h"
 268 #include "PciDeviceSupport.h"
 269 #include "PciEnumerator.h"
 270 #include "PciEnumeratorSupport.h"
 271 #include "PciDriverOverride.h"
 272 #include "PciRomTable.h"
 273 #include "PciOptionRomSupport.h"
 274 #include "PciPowerManagement.h"
 275 #include "PciHotPlugSupport.h"
 276 #include "PciLib.h"
 277
 278 //
 279 // PCI Bus Support Function Prototypes
 280 //
 281 EFI_STATUS
 282 EFIAPI
 283 PciBusDriverBindingSupported (
 284   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 285   IN EFI_HANDLE                     Controller,
 286   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 287   );
 288
 289 EFI_STATUS
 290 EFIAPI
 291 PciBusDriverBindingStart (
 292   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 293   IN EFI_HANDLE                     Controller,
 294   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 295   );
 296
 297 EFI_STATUS
 298 EFIAPI
 299 PciBusDriverBindingStop (
 300   IN  EFI_DRIVER_BINDING_PROTOCOL   *This,
 301   IN  EFI_HANDLE                    Controller,
 302   IN  UINTN                         NumberOfChildren,
 303   IN  EFI_HANDLE                    *ChildHandleBuffer
 304   );
 305
 306 #endif