IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBus.h

   1 /** @file
   2
   3 Copyright (c) 2006, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 **/
  13
  14
  15 #ifndef _EFI_PCI_BUS_H_
  16 #define _EFI_PCI_BUS_H_
  17
  18
  19 #include <FrameworkDxe.h>
  20
  21
  22 #include <Protocol/LoadedImage.h>
  23 #include <Protocol/PciHostBridgeResourceAllocation.h>
  24 #include <Protocol/PciIo.h>
  25 #include <Protocol/LoadFile2.h>
  26 #include <Protocol/PciRootBridgeIo.h>
  27 #include <Protocol/PciHotPlugRequest.h>
  28 #include <Protocol/DevicePath.h>
  29 #include <Protocol/PciPlatform.h>
  30 #include <Protocol/PciHotPlugInit.h>
  31 #include <Protocol/Decompress.h>
  32 #include <Protocol/BusSpecificDriverOverride.h>
  33 #include <Protocol/UgaIo.h>
  34 #include <Protocol/IncompatiblePciDeviceSupport.h>
  35
  36 #include <Library/DebugLib.h>
  37 #include <Library/UefiDriverEntryPoint.h>
  38 #include <Library/BaseLib.h>
  39 #include <Library/UefiLib.h>
  40 #include <Library/BaseMemoryLib.h>
  41 #include <Library/ReportStatusCodeLib.h>
  42 #include <Library/MemoryAllocationLib.h>
  43 #include <Library/UefiBootServicesTableLib.h>
  44 #include <Library/DevicePathLib.h>
  45 #include <Library/PcdLib.h>
  46 #include <Library/PciIncompatibleDeviceSupportLib.h>
  47 #include <Library/PeCoffLib.h>
  48
  49 #include <IndustryStandard/Pci.h>
  50 #include <IndustryStandard/PeImage.h>
  51 #include <IndustryStandard/Acpi.h>
  52 #include "ComponentName.h"
  53
  54
  55 //
  56 // Global Variables
  57 //
  58 extern EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *gEfiIncompatiblePciDeviceSupport;
  59 extern EFI_DRIVER_BINDING_PROTOCOL                  gPciBusDriverBinding;
  60 extern EFI_COMPONENT_NAME_PROTOCOL                  gPciBusComponentName;
  61 extern EFI_COMPONENT_NAME2_PROTOCOL                 gPciBusComponentName2;
  62
  63 //
  64 // Driver Produced Protocol Prototypes
  65 //
  66
  67 #define VGABASE1  0x3B0
  68 #define VGALIMIT1 0x3BB
  69
  70 #define VGABASE2  0x3C0
  71 #define VGALIMIT2 0x3DF
  72
  73 #define ISABASE   0x100
  74 #define ISALIMIT  0x3FF
  75
  76 typedef enum {
  77   PciBarTypeUnknown = 0,
  78   PciBarTypeIo16,
  79   PciBarTypeIo32,
  80   PciBarTypeMem32,
  81   PciBarTypePMem32,
  82   PciBarTypeMem64,
  83   PciBarTypePMem64,
  84   PciBarTypeIo,
  85   PciBarTypeMem,
  86   PciBarTypeMaxType
  87 } PCI_BAR_TYPE;
  88
  89 typedef struct {
  90   UINT64        BaseAddress;
  91   UINT64        Length;
  92   UINT64        Alignment;
  93   PCI_BAR_TYPE  BarType;
  94   BOOLEAN       Prefetchable;
  95   UINT8         MemType;
  96   UINT8         Offset;
  97 } PCI_BAR;
  98
  99 #define PPB_BAR_0                             0
 100 #define PPB_BAR_1                             1
 101 #define PPB_IO_RANGE                          2
 102 #define PPB_MEM32_RANGE                       3
 103 #define PPB_PMEM32_RANGE                      4
 104 #define PPB_PMEM64_RANGE                      5
 105 #define PPB_MEM64_RANGE                       0xFF
 106
 107 #define P2C_BAR_0                             0
 108 #define P2C_MEM_1                             1
 109 #define P2C_MEM_2                             2
 110 #define P2C_IO_1                              3
 111 #define P2C_IO_2                              4
 112
 113 #define PCI_IO_DEVICE_SIGNATURE               SIGNATURE_32 ('p', 'c', 'i', 'o')
 114
 115 #define EFI_BRIDGE_IO32_DECODE_SUPPORTED      0x0001
 116 #define EFI_BRIDGE_PMEM32_DECODE_SUPPORTED    0x0002
 117 #define EFI_BRIDGE_PMEM64_DECODE_SUPPORTED    0x0004
 118 #define EFI_BRIDGE_IO16_DECODE_SUPPORTED      0x0008
 119 #define EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED 0x0010
 120 #define EFI_BRIDGE_MEM64_DECODE_SUPPORTED     0x0020
 121 #define EFI_BRIDGE_MEM32_DECODE_SUPPORTED     0x0040
 122
 123 #define PCI_MAX_HOST_BRIDGE_NUM               0x0010
 124
 125 //
 126 // Define option for attribute
 127 //
 128 #define EFI_SET_SUPPORTS    0
 129 #define EFI_SET_ATTRIBUTES  1
 130
 131 typedef struct _PCI_IO_DEVICE {
 132   UINT32                                    Signature;
 133   EFI_HANDLE                                Handle;
 134   EFI_PCI_IO_PROTOCOL                       PciIo;
 135   LIST_ENTRY                                Link;
 136
 137   EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL PciDriverOverride;
 138   EFI_DEVICE_PATH_PROTOCOL                  *DevicePath;
 139   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *PciRootBridgeIo;
 140   EFI_LOAD_FILE2_PROTOCOL                   LoadFile2;
 141
 142   //
 143   // PCI configuration space header type
 144   //
 145   PCI_TYPE00                                Pci;
 146
 147   //
 148   // Bus number, Device number, Function number
 149   //
 150   UINT8                                     BusNumber;
 151   UINT8                                     DeviceNumber;
 152   UINT8                                     FunctionNumber;
 153
 154   //
 155   // BAR for this PCI Device
 156   //
 157   PCI_BAR                                   PciBar[PCI_MAX_BAR];
 158
 159   //
 160   // The bridge device this pci device is subject to
 161   //
 162   struct _PCI_IO_DEVICE                     *Parent;
 163
 164   //
 165   // A linked list for children Pci Device if it is bridge device
 166   //
 167   LIST_ENTRY                                ChildList;
 168
 169   //
 170   // TURE if the PCI bus driver creates the handle for this PCI device
 171   //
 172   BOOLEAN                                   Registered;
 173
 174   //
 175   // TRUE if the PCI bus driver successfully allocates the resource required by
 176   // this PCI device
 177   //
 178   BOOLEAN                                   Allocated;
 179
 180   //
 181   // The attribute this PCI device currently set
 182   //
 183   UINT64                                    Attributes;
 184
 185   //
 186   // The attributes this PCI device actually supports
 187   //
 188   UINT64                                    Supports;
 189
 190   //
 191   // The resource decode the bridge supports
 192   //
 193   UINT32                                    Decodes;
 194
 195   //
 196   // The OptionRom Size
 197   //
 198   UINT64                                    RomSize;
 199
 200   //
 201   // The OptionRom Size
 202   //
 203   UINT64                                    RomBase;
 204
 205   //
 206   // TRUE if all OpROM (in device or in platform specific position) have been processed
 207   //
 208   BOOLEAN                                   AllOpRomProcessed;
 209
 210   //
 211   // TRUE if there is any EFI driver in the OptionRom
 212   //
 213   BOOLEAN                                   BusOverride;
 214
 215   //
 216   //  A list tracking reserved resource on a bridge device
 217   //
 218   LIST_ENTRY                                ReservedResourceList;
 219
 220   //
 221   // A list tracking image handle of platform specific overriding driver
 222   //
 223   LIST_ENTRY                                OptionRomDriverList;
 224
 225   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR         *ResourcePaddingDescriptors;
 226   EFI_HPC_PADDING_ATTRIBUTES                PaddingAttributes;
 227
 228   BOOLEAN                                   IsPciExp;
 229
 230 } PCI_IO_DEVICE;
 231
 232
 233 #define PCI_IO_DEVICE_FROM_PCI_IO_THIS(a) \
 234   CR (a, PCI_IO_DEVICE, PciIo, PCI_IO_DEVICE_SIGNATURE)
 235
 236 #define PCI_IO_DEVICE_FROM_PCI_DRIVER_OVERRIDE_THIS(a) \
 237   CR (a, PCI_IO_DEVICE, PciDriverOverride, PCI_IO_DEVICE_SIGNATURE)
 238
 239 #define PCI_IO_DEVICE_FROM_LINK(a) \
 240   CR (a, PCI_IO_DEVICE, Link, PCI_IO_DEVICE_SIGNATURE)
 241
 242 #define PCI_IO_DEVICE_FROM_LOAD_FILE2_THIS(a) \
 243   CR (a, PCI_IO_DEVICE, LoadFile2, PCI_IO_DEVICE_SIGNATURE)
 244
 245 //
 246 // Global Variables
 247 //
 248 extern LIST_ENTRY                                   gPciDevicePool;
 249 extern BOOLEAN                                      gFullEnumeration;
 250 extern UINTN                                        gPciHostBridgeNumber;
 251 extern EFI_HANDLE                                   gPciHostBrigeHandles[PCI_MAX_HOST_BRIDGE_NUM];
 252 extern UINT64                                       gAllOne;
 253 extern UINT64                                       gAllZero;
 254
 255 extern EFI_PCI_PLATFORM_PROTOCOL                    *gPciPlatformProtocol;
 256
 257 #include "PciIo.h"
 258 #include "PciCommand.h"
 259 #include "PciDeviceSupport.h"
 260 #include "PciEnumerator.h"
 261 #include "PciEnumeratorSupport.h"
 262 #include "PciDriverOverride.h"
 263 #include "PciRomTable.h"
 264 #include "PciOptionRomSupport.h"
 265 #include "PciPowerManagement.h"
 266 #include "PciHotPlugSupport.h"
 267 #include "PciLib.h"
 268
 269 //
 270 // PCI Bus Support Function Prototypes
 271 //
 272 /**
 273   Test to see if this driver supports ControllerHandle. Any ControllerHandle
 274   than contains a gEfiPciRootBridgeIoProtocolGuid protocol can be supported.
 275
 276   @param  This                Protocol instance pointer.
 277   @param  ControllerHandle    Handle of device to test.
 278   @param  RemainingDevicePath Optional parameter use to pick a specific child.
 279                               device to start.
 280
 281   @retval EFI_SUCCESS         This driver supports this device.
 282   @retval EFI_ALREADY_STARTED This driver is already running on this device.
 283   @retval other               This driver does not support this device.
 284
 285 **/
 286 EFI_STATUS
 287 EFIAPI
 288 PciBusDriverBindingSupported (
 289   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 290   IN EFI_HANDLE                     Controller,
 291   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 292   );
 293
 294 /**
 295   Start this driver on ControllerHandle and enumerate Pci bus and start
 296   all device under PCI bus.
 297
 298   @param  This                 Protocol instance pointer.
 299   @param  ControllerHandle     Handle of device to bind driver to.
 300   @param  RemainingDevicePath  Optional parameter use to pick a specific child.
 301                                device to start.
 302
 303   @retval EFI_SUCCESS          This driver is added to ControllerHandle.
 304   @retval EFI_ALREADY_STARTED  This driver is already running on ControllerHandle.
 305   @retval other                This driver does not support this device.
 306
 307 **/
 308 EFI_STATUS
 309 EFIAPI
 310 PciBusDriverBindingStart (
 311   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 312   IN EFI_HANDLE                     Controller,
 313   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 314   );
 315
 316 /**
 317   Stop this driver on ControllerHandle. Support stoping any child handles
 318   created by this driver.
 319
 320   @param  This              Protocol instance pointer.
 321   @param  ControllerHandle  Handle of device to stop driver on.
 322   @param  NumberOfChildren  Number of Handles in ChildHandleBuffer. If number of
 323                             children is zero stop the entire bus driver.
 324   @param  ChildHandleBuffer List of Child Handles to Stop.
 325
 326   @retval EFI_SUCCESS       This driver is removed ControllerHandle.
 327   @retval other             This driver was not removed from this device.
 328
 329 **/
 330 EFI_STATUS
 331 EFIAPI
 332 PciBusDriverBindingStop (
 333   IN  EFI_DRIVER_BINDING_PROTOCOL   *This,
 334   IN  EFI_HANDLE                    Controller,
 335   IN  UINTN                         NumberOfChildren,
 336   IN  EFI_HANDLE                    *ChildHandleBuffer
 337   );
 338
 339 #define IS_PCI_GFX(_p)     IS_CLASS2 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_OTHER)
 340
 341 #endif