IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciBus.h

   1 /** @file
   2
   3 Copyright (c) 2006, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 **/
  13
  14
  15 #ifndef _EFI_PCI_BUS_H_
  16 #define _EFI_PCI_BUS_H_
  17
  18
  19 #include <FrameworkDxe.h>
  20
  21
  22 #include <Protocol/LoadedImage.h>
  23 #include <Protocol/PciHostBridgeResourceAllocation.h>
  24 #include <Protocol/PciIo.h>
  25 #include <Guid/PciHotplugDevice.h>
  26 #include <Protocol/PciRootBridgeIo.h>
  27 #include <Protocol/PciHotPlugRequest.h>
  28 #include <Protocol/DevicePath.h>
  29 #include <Protocol/PciPlatform.h>
  30 #include <Protocol/PciHotPlugInit.h>
  31 #include <Protocol/Decompress.h>
  32 #include <Guid/PciOptionRomTable.h>
  33 #include <Protocol/BusSpecificDriverOverride.h>
  34 #include <Protocol/UgaIo.h>
  35 #include <Protocol/IncompatiblePciDeviceSupport.h>
  36
  37 #include <Library/DebugLib.h>
  38 #include <Library/UefiDriverEntryPoint.h>
  39 #include <Library/BaseLib.h>
  40 #include <Library/UefiLib.h>
  41 #include <Library/BaseMemoryLib.h>
  42 #include <Library/ReportStatusCodeLib.h>
  43 #include <Library/MemoryAllocationLib.h>
  44 #include <Library/UefiBootServicesTableLib.h>
  45 #include <Library/DevicePathLib.h>
  46 #include <Library/PcdLib.h>
  47 #include <Library/PciIncompatibleDeviceSupportLib.h>
  48 #include <Library/PeCoffLib.h>
  49
  50 #include <IndustryStandard/Pci.h>
  51 #include <IndustryStandard/PeImage.h>
  52 #include <IndustryStandard/Acpi.h>
  53 #include "ComponentName.h"
  54
  55 //
  56 // Driver Produced Protocol Prototypes
  57 //
  58
  59 #define VGABASE1  0x3B0
  60 #define VGALIMIT1 0x3BB
  61
  62 #define VGABASE2  0x3C0
  63 #define VGALIMIT2 0x3DF
  64
  65 #define ISABASE   0x100
  66 #define ISALIMIT  0x3FF
  67
  68 typedef enum {
  69   PciBarTypeUnknown = 0,
  70   PciBarTypeIo16,
  71   PciBarTypeIo32,
  72   PciBarTypeMem32,
  73   PciBarTypePMem32,
  74   PciBarTypeMem64,
  75   PciBarTypePMem64,
  76   PciBarTypeIo,
  77   PciBarTypeMem,
  78   PciBarTypeMaxType
  79 } PCI_BAR_TYPE;
  80
  81 typedef struct {
  82   UINT64        BaseAddress;
  83   UINT64        Length;
  84   UINT64        Alignment;
  85   PCI_BAR_TYPE  BarType;
  86   BOOLEAN       Prefetchable;
  87   UINT8         MemType;
  88   UINT8         Offset;
  89 } PCI_BAR;
  90
  91 #define PPB_BAR_0                             0
  92 #define PPB_BAR_1                             1
  93 #define PPB_IO_RANGE                          2
  94 #define PPB_MEM32_RANGE                       3
  95 #define PPB_PMEM32_RANGE                      4
  96 #define PPB_PMEM64_RANGE                      5
  97 #define PPB_MEM64_RANGE                       0xFF
  98
  99 #define P2C_BAR_0                             0
 100 #define P2C_MEM_1                             1
 101 #define P2C_MEM_2                             2
 102 #define P2C_IO_1                              3
 103 #define P2C_IO_2                              4
 104
 105 #define PCI_IO_DEVICE_SIGNATURE               SIGNATURE_32 ('p', 'c', 'i', 'o')
 106
 107 #define EFI_BRIDGE_IO32_DECODE_SUPPORTED      0x0001
 108 #define EFI_BRIDGE_PMEM32_DECODE_SUPPORTED    0x0002
 109 #define EFI_BRIDGE_PMEM64_DECODE_SUPPORTED    0x0004
 110 #define EFI_BRIDGE_IO16_DECODE_SUPPORTED      0x0008
 111 #define EFI_BRIDGE_PMEM_MEM_COMBINE_SUPPORTED 0x0010
 112 #define EFI_BRIDGE_MEM64_DECODE_SUPPORTED     0x0020
 113 #define EFI_BRIDGE_MEM32_DECODE_SUPPORTED     0x0040
 114
 115 #define PCI_MAX_HOST_BRIDGE_NUM               0x0010
 116
 117 //
 118 // Define option for attribute
 119 //
 120 #define EFI_SET_SUPPORTS    0
 121 #define EFI_SET_ATTRIBUTES  1
 122
 123 typedef struct _PCI_IO_DEVICE {
 124   UINT32                                    Signature;
 125   EFI_HANDLE                                Handle;
 126   EFI_PCI_IO_PROTOCOL                       PciIo;
 127   LIST_ENTRY                                Link;
 128
 129   EFI_BUS_SPECIFIC_DRIVER_OVERRIDE_PROTOCOL PciDriverOverride;
 130   EFI_DEVICE_PATH_PROTOCOL                  *DevicePath;
 131   EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           *PciRootBridgeIo;
 132
 133   //
 134   // PCI configuration space header type
 135   //
 136   PCI_TYPE00                                Pci;
 137
 138   //
 139   // Bus number, Device number, Function number
 140   //
 141   UINT8                                     BusNumber;
 142   UINT8                                     DeviceNumber;
 143   UINT8                                     FunctionNumber;
 144
 145   //
 146   // BAR for this PCI Device
 147   //
 148   PCI_BAR                                   PciBar[PCI_MAX_BAR];
 149
 150   //
 151   // The bridge device this pci device is subject to
 152   //
 153   struct _PCI_IO_DEVICE                     *Parent;
 154
 155   //
 156   // A linked list for children Pci Device if it is bridge device
 157   //
 158   LIST_ENTRY                                ChildList;
 159
 160   //
 161   // TURE if the PCI bus driver creates the handle for this PCI device
 162   //
 163   BOOLEAN                                   Registered;
 164
 165   //
 166   // TRUE if the PCI bus driver successfully allocates the resource required by
 167   // this PCI device
 168   //
 169   BOOLEAN                                   Allocated;
 170
 171   //
 172   // The attribute this PCI device currently set
 173   //
 174   UINT64                                    Attributes;
 175
 176   //
 177   // The attributes this PCI device actually supports
 178   //
 179   UINT64                                    Supports;
 180
 181   //
 182   // The resource decode the bridge supports
 183   //
 184   UINT32                                    Decodes;
 185
 186   //
 187   // The OptionRom Size
 188   //
 189   UINT64                                    RomSize;
 190
 191   //
 192   // The OptionRom Size
 193   //
 194   UINT64                                    RomBase;
 195
 196   //
 197   // TRUE if all OpROM (in device or in platform specific position) have been processed
 198   //
 199   BOOLEAN                                   AllOpRomProcessed;
 200
 201   //
 202   // TRUE if there is any EFI driver in the OptionRom
 203   //
 204   BOOLEAN                                   BusOverride;
 205
 206   //
 207   //  A list tracking reserved resource on a bridge device
 208   //
 209   LIST_ENTRY                                ReservedResourceList;
 210
 211   //
 212   // A list tracking image handle of platform specific overriding driver
 213   //
 214   LIST_ENTRY                                OptionRomDriverList;
 215
 216   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR         *ResourcePaddingDescriptors;
 217   EFI_HPC_PADDING_ATTRIBUTES                PaddingAttributes;
 218
 219   BOOLEAN                                   IsPciExp;
 220
 221 } PCI_IO_DEVICE;
 222
 223
 224 #define PCI_IO_DEVICE_FROM_PCI_IO_THIS(a) \
 225   CR (a, PCI_IO_DEVICE, PciIo, PCI_IO_DEVICE_SIGNATURE)
 226
 227 #define PCI_IO_DEVICE_FROM_PCI_DRIVER_OVERRIDE_THIS(a) \
 228   CR (a, PCI_IO_DEVICE, PciDriverOverride, PCI_IO_DEVICE_SIGNATURE)
 229
 230 #define PCI_IO_DEVICE_FROM_LINK(a) \
 231   CR (a, PCI_IO_DEVICE, Link, PCI_IO_DEVICE_SIGNATURE)
 232
 233 //
 234 // Global Variables
 235 //
 236 extern EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *gEfiIncompatiblePciDeviceSupport;
 237 extern EFI_DRIVER_BINDING_PROTOCOL                  gPciBusDriverBinding;
 238 extern EFI_COMPONENT_NAME_PROTOCOL                  gPciBusComponentName;
 239 extern EFI_COMPONENT_NAME2_PROTOCOL                 gPciBusComponentName2;
 240 extern LIST_ENTRY                                   gPciDevicePool;
 241 extern BOOLEAN                                      gFullEnumeration;
 242 extern UINTN                                        gPciHostBridgeNumber;
 243 extern EFI_HANDLE                                   gPciHostBrigeHandles[PCI_MAX_HOST_BRIDGE_NUM];
 244 extern UINT64                                       gAllOne;
 245 extern UINT64                                       gAllZero;
 246
 247 extern EFI_PCI_PLATFORM_PROTOCOL                    *gPciPlatformProtocol;
 248
 249 #include "PciIo.h"
 250 #include "PciCommand.h"
 251 #include "PciDeviceSupport.h"
 252 #include "PciEnumerator.h"
 253 #include "PciEnumeratorSupport.h"
 254 #include "PciDriverOverride.h"
 255 #include "PciRomTable.h"
 256 #include "PciOptionRomSupport.h"
 257 #include "PciPowerManagement.h"
 258 #include "PciHotPlugSupport.h"
 259 #include "PciLib.h"
 260
 261 //
 262 // PCI Bus Support Function Prototypes
 263 //
 264 /**
 265   Test to see if this driver supports ControllerHandle. Any ControllerHandle
 266   than contains a gEfiPciRootBridgeIoProtocolGuid protocol can be supported.
 267
 268   @param  This                Protocol instance pointer.
 269   @param  ControllerHandle    Handle of device to test.
 270   @param  RemainingDevicePath Optional parameter use to pick a specific child.
 271                               device to start.
 272
 273   @retval EFI_SUCCESS         This driver supports this device.
 274   @retval EFI_ALREADY_STARTED This driver is already running on this device.
 275   @retval other               This driver does not support this device.
 276
 277 **/
 278 EFI_STATUS
 279 EFIAPI
 280 PciBusDriverBindingSupported (
 281   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 282   IN EFI_HANDLE                     Controller,
 283   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 284   );
 285
 286 /**
 287   Start this driver on ControllerHandle and enumerate Pci bus and start
 288   all device under PCI bus.
 289
 290   @param  This                 Protocol instance pointer.
 291   @param  ControllerHandle     Handle of device to bind driver to.
 292   @param  RemainingDevicePath  Optional parameter use to pick a specific child.
 293                                device to start.
 294
 295   @retval EFI_SUCCESS          This driver is added to ControllerHandle.
 296   @retval EFI_ALREADY_STARTED  This driver is already running on ControllerHandle.
 297   @retval other                This driver does not support this device.
 298
 299 **/
 300 EFI_STATUS
 301 EFIAPI
 302 PciBusDriverBindingStart (
 303   IN EFI_DRIVER_BINDING_PROTOCOL    *This,
 304   IN EFI_HANDLE                     Controller,
 305   IN EFI_DEVICE_PATH_PROTOCOL       *RemainingDevicePath
 306   );
 307
 308 /**
 309   Stop this driver on ControllerHandle. Support stoping any child handles
 310   created by this driver.
 311
 312   @param  This              Protocol instance pointer.
 313   @param  ControllerHandle  Handle of device to stop driver on.
 314   @param  NumberOfChildren  Number of Handles in ChildHandleBuffer. If number of
 315                             children is zero stop the entire bus driver.
 316   @param  ChildHandleBuffer List of Child Handles to Stop.
 317
 318   @retval EFI_SUCCESS       This driver is removed ControllerHandle.
 319   @retval other             This driver was not removed from this device.
 320
 321 **/
 322 EFI_STATUS
 323 EFIAPI
 324 PciBusDriverBindingStop (
 325   IN  EFI_DRIVER_BINDING_PROTOCOL   *This,
 326   IN  EFI_HANDLE                    Controller,
 327   IN  UINTN                         NumberOfChildren,
 328   IN  EFI_HANDLE                    *ChildHandleBuffer
 329   );
 330
 331 #define IS_PCI_GFX(_p)     IS_CLASS2 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_OTHER)
 332
 333 #endif