IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.c

   1 /**@file
   2
   3 Copyright (c) 2006, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 **/
  13
  14
  15 #include "pcibus.h"
  16
  17 EFI_STATUS
  18 PciOperateRegister (
  19   IN  PCI_IO_DEVICE *PciIoDevice,
  20   IN  UINT16        Command,
  21   IN  UINT8         Offset,
  22   IN  UINT8         Operation,
  23   OUT UINT16        *PtrCommand
  24   )
  25 /*++
  26
  27 Routine Description:
  28
  29 Arguments:
  30
  31 Returns:
  32
  33   None
  34
  35 --*/
  36 // TODO:    PciIoDevice - add argument and description to function comment
  37 // TODO:    Command - add argument and description to function comment
  38 // TODO:    Offset - add argument and description to function comment
  39 // TODO:    Operation - add argument and description to function comment
  40 // TODO:    PtrCommand - add argument and description to function comment
  41 {
  42   UINT16              OldCommand;
  43   EFI_STATUS          Status;
  44   EFI_PCI_IO_PROTOCOL *PciIo;
  45
  46   OldCommand  = 0;
  47   PciIo       = &PciIoDevice->PciIo;
  48
  49   if (Operation != EFI_SET_REGISTER) {
  50     Status = PciIoRead (
  51                          PciIo,
  52                          EfiPciIoWidthUint16,
  53                          Offset,
  54                          1,
  55                          &OldCommand
  56                         );
  57
  58     if (Operation == EFI_GET_REGISTER) {
  59       *PtrCommand = OldCommand;
  60       return Status;
  61     }
  62   }
  63
  64   if (Operation == EFI_ENABLE_REGISTER) {
  65     OldCommand = (UINT16) (OldCommand | Command);
  66   } else if (Operation == EFI_DISABLE_REGISTER) {
  67     OldCommand = (UINT16) (OldCommand & ~(Command));
  68   } else {
  69     OldCommand = Command;
  70   }
  71
  72   return PciIoWrite (
  73                       PciIo,
  74                       EfiPciIoWidthUint16,
  75                       Offset,
  76                       1,
  77                       &OldCommand
  78                     );
  79 }
  80
  81 BOOLEAN
  82 PciCapabilitySupport (
  83   IN PCI_IO_DEVICE  *PciIoDevice
  84   )
  85 /*++
  86
  87 Routine Description:
  88
  89 Arguments:
  90
  91 Returns:
  92
  93   None
  94
  95 --*/
  96 // TODO:    PciIoDevice - add argument and description to function comment
  97 {
  98
  99   if (PciIoDevice->Pci.Hdr.Status & EFI_PCI_STATUS_CAPABILITY) {
 100     return TRUE;
 101   }
 102
 103   return FALSE;
 104 }
 105
 106 EFI_STATUS
 107 LocateCapabilityRegBlock (
 108   IN PCI_IO_DEVICE  *PciIoDevice,
 109   IN UINT8          CapId,
 110   IN OUT UINT8      *Offset,
 111   OUT UINT8         *NextRegBlock OPTIONAL
 112   )
 113 /*++
 114
 115 Routine Description:
 116   Locate cap reg.
 117
 118 Arguments:
 119   PciIoDevice         - A pointer to the PCI_IO_DEVICE.
 120   CapId               - The cap ID.
 121   Offset              - A pointer to the offset.
 122   NextRegBlock        - A pointer to the next block.
 123
 124 Returns:
 125
 126   None
 127
 128 --*/
 129 // TODO:    EFI_UNSUPPORTED - add return value to function comment
 130 // TODO:    EFI_SUCCESS - add return value to function comment
 131 // TODO:    EFI_NOT_FOUND - add return value to function comment
 132 {
 133   UINT8   CapabilityPtr;
 134   UINT16  CapabilityEntry;
 135   UINT8   CapabilityID;
 136
 137   //
 138   // To check the cpability of this device supports
 139   //
 140   if (!PciCapabilitySupport (PciIoDevice)) {
 141     return EFI_UNSUPPORTED;
 142   }
 143
 144   if (*Offset != 0) {
 145     CapabilityPtr = *Offset;
 146   } else {
 147
 148     CapabilityPtr = 0;
 149     if (IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) {
 150
 151       PciIoRead (
 152                   &PciIoDevice->PciIo,
 153                   EfiPciIoWidthUint8,
 154                   EFI_PCI_CARDBUS_BRIDGE_CAPABILITY_PTR,
 155                   1,
 156                   &CapabilityPtr
 157                 );
 158     } else {
 159
 160       PciIoRead (
 161                   &PciIoDevice->PciIo,
 162                   EfiPciIoWidthUint8,
 163                   EFI_PCI_CAPABILITY_PTR,
 164                   1,
 165                   &CapabilityPtr
 166                 );
 167     }
 168   }
 169
 170   while (CapabilityPtr > 0x3F) {
 171     //
 172     // Mask it to DWORD alignment per PCI spec
 173     //
 174     CapabilityPtr &= 0xFC;
 175     PciIoRead (
 176                 &PciIoDevice->PciIo,
 177                 EfiPciIoWidthUint16,
 178                 CapabilityPtr,
 179                 1,
 180                 &CapabilityEntry
 181               );
 182
 183     CapabilityID = (UINT8) CapabilityEntry;
 184
 185     if (CapabilityID == CapId) {
 186       *Offset = CapabilityPtr;
 187       if (NextRegBlock != NULL) {
 188         *NextRegBlock = (UINT8) (CapabilityEntry >> 8);
 189       }
 190
 191       return EFI_SUCCESS;
 192     }
 193
 194     CapabilityPtr = (UINT8) (CapabilityEntry >> 8);
 195   }
 196
 197   return EFI_NOT_FOUND;
 198 }