]> git.proxmox.com Git - mirror_edk2.git/blob - IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciCommand.h
Correct all header files for doxygen format and correct the license issue for VgaClas...
[mirror_edk2.git] / IntelFrameworkModulePkg / Bus / Pci / PciBusDxe / PciCommand.h
1 /**@file
2
3 Copyright (c) 2006, Intel Corporation
4 All rights reserved. This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php
8
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11
12 **/
13
14
15 #ifndef _EFI_PCI_COMMAND_H
16 #define _EFI_PCI_COMMAND_H
17
18 //
19 // The PCI Command register bits owned by PCI Bus driver.
20 //
21 // They should be cleared at the beginning. The other registers
22 // are owned by chipset, we should not touch them.
23 //
24 #define EFI_PCI_COMMAND_BITS_OWNED ( \
25 EFI_PCI_COMMAND_IO_SPACE | \
26 EFI_PCI_COMMAND_MEMORY_SPACE | \
27 EFI_PCI_COMMAND_BUS_MASTER | \
28 EFI_PCI_COMMAND_MEMORY_WRITE_AND_INVALIDATE | \
29 EFI_PCI_COMMAND_VGA_PALETTE_SNOOP | \
30 EFI_PCI_COMMAND_FAST_BACK_TO_BACK \
31 )
32
33 //
34 // The PCI Bridge Control register bits owned by PCI Bus driver.
35 //
36 // They should be cleared at the beginning. The other registers
37 // are owned by chipset, we should not touch them.
38 //
39 #define EFI_PCI_BRIDGE_CONTROL_BITS_OWNED ( \
40 EFI_PCI_BRIDGE_CONTROL_ISA | \
41 EFI_PCI_BRIDGE_CONTROL_VGA | \
42 EFI_PCI_BRIDGE_CONTROL_VGA_16 | \
43 EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK \
44 )
45
46 //
47 // The PCCard Bridge Control register bits owned by PCI Bus driver.
48 //
49 // They should be cleared at the beginning. The other registers
50 // are owned by chipset, we should not touch them.
51 //
52 #define EFI_PCCARD_BRIDGE_CONTROL_BITS_OWNED ( \
53 EFI_PCI_BRIDGE_CONTROL_ISA | \
54 EFI_PCI_BRIDGE_CONTROL_VGA | \
55 EFI_PCI_BRIDGE_CONTROL_FAST_BACK_TO_BACK \
56 )
57
58
59 #define EFI_GET_REGISTER 1
60 #define EFI_SET_REGISTER 2
61 #define EFI_ENABLE_REGISTER 3
62 #define EFI_DISABLE_REGISTER 4
63
64 EFI_STATUS
65 PciOperateRegister (
66 IN PCI_IO_DEVICE *PciIoDevice,
67 IN UINT16 Command,
68 IN UINT8 Offset,
69 IN UINT8 Operation,
70 OUT UINT16 *PtrCommand
71 )
72 /*++
73
74 Routine Description:
75
76 TODO: Add function description
77
78 Arguments:
79
80 PciIoDevice - TODO: add argument description
81 Command - TODO: add argument description
82 Offset - TODO: add argument description
83 Operation - TODO: add argument description
84 PtrCommand - TODO: add argument description
85
86 Returns:
87
88 TODO: add return values
89
90 --*/
91 ;
92
93 BOOLEAN
94 PciCapabilitySupport (
95 IN PCI_IO_DEVICE *PciIoDevice
96 )
97 /*++
98
99 Routine Description:
100
101 TODO: Add function description
102
103 Arguments:
104
105 PciIoDevice - TODO: add argument description
106
107 Returns:
108
109 TODO: add return values
110
111 --*/
112 ;
113
114 EFI_STATUS
115 LocateCapabilityRegBlock (
116 IN PCI_IO_DEVICE *PciIoDevice,
117 IN UINT8 CapId,
118 IN OUT UINT8 *Offset,
119 OUT UINT8 *NextRegBlock OPTIONAL
120 )
121 /*++
122
123 Routine Description:
124
125 TODO: Add function description
126
127 Arguments:
128
129 PciIoDevice - TODO: add argument description
130 CapId - TODO: add argument description
131 Offset - TODO: add argument description
132 NextRegBlock - TODO: add argument description
133
134 Returns:
135
136 TODO: add return values
137
138 --*/
139 ;
140
141
142 #define PciReadCommandRegister(a,b) \
143 PciOperateRegister (a,0, PCI_COMMAND_OFFSET, EFI_GET_REGISTER, b)
144
145 #define PciSetCommandRegister(a,b) \
146 PciOperateRegister (a,b, PCI_COMMAND_OFFSET, EFI_SET_REGISTER, NULL)
147
148 #define PciEnableCommandRegister(a,b) \
149 PciOperateRegister (a,b, PCI_COMMAND_OFFSET, EFI_ENABLE_REGISTER, NULL)
150
151 #define PciDisableCommandRegister(a,b) \
152 PciOperateRegister (a,b, PCI_COMMAND_OFFSET, EFI_DISABLE_REGISTER, NULL)
153
154 #define PciReadBridgeControlRegister(a,b) \
155 PciOperateRegister (a,0, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_GET_REGISTER, b)
156
157 #define PciSetBridgeControlRegister(a,b) \
158 PciOperateRegister (a,b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_SET_REGISTER, NULL)
159
160 #define PciEnableBridgeControlRegister(a,b) \
161 PciOperateRegister (a,b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_ENABLE_REGISTER, NULL)
162
163 #define PciDisableBridgeControlRegister(a,b) \
164 PciOperateRegister (a,b, PCI_BRIDGE_CONTROL_REGISTER_OFFSET, EFI_DISABLE_REGISTER, NULL)
165
166 #endif