2 Internal library declaration for PCI Bus module.
4 Copyright (c) 2006 - 2009, Intel Corporation
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #ifndef _EFI_PCI_LIB_H_
16 #define _EFI_PCI_LIB_H_
19 // Mask definistions for PCD PcdPciIncompatibleDeviceSupportMask
21 #define PCI_INCOMPATIBLE_ACPI_RESOURCE_SUPPORT 0x01
22 #define PCI_INCOMPATIBLE_READ_SUPPORT 0x02
23 #define PCI_INCOMPATIBLE_WRITE_SUPPORT 0x04
24 #define PCI_INCOMPATIBLE_REGISTER_UPDATE_SUPPORT 0x08
25 #define PCI_INCOMPATIBLE_ACCESS_WIDTH_SUPPORT 0x10
29 } EFI_DEVICE_HANDLE_EXTENDED_DATA_PAYLOAD
;
33 UINT16 DevicePathSize
;
39 } EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD
;
43 Retrieve the PCI Card device BAR information via PciIo interface.
45 @param PciIoDevice PCI Card device instance.
50 IN PCI_IO_DEVICE
*PciIoDevice
54 Remove rejected pci device from specific root bridge
57 @param RootBridgeHandle Specific parent root bridge handle.
58 @param Bridge Bridge device instance.
62 RemoveRejectedPciDevices (
63 IN EFI_HANDLE RootBridgeHandle
,
64 IN PCI_IO_DEVICE
*Bridge
68 Submits the I/O and memory resource requirements for the specified PCI Host Bridge.
70 @param PciResAlloc Point to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
72 @retval EFI_SUCCESS Successfully finished resource allocation.
73 @retval EFI_NOT_FOUND Cannot get root bridge instance.
74 @retval EFI_OUT_OF_RESOURCES Platform failed to program the resources if no hot plug supported.
75 @retval other Some error occurred when allocating resources for the PCI Host Bridge.
77 @note Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
81 PciHostBridgeResourceAllocator (
82 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
86 Scan pci bus and assign bus number to the given PCI bus system.
88 @param Bridge Bridge device instance.
89 @param StartBusNumber start point.
90 @param SubBusNumber Point to sub bus number.
91 @param PaddedBusRange Customized bus number.
93 @retval EFI_SUCCESS Successfully scanned and assigned bus number.
94 @retval other Some error occurred when scanning pci bus.
96 @note Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
101 IN PCI_IO_DEVICE
*Bridge
,
102 IN UINT8 StartBusNumber
,
103 OUT UINT8
*SubBusNumber
,
104 OUT UINT8
*PaddedBusRange
108 Process Option Rom on the specified root bridge.
110 @param Bridge Pci root bridge device instance.
112 @retval EFI_SUCCESS Success process.
113 @retval other Some error occurred when processing Option Rom on the root bridge.
117 PciRootBridgeP2CProcess (
118 IN PCI_IO_DEVICE
*Bridge
122 Process Option Rom on the specified host bridge.
124 @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
126 @retval EFI_SUCCESS Success process.
127 @retval EFI_NOT_FOUND Can not find the root bridge instance.
128 @retval other Some error occurred when processing Option Rom on the host bridge.
132 PciHostBridgeP2CProcess (
133 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
137 This function is used to enumerate the entire host bridge
140 @param PciResAlloc A pointer to the PCI Host Resource Allocation protocol.
142 @retval EFI_SUCCESS Successfully enumerated the host bridge.
143 @retval EFI_OUT_OF_RESOURCES No enough memory available.
144 @retval other Some error occurred when enumerating the host bridge.
148 PciHostBridgeEnumerator (
149 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
153 Read PCI configuration space through EFI_PCI_IO_PROTOCOL.
155 @param PciIo A pointer to the EFI_PCI_O_PROTOCOL.
156 @param Width Signifies the width of the memory operations.
157 @param Offset The offset within the PCI configuration space for the PCI controller.
158 @param Count The number of unit to be read.
159 @param Buffer For read operations, the destination buffer to store the results. For
160 write operations, the source buffer to write data from.
162 @retval EFI_SUCCESS The data was read from or written to the PCI controller.
163 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
164 valid for the PCI configuration header of the PCI controller.
165 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
166 @retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid.
171 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
172 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
179 Write PCI configuration space through EFI_PCI_IO_PROTOCOL.
181 If PCI incompatibility check is enabled, do incompatibility check.
183 @param PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.
184 @param Width Signifies the width of the memory operations.
185 @param Offset The offset within the PCI configuration space for the PCI controller.
186 @param Count The number of PCI configuration operations to perform.
187 @param Buffer For read operations, the destination buffer to store the results. For write
188 operations, the source buffer to write data from.
190 @retval EFI_SUCCESS The data was read from or written to the PCI controller.
191 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
192 valid for the PCI configuration header of the PCI controller.
193 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
194 @retval EFI_INVALID_PARAMETER Buffer is NULL or Width is invalid.
199 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
200 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
207 Write PCI configuration space through EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
209 @param PciRootBridgeIo A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
210 @param Pci A pointer to PCI_TYPE00.
211 @param Width Signifies the width of the memory operations.
212 @param Offset The offset within the PCI configuration space for the PCI controller.
213 @param Count The number of unit to be read.
214 @param Buffer For read operations, the destination buffer to store the results. For
215 write operations, the source buffer to write data from.
217 @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
218 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
219 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
223 PciRootBridgeIoWrite (
224 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
,
226 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,
233 Read PCI configuration space through EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
235 @param PciRootBridgeIo A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
236 @param Pci A pointer to PCI_TYPE00.
237 @param Width Signifies the width of the memory operations.
238 @param Offset The offset within the PCI configuration space for the PCI controller.
239 @param Count The number of unit to be read.
240 @param Buffer For read operations, the destination buffer to store the results. For
241 write operations, the source buffer to write data from.
243 @retval EFI_SUCCESS The data was read from or written to the PCI root bridge.
244 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
245 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
249 PciRootBridgeIoRead (
250 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
,
251 IN PCI_TYPE00
*Pci
, OPTIONAL
252 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width
,