IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciLib.h

   1 /** @file
   2
   3 Copyright (c) 2006 - 2007, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 Module Name:
  13
  14   PciLib.h
  15
  16 Abstract:
  17
  18   PCI Bus Driver Lib header file.
  19   Please use PCD feature flag PcdPciBusHotplugDeviceSupport to enable
  20   support hot plug.
  21
  22 Revision History
  23
  24 **/
  25
  26 #ifndef _EFI_PCI_LIB_H
  27 #define _EFI_PCI_LIB_H
  28
  29 //
  30 // Mask definistions for PCD PcdPciIncompatibleDeviceSupportMask
  31 //
  32 #define PCI_INCOMPATIBLE_ACPI_RESOURCE_SUPPORT         0x01
  33 #define PCI_INCOMPATIBLE_READ_SUPPORT                  0x02
  34 #define PCI_INCOMPATIBLE_WRITE_SUPPORT                 0x04
  35 #define PCI_INCOMPATIBLE_REGISTER_UPDATE_SUPPORT       0x08
  36 #define PCI_INCOMPATIBLE_ACCESS_WIDTH_SUPPORT          0x0a
  37
  38 typedef struct {
  39   EFI_HANDLE            Handle;
  40 } EFI_DEVICE_HANDLE_EXTENDED_DATA_PAYLOAD;
  41
  42 typedef struct {
  43   UINT32                             Bar;
  44   UINT16                             DevicePathSize;
  45   UINT16                             ReqResSize;
  46   UINT16                             AllocResSize;
  47   UINT8                              *DevicePath;
  48   UINT8                              *ReqRes;
  49   UINT8                              *AllocRes;
  50 } EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD;
  51
  52 /**
  53   Install protocol gEfiPciHotPlugRequestProtocolGuid
  54   @param Status    return status of protocol installation.
  55 **/
  56 void
  57 InstallHotPlugRequestProtocol (
  58   IN  EFI_STATUS                    *Status
  59   )
  60 ;
  61
  62 /**
  63   Install protocol gEfiPciHotplugDeviceGuid into hotplug device
  64   instance
  65
  66   @param PciIoDevice  hotplug device instance
  67
  68 **/
  69 VOID
  70 InstallPciHotplugGuid (
  71   IN  PCI_IO_DEVICE                  *PciIoDevice
  72   )
  73 ;
  74
  75 /**
  76   UnInstall protocol gEfiPciHotplugDeviceGuid into hotplug device
  77   instance
  78
  79   @param PciIoDevice  hotplug device instance
  80
  81 **/
  82 VOID
  83 UninstallPciHotplugGuid (
  84   IN  PCI_IO_DEVICE                  *PciIoDevice
  85   )
  86 ;
  87
  88 /**
  89   Retrieve the BAR information via PciIo interface
  90
  91   @param PciIoDevice Pci device instance
  92 **/
  93 VOID
  94 GetBackPcCardBar (
  95   IN  PCI_IO_DEVICE                  *PciIoDevice
  96   )
  97 ;
  98
  99 /**
 100   Remove rejected pci device from specific root bridge
 101   handle.
 102
 103   @param RootBridgeHandle  specific parent root bridge handle
 104   @param Bridge            Bridge device instance
 105
 106   @retval EFI_SUCCESS  Success operation.
 107 **/
 108 EFI_STATUS
 109 RemoveRejectedPciDevices (
 110   EFI_HANDLE        RootBridgeHandle,
 111   IN PCI_IO_DEVICE  *Bridge
 112   )
 113 ;
 114
 115 /**
 116   Wrapper function for allocating resource for pci host bridge.
 117
 118   @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 119
 120 **/
 121 EFI_STATUS
 122 PciHostBridgeResourceAllocator (
 123   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
 124   )
 125 ;
 126
 127 EFI_STATUS
 128 PciHostBridgeResourceAllocator_WithoutHotPlugDeviceSupport (
 129   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
 130   )
 131 ;
 132
 133 EFI_STATUS
 134 PciHostBridgeResourceAllocator_WithHotPlugDeviceSupport (
 135   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
 136   )
 137 ;
 138
 139 /**
 140   Wapper function of scanning pci bus and assign bus number to the given PCI bus system
 141   Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug
 142
 143   @param  Bridge          Bridge device instance
 144   @param  StartBusNumber  start point
 145   @param  SubBusNumber    Point to sub bus number
 146   @param  PaddedBusRange  Customized bus number
 147
 148   @retval EFI_SUCCESS     Success
 149   @retval EFI_DEVICE_ERROR Fail to scan bus
 150 **/
 151 EFI_STATUS
 152 PciScanBus (
 153   IN PCI_IO_DEVICE                      *Bridge,
 154   IN UINT8                              StartBusNumber,
 155   OUT UINT8                             *SubBusNumber,
 156   OUT UINT8                             *PaddedBusRange
 157   )
 158 ;
 159
 160 EFI_STATUS
 161 PciScanBus_WithHotPlugDeviceSupport (
 162   IN PCI_IO_DEVICE                      *Bridge,
 163   IN UINT8                              StartBusNumber,
 164   OUT UINT8                             *SubBusNumber,
 165   OUT UINT8                             *PaddedBusRange
 166   )
 167 ;
 168
 169 EFI_STATUS
 170 PciScanBus_WithoutHotPlugDeviceSupport (
 171   IN PCI_IO_DEVICE                      *Bridge,
 172   IN UINT8                              StartBusNumber,
 173   OUT UINT8                             *SubBusNumber,
 174   OUT UINT8                             *PaddedBusRange
 175   )
 176 ;
 177
 178 /**
 179   Process Option Rom on this host bridge
 180
 181   @param Bridge  Pci bridge device instance
 182
 183   @retval EFI_SUCCESS Success
 184 **/
 185
 186 EFI_STATUS
 187 PciRootBridgeP2CProcess (
 188   IN PCI_IO_DEVICE *Bridge
 189   )
 190 ;
 191
 192 /**
 193   Process Option Rom on this host bridge
 194
 195   @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 196
 197   @retval EFI_NOT_FOUND Can not find the root bridge instance
 198   @retval EFI_SUCCESS   Success process
 199 **/
 200 EFI_STATUS
 201 PciHostBridgeP2CProcess (
 202   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
 203   )
 204 ;
 205
 206 /**
 207   This function is used to enumerate the entire host bridge
 208   in a given platform
 209
 210   @param PciResAlloc   A pointer to the resource allocate protocol.
 211
 212   @retval EFI_OUT_OF_RESOURCES no enough resource
 213   @retval EFI_SUCCESS Success
 214
 215 **/
 216
 217 EFI_STATUS
 218 PciHostBridgeEnumerator (
 219   EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  *PciResAlloc
 220   )
 221 ;
 222
 223 /**
 224   Read PCI configuration space through EFI_PCI_IO_PROTOCOL.
 225
 226   @param  PciIo               A pointer to the EFI_PCI_O_PROTOCOL.
 227   @param  Width               Signifies the width of the memory operations.
 228   @Param  Address             The address within the PCI configuration space for the PCI controller.
 229   @param  Buffer              For read operations, the destination buffer to store the results. For
 230                               write operations, the source buffer to write data from.
 231
 232   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 233   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 234   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 235   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 236
 237 **/
 238 EFI_STATUS
 239 PciIoRead (
 240   IN       EFI_PCI_IO_PROTOCOL                    *PciIo,
 241   IN       EFI_PCI_IO_PROTOCOL_WIDTH              Width,
 242   IN       UINT32                                 Address,
 243   IN       UINTN                                  Count,
 244   IN OUT   VOID                                   *Buffer
 245   );
 246
 247 /**
 248   Write PCI configuration space through EFI_PCI_IO_PROTOCOL.
 249
 250   @param  PciIo               A pointer to the EFI_PCI_O_PROTOCOL.
 251   @param  Width               Signifies the width of the memory operations.
 252   @Param  Address             The address within the PCI configuration space for the PCI controller.
 253   @param  Buffer              For read operations, the destination buffer to store the results. For
 254                               write operations, the source buffer to write data from.
 255
 256   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 257   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 258   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 259   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 260
 261 **/
 262 EFI_STATUS
 263 PciIoWrite (
 264   IN       EFI_PCI_IO_PROTOCOL                    *PciIo,
 265   IN       EFI_PCI_IO_PROTOCOL_WIDTH              Width,
 266   IN       UINT32                                 Address,
 267   IN       UINTN                                  Count,
 268   IN OUT   VOID                                   *Buffer
 269   );
 270
 271 /**
 272   Write PCI configuration space through EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 273
 274   @param  PciRootBridgeIo     A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 275   @param  Pci                 A pointer to PCI_TYPE00.
 276   @param  Width               Signifies the width of the memory operations.
 277   @Param  Address             The address within the PCI configuration space for the PCI controller.
 278   @param  Buffer              For read operations, the destination buffer to store the results. For
 279                               write operations, the source buffer to write data from.
 280
 281   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 282   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 283   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 284   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 285
 286 **/
 287 EFI_STATUS
 288 PciRootBridgeIoWrite (
 289   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *PciRootBridgeIo,
 290   IN       PCI_TYPE00                             *Pci,
 291   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,
 292   IN       UINT64                                 Address,
 293   IN       UINTN                                  Count,
 294   IN OUT   VOID                                   *Buffer
 295   );
 296
 297 /**
 298   Read PCI configuration space through EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 299
 300   @param  PciRootBridgeIo     A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 301   @param  Pci                 A pointer to PCI_TYPE00.
 302   @param  Width               Signifies the width of the memory operations.
 303   @Param  Address             The address within the PCI configuration space for the PCI controller.
 304   @param  Buffer              For read operations, the destination buffer to store the results. For
 305                               write operations, the source buffer to write data from.
 306
 307   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 308   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 309   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 310   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 311
 312 **/
 313 EFI_STATUS
 314 PciRootBridgeIoRead (
 315   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *PciRootBridgeIo,
 316   IN       PCI_TYPE00                             *Pci,
 317   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,
 318   IN       UINT64                                 Address,
 319   IN       UINTN                                  Count,
 320   IN OUT   VOID                                   *Buffer
 321   );
 322 #endif