IntelFrameworkModulePkg/Bus/Pci/PciBusDxe/PciLib.h

   1 /** @file
   2
   3 Copyright (c) 2006 - 2007, Intel Corporation
   4 All rights reserved. This program and the accompanying materials
   5 are licensed and made available under the terms and conditions of the BSD License
   6 which accompanies this distribution.  The full text of the license may be found at
   7 http://opensource.org/licenses/bsd-license.php
   8
   9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11
  12 Module Name:
  13
  14   PciLib.h
  15
  16 Abstract:
  17
  18   PCI Bus Driver Lib header file.
  19   Please use PCD feature flag PcdPciBusHotplugDeviceSupport to enable
  20   support hot plug.
  21
  22 Revision History
  23
  24 **/
  25
  26 #ifndef _EFI_PCI_LIB_H
  27 #define _EFI_PCI_LIB_H
  28
  29 //
  30 // Mask definistions for PCD PcdPciIncompatibleDeviceSupportMask
  31 //
  32 #define PCI_INCOMPATIBLE_ACPI_RESOURCE_SUPPORT         0x01
  33 #define PCI_INCOMPATIBLE_READ_SUPPORT                  0x02
  34 #define PCI_INCOMPATIBLE_WRITE_SUPPORT                 0x04
  35 #define PCI_INCOMPATIBLE_REGISTER_UPDATE_SUPPORT       0x08
  36 #define PCI_INCOMPATIBLE_ACCESS_WIDTH_SUPPORT          0x0a
  37
  38 typedef struct {
  39   EFI_HANDLE            Handle;
  40 } EFI_DEVICE_HANDLE_EXTENDED_DATA_PAYLOAD;
  41
  42 typedef struct {
  43   UINT32                             Bar;
  44   UINT16                             DevicePathSize;
  45   UINT16                             ReqResSize;
  46   UINT16                             AllocResSize;
  47   UINT8                              *DevicePath;
  48   UINT8                              *ReqRes;
  49   UINT8                              *AllocRes;
  50 } EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD;
  51
  52 /**
  53   Install protocol gEfiPciHotPlugRequestProtocolGuid
  54   @param Status    return status of protocol installation.
  55 **/
  56 void
  57 InstallHotPlugRequestProtocol (
  58   IN  EFI_STATUS                    *Status
  59   );
  60
  61 /**
  62   Install protocol gEfiPciHotplugDeviceGuid into hotplug device
  63   instance
  64
  65   @param PciIoDevice  hotplug device instance
  66
  67 **/
  68 VOID
  69 InstallPciHotplugGuid (
  70   IN  PCI_IO_DEVICE                  *PciIoDevice
  71   );
  72
  73 /**
  74   UnInstall protocol gEfiPciHotplugDeviceGuid into hotplug device
  75   instance
  76
  77   @param PciIoDevice  hotplug device instance
  78
  79 **/
  80 VOID
  81 UninstallPciHotplugGuid (
  82   IN  PCI_IO_DEVICE                  *PciIoDevice
  83   );
  84
  85 /**
  86   Retrieve the BAR information via PciIo interface
  87
  88   @param PciIoDevice Pci device instance
  89 **/
  90 VOID
  91 GetBackPcCardBar (
  92   IN  PCI_IO_DEVICE                  *PciIoDevice
  93   );
  94
  95 /**
  96   Remove rejected pci device from specific root bridge
  97   handle.
  98
  99   @param RootBridgeHandle  specific parent root bridge handle
 100   @param Bridge            Bridge device instance
 101
 102   @retval EFI_SUCCESS  Success operation.
 103 **/
 104 EFI_STATUS
 105 RemoveRejectedPciDevices (
 106   EFI_HANDLE        RootBridgeHandle,
 107   IN PCI_IO_DEVICE  *Bridge
 108   );
 109
 110 /**
 111   Wrapper function for allocating resource for pci host bridge.
 112
 113   @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 114
 115 **/
 116 EFI_STATUS
 117 PciHostBridgeResourceAllocator (
 118   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
 119   );
 120
 121 EFI_STATUS
 122 PciHostBridgeResourceAllocator_WithoutHotPlugDeviceSupport (
 123   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
 124   );
 125
 126 EFI_STATUS
 127 PciHostBridgeResourceAllocator_WithHotPlugDeviceSupport (
 128   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
 129   );
 130
 131 /**
 132   Wapper function of scanning pci bus and assign bus number to the given PCI bus system
 133   Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug
 134
 135   @param  Bridge          Bridge device instance
 136   @param  StartBusNumber  start point
 137   @param  SubBusNumber    Point to sub bus number
 138   @param  PaddedBusRange  Customized bus number
 139
 140   @retval EFI_SUCCESS     Success
 141   @retval EFI_DEVICE_ERROR Fail to scan bus
 142 **/
 143 EFI_STATUS
 144 PciScanBus (
 145   IN PCI_IO_DEVICE                      *Bridge,
 146   IN UINT8                              StartBusNumber,
 147   OUT UINT8                             *SubBusNumber,
 148   OUT UINT8                             *PaddedBusRange
 149   );
 150
 151 EFI_STATUS
 152 PciScanBus_WithHotPlugDeviceSupport (
 153   IN PCI_IO_DEVICE                      *Bridge,
 154   IN UINT8                              StartBusNumber,
 155   OUT UINT8                             *SubBusNumber,
 156   OUT UINT8                             *PaddedBusRange
 157   );
 158
 159 EFI_STATUS
 160 PciScanBus_WithoutHotPlugDeviceSupport (
 161   IN PCI_IO_DEVICE                      *Bridge,
 162   IN UINT8                              StartBusNumber,
 163   OUT UINT8                             *SubBusNumber,
 164   OUT UINT8                             *PaddedBusRange
 165   );
 166
 167 /**
 168   Process Option Rom on this host bridge
 169
 170   @param Bridge  Pci bridge device instance
 171
 172   @retval EFI_SUCCESS Success
 173 **/
 174
 175 EFI_STATUS
 176 PciRootBridgeP2CProcess (
 177   IN PCI_IO_DEVICE *Bridge
 178   );
 179
 180 /**
 181   Process Option Rom on this host bridge
 182
 183   @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
 184
 185   @retval EFI_NOT_FOUND Can not find the root bridge instance
 186   @retval EFI_SUCCESS   Success process
 187 **/
 188 EFI_STATUS
 189 PciHostBridgeP2CProcess (
 190   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc
 191   );
 192
 193 /**
 194   This function is used to enumerate the entire host bridge
 195   in a given platform
 196
 197   @param PciResAlloc   A pointer to the resource allocate protocol.
 198
 199   @retval EFI_OUT_OF_RESOURCES no enough resource
 200   @retval EFI_SUCCESS Success
 201
 202 **/
 203
 204 EFI_STATUS
 205 PciHostBridgeEnumerator (
 206   EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  *PciResAlloc
 207   );
 208
 209 /**
 210   Read PCI configuration space through EFI_PCI_IO_PROTOCOL.
 211
 212   @param  PciIo               A pointer to the EFI_PCI_O_PROTOCOL.
 213   @param  Width               Signifies the width of the memory operations.
 214   @Param  Address             The address within the PCI configuration space for the PCI controller.
 215   @param  Buffer              For read operations, the destination buffer to store the results. For
 216                               write operations, the source buffer to write data from.
 217
 218   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 219   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 220   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 221   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 222
 223 **/
 224 EFI_STATUS
 225 PciIoRead (
 226   IN       EFI_PCI_IO_PROTOCOL                    *PciIo,
 227   IN       EFI_PCI_IO_PROTOCOL_WIDTH              Width,
 228   IN       UINT32                                 Address,
 229   IN       UINTN                                  Count,
 230   IN OUT   VOID                                   *Buffer
 231   );
 232
 233 /**
 234   Write PCI configuration space through EFI_PCI_IO_PROTOCOL.
 235
 236   @param  PciIo               A pointer to the EFI_PCI_O_PROTOCOL.
 237   @param  Width               Signifies the width of the memory operations.
 238   @Param  Address             The address within the PCI configuration space for the PCI controller.
 239   @param  Buffer              For read operations, the destination buffer to store the results. For
 240                               write operations, the source buffer to write data from.
 241
 242   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 243   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 244   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 245   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 246
 247 **/
 248 EFI_STATUS
 249 PciIoWrite (
 250   IN       EFI_PCI_IO_PROTOCOL                    *PciIo,
 251   IN       EFI_PCI_IO_PROTOCOL_WIDTH              Width,
 252   IN       UINT32                                 Address,
 253   IN       UINTN                                  Count,
 254   IN OUT   VOID                                   *Buffer
 255   );
 256
 257 /**
 258   Write PCI configuration space through EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 259
 260   @param  PciRootBridgeIo     A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 261   @param  Pci                 A pointer to PCI_TYPE00.
 262   @param  Width               Signifies the width of the memory operations.
 263   @Param  Address             The address within the PCI configuration space for the PCI controller.
 264   @param  Buffer              For read operations, the destination buffer to store the results. For
 265                               write operations, the source buffer to write data from.
 266
 267   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 268   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 269   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 270   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 271
 272 **/
 273 EFI_STATUS
 274 PciRootBridgeIoWrite (
 275   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *PciRootBridgeIo,
 276   IN       PCI_TYPE00                             *Pci,
 277   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,
 278   IN       UINT64                                 Address,
 279   IN       UINTN                                  Count,
 280   IN OUT   VOID                                   *Buffer
 281   );
 282
 283 /**
 284   Read PCI configuration space through EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 285
 286   @param  PciRootBridgeIo     A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
 287   @param  Pci                 A pointer to PCI_TYPE00.
 288   @param  Width               Signifies the width of the memory operations.
 289   @Param  Address             The address within the PCI configuration space for the PCI controller.
 290   @param  Buffer              For read operations, the destination buffer to store the results. For
 291                               write operations, the source buffer to write data from.
 292
 293   @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.
 294   @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.
 295   @retval EFI_INVALID_PARAMETER  Buffer is NULL.
 296   @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.
 297
 298 **/
 299 EFI_STATUS
 300 PciRootBridgeIoRead (
 301   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *PciRootBridgeIo,
 302   IN       PCI_TYPE00                             *Pci,
 303   IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,
 304   IN       UINT64                                 Address,
 305   IN       UINTN                                  Count,
 306   IN OUT   VOID                                   *Buffer
 307   );
 308 #endif