IntelFrameworkModulePkg/Include/IndustryStandard/Pcat.h

   1 /** @file
   2   Include file for PC-AT compatability.
   3
   4 Copyright (c) 2006, Intel Corporation. All rights reserved.
   5 This software and associated documentation (if any) is furnished
   6 under a license and may only be used or copied in accordance
   7 with the terms of the license. Except as permitted by such
   8 license, no part of this software or documentation may be
   9 reproduced, stored in a retrieval system, or transmitted in any
  10 form or by any means without the express written consent of
  11 Intel Corporation.
  12
  13 **/
  14
  15 #ifndef _PC_AT_H_
  16 #define _PC_AT_H_
  17
  18 //
  19 // 8254 Timer
  20 //
  21 #define TIMER0_COUNT_PORT                         0x40
  22 #define TIMER1_COUNT_PORT                         0x41
  23 #define TIMER2_COUNT_PORT                         0x42
  24 #define TIMER_CONTROL_PORT                        0x43
  25
  26 //
  27 // 8259 PIC interrupt controller
  28 //
  29
  30 #define PIC_CONTROL_REGISTER_MASTER               0x20
  31 #define PIC_MASK_REGISTER_MASTER                  0x21
  32 #define PIC_CONTROL_REGISTER_SLAVE                0xA0
  33 #define PIC_MASK_REGISTER_SLAVE                   0xA1
  34 #define PIC_EDGE_LEVEL_TRIGGERED_REGISTER_MASTER  0x4D0
  35 #define PIC_EDGE_LEVEL_TRIGGERED_REGISTER_SLAVE   0x4D1
  36
  37 #define PIC_EOI                                   0x20
  38
  39 //
  40 // 8237 DMA registers
  41 //
  42 #define R_8237_DMA_BASE_CA_CH0                    0x00
  43 #define R_8237_DMA_BASE_CA_CH1                    0x02
  44 #define R_8237_DMA_BASE_CA_CH2                    0x04
  45 #define R_8237_DMA_BASE_CA_CH3                    0xd6
  46 #define R_8237_DMA_BASE_CA_CH5                    0xc4
  47 #define R_8237_DMA_BASE_CA_CH6                    0xc8
  48 #define R_8237_DMA_BASE_CA_CH7                    0xcc
  49
  50 #define R_8237_DMA_BASE_CC_CH0                    0x01
  51 #define R_8237_DMA_BASE_CC_CH1                    0x03
  52 #define R_8237_DMA_BASE_CC_CH2                    0x05
  53 #define R_8237_DMA_BASE_CC_CH3                    0xd7
  54 #define R_8237_DMA_BASE_CC_CH5                    0xc6
  55 #define R_8237_DMA_BASE_CC_CH6                    0xca
  56 #define R_8237_DMA_BASE_CC_CH7                    0xce
  57
  58 #define R_8237_DMA_MEM_LP_CH0                     0x87
  59 #define R_8237_DMA_MEM_LP_CH1                     0x83
  60 #define R_8237_DMA_MEM_LP_CH2                     0x81
  61 #define R_8237_DMA_MEM_LP_CH3                     0x82
  62 #define R_8237_DMA_MEM_LP_CH5                     0x8B
  63 #define R_8237_DMA_MEM_LP_CH6                     0x89
  64 #define R_8237_DMA_MEM_LP_CH7                     0x8A
  65
  66
  67 #define R_8237_DMA_COMMAND_CH0_3                  0x08
  68 #define R_8237_DMA_COMMAND_CH4_7                  0xd0
  69 #define   B_8237_DMA_COMMAND_GAP                  0x10
  70 #define   B_8237_DMA_COMMAND_CGE                  0x04
  71
  72
  73 #define R_8237_DMA_STA_CH0_3                      0xd8
  74 #define R_8237_DMA_STA_CH4_7                      0xd0
  75
  76 #define R_8237_DMA_WRSMSK_CH0_3                   0x0a
  77 #define R_8237_DMA_WRSMSK_CH4_7                   0xd4
  78 #define   B_8237_DMA_WRSMSK_CMS                   0x04
  79
  80
  81 #define R_8237_DMA_CHMODE_CH0_3                   0x0b
  82 #define R_8237_DMA_CHMODE_CH4_7                   0xd6
  83 #define   V_8237_DMA_CHMODE_DEMAND                0x00
  84 #define   V_8237_DMA_CHMODE_SINGLE                0x40
  85 #define   V_8237_DMA_CHMODE_CASCADE               0xc0
  86 #define   B_8237_DMA_CHMODE_DECREMENT             0x20
  87 #define   B_8237_DMA_CHMODE_INCREMENT             0x00
  88 #define   B_8237_DMA_CHMODE_AE                    0x10
  89 #define   V_8237_DMA_CHMODE_VERIFY                0
  90 #define   V_8237_DMA_CHMODE_IO2MEM                0x04
  91 #define   V_8237_DMA_CHMODE_MEM2IO                0x08
  92
  93 #define R_8237_DMA_CBPR_CH0_3                     0x0c
  94 #define R_8237_DMA_CBPR_CH4_7                     0xd8
  95
  96 #define R_8237_DMA_MCR_CH0_3                      0x0d
  97 #define R_8237_DMA_MCR_CH4_7                      0xda
  98
  99 #define R_8237_DMA_CLMSK_CH0_3                    0x0e
 100 #define R_8237_DMA_CLMSK_CH4_7                    0xdc
 101
 102 #define R_8237_DMA_WRMSK_CH0_3                    0x0f
 103 #define R_8237_DMA_WRMSK_CH4_7                    0xde
 104
 105 #endif