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1 /** @file
2 The incompatible PCI device list
3
4 Copyright (c) 2006 - 2007, Intel Corporation
5 All rights reserved. This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #ifndef _EFI_INCOMPATIBLE_PCI_DEVICE_LIST_H
16 #define _EFI_INCOMPATIBLE_PCI_DEVICE_LIST_H
17
18 #include <Library/PciIncompatibleDeviceSupportLib.h>
19 #include <Library/MemoryAllocationLib.h>
20 #include <Library/DebugLib.h>
21
22 #include <IndustryStandard/Pci22.h>
23 #include <IndustryStandard/Acpi.h>
24
25
26 #define PCI_DEVICE_ID(VendorId, DeviceId, Revision, SubVendorId, SubDeviceId) \
27 VendorId, DeviceId, Revision, SubVendorId, SubDeviceId
28
29 #define PCI_BAR_TYPE_IO ACPI_ADDRESS_SPACE_TYPE_IO
30 #define PCI_BAR_TYPE_MEM ACPI_ADDRESS_SPACE_TYPE_MEM
31
32 #define DEVICE_INF_TAG 0xFFF2
33 #define DEVICE_RES_TAG 0xFFF1
34 #define LIST_END_TAG 0x0000
35
36 //
37 // descriptor for access width of incompatible PCI device
38 //
39 typedef struct {
40 UINT64 AccessType;
41 UINT64 AccessWidth;
42 EFI_PCI_REGISTER_ACCESS_DATA PciRegisterAccessData;
43 } EFI_PCI_REGISTER_ACCESS_DESCRIPTOR;
44
45 //
46 // descriptor for register value of incompatible PCI device
47 //
48 typedef struct {
49 UINT64 AccessType;
50 UINT64 Offset;
51 EFI_PCI_REGISTER_VALUE_DATA PciRegisterValueData;
52 } EFI_PCI_REGISTER_VALUE_DESCRIPTOR;
53
54
55 //
56 // the incompatible PCI devices list for ACPI resource
57 //
58 GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForResource[] = {
59 //
60 // DEVICE_INF_TAG,
61 // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),
62 // DEVICE_RES_TAG,
63 // ResType, GFlag , SFlag, Granularity, RangeMin,
64 // RangeMax, Offset, AddrLen
65 //
66 //
67 // Device Adaptec 9004
68 //
69 DEVICE_INF_TAG,
70 PCI_DEVICE_ID(0x9004, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
71 DEVICE_RES_TAG,
72 PCI_BAR_TYPE_IO,
73 PCI_ACPI_UNUSED,
74 PCI_ACPI_UNUSED,
75 PCI_ACPI_UNUSED,
76 PCI_ACPI_UNUSED,
77 PCI_BAR_EVEN_ALIGN,
78 PCI_BAR_ALL,
79 PCI_BAR_NOCHANGE,
80 //
81 // Device Adaptec 9005
82 //
83 DEVICE_INF_TAG,
84 PCI_DEVICE_ID(0x9005, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
85 DEVICE_RES_TAG,
86 PCI_BAR_TYPE_IO,
87 PCI_ACPI_UNUSED,
88 PCI_ACPI_UNUSED,
89 PCI_ACPI_UNUSED,
90 PCI_ACPI_UNUSED,
91 PCI_BAR_EVEN_ALIGN,
92 PCI_BAR_ALL,
93 PCI_BAR_NOCHANGE,
94 //
95 // Device QLogic 1007
96 //
97 DEVICE_INF_TAG,
98 PCI_DEVICE_ID(0x1077, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
99 DEVICE_RES_TAG,
100 PCI_BAR_TYPE_IO,
101 PCI_ACPI_UNUSED,
102 PCI_ACPI_UNUSED,
103 PCI_ACPI_UNUSED,
104 PCI_ACPI_UNUSED,
105 PCI_BAR_EVEN_ALIGN,
106 PCI_BAR_ALL,
107 PCI_BAR_NOCHANGE,
108 //
109 // Device Agilent 103C
110 //
111 DEVICE_INF_TAG,
112 PCI_DEVICE_ID(0x103C, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
113 DEVICE_RES_TAG,
114 PCI_BAR_TYPE_IO,
115 PCI_ACPI_UNUSED,
116 PCI_ACPI_UNUSED,
117 PCI_ACPI_UNUSED,
118 PCI_ACPI_UNUSED,
119 PCI_BAR_EVEN_ALIGN,
120 PCI_BAR_ALL,
121 PCI_BAR_NOCHANGE,
122 //
123 // Device Agilent 15BC
124 //
125 DEVICE_INF_TAG,
126 PCI_DEVICE_ID(0x15BC, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
127 DEVICE_RES_TAG,
128 PCI_BAR_TYPE_IO,
129 PCI_ACPI_UNUSED,
130 PCI_ACPI_UNUSED,
131 PCI_ACPI_UNUSED,
132 PCI_ACPI_UNUSED,
133 PCI_BAR_EVEN_ALIGN,
134 PCI_BAR_ALL,
135 PCI_BAR_NOCHANGE,
136 //
137 // The end of the list
138 //
139 LIST_END_TAG
140 };
141
142 //
143 // the incompatible PCI devices list for the values of configuration registers
144 //
145 GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForRegister[] = {
146 //
147 // DEVICE_INF_TAG,
148 // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),
149 // PCI_RES_TAG,
150 // PCI_ACCESS_TYPE, PCI_CONFIG_ADDRESS,
151 // AND_VALUE, OR_VALUE
152
153 //
154 // Device Lava 0x1407, DeviceId 0x0110
155 //
156 DEVICE_INF_TAG,
157 PCI_DEVICE_ID(0x1407, 0x0110, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
158 DEVICE_RES_TAG,
159 PCI_REGISTER_READ,
160 PCI_CAPBILITY_POINTER_OFFSET,
161 0xffffff00,
162 VALUE_NOCARE,
163
164 //
165 // Device Lava 0x1407, DeviceId 0x0111
166 //
167 DEVICE_INF_TAG,
168 PCI_DEVICE_ID(0x1407, 0x0111, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
169 DEVICE_RES_TAG,
170 PCI_REGISTER_READ,
171 PCI_CAPBILITY_POINTER_OFFSET,
172 0xffffff00,
173 VALUE_NOCARE,
174
175 //
176 // The end of the list
177 //
178 LIST_END_TAG
179 };
180
181 //
182 // the incompatible PCI devices list for the access width of configuration registers
183 //
184 GLOBAL_REMOVE_IF_UNREFERENCED UINT64 DeviceListForAccessWidth[] = {
185 //
186 // DEVICE_INF_TAG,
187 // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),
188 // DEVICE_RES_TAG,
189 // PCI_ACCESS_TYPE, PCI_ACCESS_WIDTH,
190 // START_ADDRESS, END_ADDRESS,
191 // ACTUAL_PCI_ACCESS_WIDTH,
192 //
193
194 //
195 // Sample Device
196 //
197 //DEVICE_INF_TAG,
198 //PCI_DEVICE_ID(0xXXXX, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
199 //DEVICE_RES_TAG,
200 //PCI_REGISTER_READ,
201 //EfiPciWidthUint8,
202 //0,
203 //0xFF,
204 //EfiPciWidthUint32,
205 //
206
207 //
208 // The end of the list
209 //
210 LIST_END_TAG
211 };
212
213 #endif