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1 /** @file
2 The incompatible PCI device list
3
4 Copyright (c) 2007 Intel Corporation. All rights reserved. <BR>
5 This software and associated documentation (if any) is furnished
6 under a license and may only be used or copied in accordance
7 with the terms of the license. Except as permitted by such
8 license, no part of this software or documentation may be
9 reproduced, stored in a retrieval system, or transmitted in any
10 form or by any means without the express written consent of
11 Intel Corporation.
12
13 **/
14
15 #ifndef _EFI_INCOMPATIBLE_PCI_DEVICE_LIST_H
16 #define _EFI_INCOMPATIBLE_PCI_DEVICE_LIST_H
17
18 //
19 // The package level header files this module uses
20 //
21 #include <PiDxe.h>
22 //
23 // The Library classes this module consumes
24 //
25 #include <Library/PciIncompatibleDeviceSupportLib.h>
26 #include <Library/MemoryAllocationLib.h>
27 #include <Library/DebugLib.h>
28
29 #include <IndustryStandard/pci22.h>
30 #include <IndustryStandard/Acpi.h>
31
32
33 #define PCI_DEVICE_ID(VendorId, DeviceId, Revision, SubVendorId, SubDeviceId) \
34 VendorId, DeviceId, Revision, SubVendorId, SubDeviceId
35
36 #define PCI_BAR_TYPE_IO ACPI_ADDRESS_SPACE_TYPE_IO
37 #define PCI_BAR_TYPE_MEM ACPI_ADDRESS_SPACE_TYPE_MEM
38
39 #define DEVICE_INF_TAG 0xFFF2
40 #define DEVICE_RES_TAG 0xFFF1
41 #define LIST_END_TAG 0x0000
42
43 //
44 // descriptor for access width of incompatible PCI device
45 //
46 typedef struct {
47 UINT64 AccessType;
48 UINT64 AccessWidth;
49 EFI_PCI_REGISTER_ACCESS_DATA PciRegisterAccessData;
50 } EFI_PCI_REGISTER_ACCESS_DESCRIPTOR;
51
52 //
53 // descriptor for register value of incompatible PCI device
54 //
55 typedef struct {
56 UINT64 AccessType;
57 UINT64 Offset;
58 EFI_PCI_REGISTER_VALUE_DATA PciRegisterValueData;
59 } EFI_PCI_REGISTER_VALUE_DESCRIPTOR;
60
61
62 //
63 // the incompatible PCI devices list for ACPI resource
64 //
65 GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForResource[] = {
66 //
67 // DEVICE_INF_TAG,
68 // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),
69 // DEVICE_RES_TAG,
70 // ResType, GFlag , SFlag, Granularity, RangeMin,
71 // RangeMax, Offset, AddrLen
72 //
73 //
74 // Device Adaptec 9004
75 //
76 DEVICE_INF_TAG,
77 PCI_DEVICE_ID(0x9004, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
78 DEVICE_RES_TAG,
79 PCI_BAR_TYPE_IO,
80 PCI_ACPI_UNUSED,
81 PCI_ACPI_UNUSED,
82 PCI_ACPI_UNUSED,
83 PCI_ACPI_UNUSED,
84 PCI_BAR_EVEN_ALIGN,
85 PCI_BAR_ALL,
86 PCI_BAR_NOCHANGE,
87 //
88 // Device Adaptec 9005
89 //
90 DEVICE_INF_TAG,
91 PCI_DEVICE_ID(0x9005, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
92 DEVICE_RES_TAG,
93 PCI_BAR_TYPE_IO,
94 PCI_ACPI_UNUSED,
95 PCI_ACPI_UNUSED,
96 PCI_ACPI_UNUSED,
97 PCI_ACPI_UNUSED,
98 PCI_BAR_EVEN_ALIGN,
99 PCI_BAR_ALL,
100 PCI_BAR_NOCHANGE,
101 //
102 // Device QLogic 1007
103 //
104 DEVICE_INF_TAG,
105 PCI_DEVICE_ID(0x1077, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
106 DEVICE_RES_TAG,
107 PCI_BAR_TYPE_IO,
108 PCI_ACPI_UNUSED,
109 PCI_ACPI_UNUSED,
110 PCI_ACPI_UNUSED,
111 PCI_ACPI_UNUSED,
112 PCI_BAR_EVEN_ALIGN,
113 PCI_BAR_ALL,
114 PCI_BAR_NOCHANGE,
115 //
116 // Device Agilent 103C
117 //
118 DEVICE_INF_TAG,
119 PCI_DEVICE_ID(0x103C, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
120 DEVICE_RES_TAG,
121 PCI_BAR_TYPE_IO,
122 PCI_ACPI_UNUSED,
123 PCI_ACPI_UNUSED,
124 PCI_ACPI_UNUSED,
125 PCI_ACPI_UNUSED,
126 PCI_BAR_EVEN_ALIGN,
127 PCI_BAR_ALL,
128 PCI_BAR_NOCHANGE,
129 //
130 // Device Agilent 15BC
131 //
132 DEVICE_INF_TAG,
133 PCI_DEVICE_ID(0x15BC, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
134 DEVICE_RES_TAG,
135 PCI_BAR_TYPE_IO,
136 PCI_ACPI_UNUSED,
137 PCI_ACPI_UNUSED,
138 PCI_ACPI_UNUSED,
139 PCI_ACPI_UNUSED,
140 PCI_BAR_EVEN_ALIGN,
141 PCI_BAR_ALL,
142 PCI_BAR_NOCHANGE,
143 //
144 // The end of the list
145 //
146 LIST_END_TAG
147 };
148
149 //
150 // the incompatible PCI devices list for the values of configuration registers
151 //
152 GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForRegister[] = {
153 //
154 // DEVICE_INF_TAG,
155 // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),
156 // PCI_RES_TAG,
157 // PCI_ACCESS_TYPE, PCI_CONFIG_ADDRESS,
158 // AND_VALUE, OR_VALUE
159
160 //
161 // Device Lava 0x1407, DeviceId 0x0110
162 //
163 DEVICE_INF_TAG,
164 PCI_DEVICE_ID(0x1407, 0x0110, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
165 DEVICE_RES_TAG,
166 PCI_REGISTER_READ,
167 PCI_CAPBILITY_POINTER_OFFSET,
168 0xffffff00,
169 VALUE_NOCARE,
170
171 //
172 // Device Lava 0x1407, DeviceId 0x0111
173 //
174 DEVICE_INF_TAG,
175 PCI_DEVICE_ID(0x1407, 0x0111, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
176 DEVICE_RES_TAG,
177 PCI_REGISTER_READ,
178 PCI_CAPBILITY_POINTER_OFFSET,
179 0xffffff00,
180 VALUE_NOCARE,
181
182 //
183 // The end of the list
184 //
185 LIST_END_TAG
186 };
187
188 //
189 // the incompatible PCI devices list for the access width of configuration registers
190 //
191 GLOBAL_REMOVE_IF_UNREFERENCED UINT64 DeviceListForAccessWidth[] = {
192 //
193 // DEVICE_INF_TAG,
194 // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),
195 // DEVICE_RES_TAG,
196 // PCI_ACCESS_TYPE, PCI_ACCESS_WIDTH,
197 // START_ADDRESS, END_ADDRESS,
198 // ACTUAL_PCI_ACCESS_WIDTH,
199 //
200
201 //
202 // Sample Device
203 //
204 //DEVICE_INF_TAG,
205 //PCI_DEVICE_ID(0xXXXX, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
206 //DEVICE_RES_TAG,
207 //PCI_REGISTER_READ,
208 //EfiPciWidthUint8,
209 //0,
210 //0xFF,
211 //EfiPciWidthUint32,
212 //
213
214 //
215 // The end of the list
216 //
217 LIST_END_TAG
218 };
219
220 #endif