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1 /** @file
2 The incompatible PCI device list
3
4 Copyright (c) 2007 Intel Corporation. All rights reserved. <BR>
5 This software and associated documentation (if any) is furnished
6 under a license and may only be used or copied in accordance
7 with the terms of the license. Except as permitted by such
8 license, no part of this software or documentation may be
9 reproduced, stored in a retrieval system, or transmitted in any
10 form or by any means without the express written consent of
11 Intel Corporation.
12
13 **/
14
15 #ifndef _EFI_INCOMPATIBLE_PCI_DEVICE_LIST_H
16 #define _EFI_INCOMPATIBLE_PCI_DEVICE_LIST_H
17
18 //
19 // Include common header file for this module.
20 //
21 #include "CommonHeader.h"
22
23 #include <IndustryStandard/pci22.h>
24 #include <IndustryStandard/Acpi.h>
25
26
27 #define PCI_DEVICE_ID(VendorId, DeviceId, Revision, SubVendorId, SubDeviceId) \
28 VendorId, DeviceId, Revision, SubVendorId, SubDeviceId
29
30 #define PCI_BAR_TYPE_IO ACPI_ADDRESS_SPACE_TYPE_IO
31 #define PCI_BAR_TYPE_MEM ACPI_ADDRESS_SPACE_TYPE_MEM
32
33 #define DEVICE_INF_TAG 0xFFF2
34 #define DEVICE_RES_TAG 0xFFF1
35 #define LIST_END_TAG 0x0000
36
37 //
38 // descriptor for access width of incompatible PCI device
39 //
40 typedef struct {
41 UINT64 AccessType;
42 UINT64 AccessWidth;
43 EFI_PCI_REGISTER_ACCESS_DATA PciRegisterAccessData;
44 } EFI_PCI_REGISTER_ACCESS_DESCRIPTOR;
45
46 //
47 // descriptor for register value of incompatible PCI device
48 //
49 typedef struct {
50 UINT64 AccessType;
51 UINT64 Offset;
52 EFI_PCI_REGISTER_VALUE_DATA PciRegisterValueData;
53 } EFI_PCI_REGISTER_VALUE_DESCRIPTOR;
54
55
56 //
57 // the incompatible PCI devices list for ACPI resource
58 //
59 GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForResource[] = {
60 //
61 // DEVICE_INF_TAG,
62 // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),
63 // DEVICE_RES_TAG,
64 // ResType, GFlag , SFlag, Granularity, RangeMin,
65 // RangeMax, Offset, AddrLen
66 //
67 //
68 // Device Adaptec 9004
69 //
70 DEVICE_INF_TAG,
71 PCI_DEVICE_ID(0x9004, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
72 DEVICE_RES_TAG,
73 PCI_BAR_TYPE_IO,
74 PCI_ACPI_UNUSED,
75 PCI_ACPI_UNUSED,
76 PCI_ACPI_UNUSED,
77 PCI_ACPI_UNUSED,
78 PCI_BAR_EVEN_ALIGN,
79 PCI_BAR_ALL,
80 PCI_BAR_NOCHANGE,
81 //
82 // Device Adaptec 9005
83 //
84 DEVICE_INF_TAG,
85 PCI_DEVICE_ID(0x9005, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
86 DEVICE_RES_TAG,
87 PCI_BAR_TYPE_IO,
88 PCI_ACPI_UNUSED,
89 PCI_ACPI_UNUSED,
90 PCI_ACPI_UNUSED,
91 PCI_ACPI_UNUSED,
92 PCI_BAR_EVEN_ALIGN,
93 PCI_BAR_ALL,
94 PCI_BAR_NOCHANGE,
95 //
96 // Device QLogic 1007
97 //
98 DEVICE_INF_TAG,
99 PCI_DEVICE_ID(0x1077, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
100 DEVICE_RES_TAG,
101 PCI_BAR_TYPE_IO,
102 PCI_ACPI_UNUSED,
103 PCI_ACPI_UNUSED,
104 PCI_ACPI_UNUSED,
105 PCI_ACPI_UNUSED,
106 PCI_BAR_EVEN_ALIGN,
107 PCI_BAR_ALL,
108 PCI_BAR_NOCHANGE,
109 //
110 // Device Agilent 103C
111 //
112 DEVICE_INF_TAG,
113 PCI_DEVICE_ID(0x103C, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
114 DEVICE_RES_TAG,
115 PCI_BAR_TYPE_IO,
116 PCI_ACPI_UNUSED,
117 PCI_ACPI_UNUSED,
118 PCI_ACPI_UNUSED,
119 PCI_ACPI_UNUSED,
120 PCI_BAR_EVEN_ALIGN,
121 PCI_BAR_ALL,
122 PCI_BAR_NOCHANGE,
123 //
124 // Device Agilent 15BC
125 //
126 DEVICE_INF_TAG,
127 PCI_DEVICE_ID(0x15BC, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
128 DEVICE_RES_TAG,
129 PCI_BAR_TYPE_IO,
130 PCI_ACPI_UNUSED,
131 PCI_ACPI_UNUSED,
132 PCI_ACPI_UNUSED,
133 PCI_ACPI_UNUSED,
134 PCI_BAR_EVEN_ALIGN,
135 PCI_BAR_ALL,
136 PCI_BAR_NOCHANGE,
137 //
138 // The end of the list
139 //
140 LIST_END_TAG
141 };
142
143 //
144 // the incompatible PCI devices list for the values of configuration registers
145 //
146 GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForRegister[] = {
147 //
148 // DEVICE_INF_TAG,
149 // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),
150 // PCI_RES_TAG,
151 // PCI_ACCESS_TYPE, PCI_CONFIG_ADDRESS,
152 // AND_VALUE, OR_VALUE
153
154 //
155 // Device Lava 0x1407, DeviceId 0x0110
156 //
157 DEVICE_INF_TAG,
158 PCI_DEVICE_ID(0x1407, 0x0110, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
159 DEVICE_RES_TAG,
160 PCI_REGISTER_READ,
161 PCI_CAPBILITY_POINTER_OFFSET,
162 0xffffff00,
163 VALUE_NOCARE,
164
165 //
166 // Device Lava 0x1407, DeviceId 0x0111
167 //
168 DEVICE_INF_TAG,
169 PCI_DEVICE_ID(0x1407, 0x0111, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
170 DEVICE_RES_TAG,
171 PCI_REGISTER_READ,
172 PCI_CAPBILITY_POINTER_OFFSET,
173 0xffffff00,
174 VALUE_NOCARE,
175
176 //
177 // The end of the list
178 //
179 LIST_END_TAG
180 };
181
182 //
183 // the incompatible PCI devices list for the access width of configuration registers
184 //
185 GLOBAL_REMOVE_IF_UNREFERENCED UINT64 DeviceListForAccessWidth[] = {
186 //
187 // DEVICE_INF_TAG,
188 // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),
189 // DEVICE_RES_TAG,
190 // PCI_ACCESS_TYPE, PCI_ACCESS_WIDTH,
191 // START_ADDRESS, END_ADDRESS,
192 // ACTUAL_PCI_ACCESS_WIDTH,
193 //
194
195 //
196 // Sample Device
197 //
198 //DEVICE_INF_TAG,
199 //PCI_DEVICE_ID(0xXXXX, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),
200 //DEVICE_RES_TAG,
201 //PCI_REGISTER_READ,
202 //EfiPciWidthUint8,
203 //0,
204 //0xFF,
205 //EfiPciWidthUint32,
206 //
207
208 //
209 // The end of the list
210 //
211 LIST_END_TAG
212 };
213
214 #endif