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1 /** @file
2 The header file provides interface definitions exposed by CSM (Compatible Support Module).
3
4 The CSM provides compatibility support between the Framework and traditional, legacy BIOS code
5 and allows booting a traditional OS or booting an EFI OS off a device that requires a traditional
6 option ROM (OpROM).
7
8 These definitions are from Compatibility Support Module Spec Version 0.97.
9
10 Copyright (c) 2007-2009, Intel Corporation
11 All rights reserved. This program and the accompanying materials
12 are licensed and made available under the terms and conditions of the BSD License
13 which accompanies this distribution. The full text of the license may be found at
14 http://opensource.org/licenses/bsd-license.php
15
16 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
17 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18
19 @par Revision Reference:
20 These definitions are from Compatibility Support Module Spec
21 Version 0.97.
22
23 **/
24
25 #ifndef _FRAMEWORK_LEGACY_16_H_
26 #define _FRAMEWORK_LEGACY_16_H_
27
28 #pragma pack(1)
29
30 typedef UINT8 SERIAL_MODE;
31 typedef UINT8 PARALLEL_MODE;
32
33 #define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$')
34
35 ///
36 /// There is a table located within the traditional BIOS in either the 0xF000:xxxx or 0xE000:xxxx
37 /// physical address range. It is located on a 16-byte boundary and provides the physical address of the
38 /// entry point for the Compatibility16 functions. These functions provide the platform-specific
39 /// information that is required by the generic EfiCompatibility code. The functions are invoked via
40 /// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit physical
41 /// entry point.
42 ///
43 typedef struct {
44 ///
45 /// The string "$EFI" denotes the start of the EfiCompatibility table. Byte 0 is "I," byte
46 /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.
47 ///
48 UINT32 Signature;
49
50 ///
51 /// The value required such that byte checksum of TableLength equals zero.
52 ///
53 UINT8 TableChecksum;
54
55 ///
56 /// The length of this table.
57 ///
58 UINT8 TableLength;
59
60 ///
61 /// The major EFI revision for which this table was generated.
62 ///
63 UINT8 EfiMajorRevision;
64
65 ///
66 /// The minor EFI revision for which this table was generated.
67 ///
68 UINT8 EfiMinorRevision;
69
70 ///
71 /// The major revision of this table.
72 ///
73 UINT8 TableMajorRevision;
74
75 ///
76 /// The minor revision of this table.
77 ///
78 UINT8 TableMinorRevision;
79
80 ///
81 /// Reserved for future usage.
82 ///
83 UINT16 Reserved;
84
85 ///
86 /// The segment of the entry point within the traditional BIOS for Compatibility16 functions.
87 ///
88 UINT16 Compatibility16CallSegment;
89
90 ///
91 /// The offset of the entry point within the traditional BIOS for Compatibility16 functions.
92 ///
93 UINT16 Compatibility16CallOffset;
94
95 ///
96 /// The segment of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.
97 ///
98 UINT16 PnPInstallationCheckSegment;
99
100 ///
101 /// The Offset of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.
102 ///
103 UINT16 PnPInstallationCheckOffset;
104
105 ///
106 /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform Innovation Framework for EFI
107 /// Driver Execution Environment Core Interface Specification (DXE CIS).
108 ///
109 UINT32 EfiSystemTable;
110
111 ///
112 /// The address of an OEM-provided identifier string. The string is null terminated.
113 ///
114 UINT32 OemIdStringPointer;
115
116 ///
117 /// The 32-bit physical address where ACPI RSD PTR is stored within the traditional
118 /// BIOS. The remained of the ACPI tables are located at their EFI addresses. The size
119 /// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill in the ACPI
120 /// RSD PTR with either the ACPI 1.0b or 2.0 values.
121 ///
122 UINT32 AcpiRsdPtrPointer;
123
124 ///
125 /// The OEM revision number. Usage is undefined but provided for OEM module usage.
126 ///
127 UINT16 OemRevision;
128
129 ///
130 /// The 32-bit physical address where INT15 E820 data is stored within the traditional
131 /// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the
132 /// data to the indicated area.
133 ///
134 UINT32 E820Pointer;
135
136 ///
137 /// The length of the E820 data and is filled in by the EfiCompatibility code.
138 ///
139 UINT32 E820Length;
140
141 ///
142 /// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.
143 /// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and
144 /// copy the data to the indicated area.
145 ///
146 UINT32 IrqRoutingTablePointer;
147
148 ///
149 /// The length of the $PIR table and is filled in by the EfiCompatibility code.
150 ///
151 UINT32 IrqRoutingTableLength;
152
153 ///
154 /// The 32-bit physical address where the MP table is stored in the traditional BIOS.
155 /// The EfiCompatibility code will fill in the MpTablePtr value and copy the data to the indicated area.
156 ///
157 UINT32 MpTablePtr;
158
159 ///
160 /// The length of the MP table and is filled in by the EfiCompatibility code.
161 ///
162 UINT32 MpTableLength;
163
164 ///
165 /// The segment of the OEM-specific INT table/code.
166 ///
167 UINT16 OemIntSegment;
168
169 ///
170 /// The offset of the OEM-specific INT table/code.
171 ///
172 UINT16 OemIntOffset;
173
174 ///
175 /// The segment of the OEM-specific 32-bit table/code.
176 ///
177 UINT16 Oem32Segment;
178
179 ///
180 /// The offset of the OEM-specific 32-bit table/code.
181 ///
182 UINT16 Oem32Offset;
183
184 ///
185 /// The segment of the OEM-specific 16-bit table/code.
186 ///
187 UINT16 Oem16Segment;
188
189 ///
190 /// The offset of the OEM-specific 16-bit table/code.
191 ///
192 UINT16 Oem16Offset;
193
194 ///
195 /// The segment of the TPM binary passed to 16-bit CSM.
196 ///
197 UINT16 TpmSegment;
198
199 ///
200 /// The offset of the TPM binary passed to 16-bit CSM.
201 ///
202 UINT16 TpmOffset;
203
204 ///
205 /// A pointer to a string identifying the independent BIOS vendor.
206 ///
207 UINT32 IbvPointer;
208
209 ///
210 /// This field is NULL for all systems not supporting PCI Express. This field is the base
211 /// value of the start of the PCI Express memory-mapped configuration registers and
212 /// must be filled in prior to EfiCompatibility code issuing the Compatibility16 function
213 /// Compatibility16InitializeYourself().
214 /// Compatibility16InitializeYourself() is defined in Compatability16
215 /// Functions.
216 ///
217 UINT32 PciExpressBase;
218
219 ///
220 /// Maximum PCI bus number assigned.
221 ///
222 UINT8 LastPciBus;
223 } EFI_COMPATIBILITY16_TABLE;
224
225 ///
226 /// Functions provided by the CSM binary which communicate between the EfiCompatibility
227 /// and Compatability16 code.
228 ///
229 /// Inconsistent with specification here:
230 /// The member's name started with "Compatibility16" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version]
231 /// has been changed to "Legacy16" since keeping backward compatible.
232 ///
233 typedef enum {
234 ///
235 /// Causes the Compatibility16 code to do any internal initialization required.
236 /// Input:
237 /// AX = Compatibility16InitializeYourself
238 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_INIT_TABLE
239 /// Return:
240 /// AX = Return Status codes
241 ///
242 Legacy16InitializeYourself = 0x0000,
243
244 ///
245 /// Causes the Compatibility16 BIOS to perform any drive number translations to match the boot sequence.
246 /// Input:
247 /// AX = Compatibility16UpdateBbs
248 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE
249 /// Return:
250 /// AX = Returned status codes
251 ///
252 Legacy16UpdateBbs = 0x0001,
253
254 ///
255 /// Allows the Compatibility16 code to perform any final actions before booting. The Compatibility16
256 /// code is read/write.
257 /// Input:
258 /// AX = Compatibility16PrepareToBoot
259 /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure
260 /// Return:
261 /// AX = Returned status codes
262 ///
263 Legacy16PrepareToBoot = 0x0002,
264
265 ///
266 /// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is Read/Only.
267 /// Input:
268 /// AX = Compatibility16Boot
269 /// Output:
270 /// AX = Returned status codes
271 ///
272 Legacy16Boot = 0x0003,
273
274 ///
275 /// Allows the Compatibility16 code to get the last device from which a boot was attempted. This is
276 /// stored in CMOS and is the priority number of the last attempted boot device.
277 /// Input:
278 /// AX = Compatibility16RetrieveLastBootDevice
279 /// Output:
280 /// AX = Returned status codes
281 /// BX = Priority number of the boot device.
282 ///
283 Legacy16RetrieveLastBootDevice = 0x0004,
284
285 ///
286 /// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 after dispatching a legacy OpROM.
287 /// Input:
288 /// AX = Compatibility16DispatchOprom
289 /// ES:BX = Pointer to EFI_DISPATCH_OPROM_TABLE
290 /// Output:
291 /// AX = Returned status codes
292 /// BX = Number of non-BBS-compliant devices found. Equals 0 if BBS compliant.
293 ///
294 Legacy16DispatchOprom = 0x0005,
295
296 ///
297 /// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified length and returns the address
298 /// of that region.
299 /// Input:
300 /// AX = Compatibility16GetTableAddress
301 /// BX = Allocation region
302 /// 00 = Allocate from either 0xE0000 or 0xF0000 64 KB blocks.
303 /// Bit 0 = 1 Allocate from 0xF0000 64 KB block
304 /// Bit 1 = 1 Allocate from 0xE0000 64 KB block
305 /// CX = Requested length in bytes.
306 /// DX = Required address alignment. Bit mapped. First non-zero bit from the right is the alignment.
307 /// Output:
308 /// AX = Returned status codes
309 /// DS:BX = Address of the region
310 ///
311 Legacy16GetTableAddress = 0x0006,
312
313 ///
314 /// Enables the EfiCompatibility module to do any nonstandard processing of keyboard LEDs or state.
315 /// Input:
316 /// AX = Compatibility16SetKeyboardLeds
317 /// CL = LED status.
318 /// Bit 0 Scroll Lock 0 = Off
319 /// Bit 1 NumLock
320 /// Bit 2 Caps Lock
321 /// Output:
322 /// AX = Returned status codes
323 ///
324 Legacy16SetKeyboardLeds = 0x0007,
325
326 ///
327 /// Enables the EfiCompatibility module to install an interrupt handler for PCI mass media devices that
328 /// do not have an OpROM associated with them. An example is SATA.
329 /// Input:
330 /// AX = Compatibility16InstallPciHandler
331 /// ES:BX = Pointer to EFI_LEGACY_INSTALL_PCI_HANDLER structure
332 /// Output:
333 /// AX = Returned status codes
334 ///
335 Legacy16InstallPciHandler = 0x0008
336 } EFI_COMPATIBILITY_FUNCTIONS;
337
338
339 ///
340 /// EFI_DISPATCH_OPROM_TABLE
341 ///
342 typedef struct {
343 UINT16 PnPInstallationCheckSegment; ///< Pointer to the PnpInstallationCheck data structure.
344 UINT16 PnPInstallationCheckOffset; ///< Pointer to the PnpInstallationCheck data structure.
345 UINT16 OpromSegment; ///< The segment where the OpROM was placed. Offset is assumed to be 3.
346 UINT8 PciBus; ///< The PCI bus.
347 UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI function.
348 UINT8 NumberBbsEntries; ///< The number of valid BBS table entries upon entry and exit. The IBV code may
349 ///< increase this number, if BBS-compliant devices also hook INTs in order to force the
350 ///< OpROM BIOS Setup to be executed.
351 VOID *BbsTablePointer; ///< Pointer to the BBS table.
352 UINT16 RuntimeSegment; ///< The segment where the OpROM can be relocated to. If this value is 0x0000, this
353 ///< means that the relocation of this run time code is not supported.
354 ///< Inconsistent with specification here:
355 ///< The member's name "OpromDestinationSegment" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version]
356 ///< has been changed to "RuntimeSegment" since keeping backward compatible.
357
358 } EFI_DISPATCH_OPROM_TABLE;
359
360 ///
361 /// EFI_TO_COMPATIBILITY16_INIT_TABLE
362 ///
363 typedef struct {
364 ///
365 /// Starting address of memory under 1 MB. The ending address is assumed to be 640 KB or 0x9FFFF.
366 ///
367 UINT32 BiosLessThan1MB;
368
369 ///
370 /// Starting address of the high memory block.
371 ///
372 UINT32 HiPmmMemory;
373
374 ///
375 /// Length of high memory block.
376 ///
377 UINT32 HiPmmMemorySizeInBytes;
378
379 ///
380 /// The segment of the reverse thunk call code.
381 ///
382 UINT16 ReverseThunkCallSegment;
383
384 ///
385 /// The offset of the reverse thunk call code.
386 ///
387 UINT16 ReverseThunkCallOffset;
388
389 ///
390 /// The number of E820 entries copied to the Compatibility16 BIOS.
391 ///
392 UINT32 NumberE820Entries;
393
394 ///
395 /// The amount of usable memory above 1 MB, e.g., E820 type 1 memory.
396 ///
397 UINT32 OsMemoryAbove1Mb;
398
399 ///
400 /// The start of thunk code in main memory. Memory cannot be used by BIOS or PMM.
401 ///
402 UINT32 ThunkStart;
403
404 ///
405 /// The size of the thunk code.
406 ///
407 UINT32 ThunkSizeInBytes;
408
409 ///
410 /// Starting address of memory under 1 MB.
411 ///
412 UINT32 LowPmmMemory;
413
414 ///
415 /// Length of low Memory block.
416 ///
417 UINT32 LowPmmMemorySizeInBytes;
418 } EFI_TO_COMPATIBILITY16_INIT_TABLE;
419
420 ///
421 /// DEVICE_PRODUCER_SERIAL
422 ///
423 typedef struct {
424 UINT16 Address; ///< I/O address assigned to the serial port
425 UINT8 Irq; ///< IRQ assigned to the serial port.
426 SERIAL_MODE Mode; ///< Mode of serial port. Values are defined below.
427 } DEVICE_PRODUCER_SERIAL;
428
429 ///
430 /// DEVICE_PRODUCER_SERIAL's modes
431 ///@{
432 #define DEVICE_SERIAL_MODE_NORMAL 0x00
433 #define DEVICE_SERIAL_MODE_IRDA 0x01
434 #define DEVICE_SERIAL_MODE_ASK_IR 0x02
435 #define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00
436 #define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10
437 ///@)
438
439 ///
440 /// DEVICE_PRODUCER_PARALLEL
441 ///
442 typedef struct {
443 UINT16 Address; ///< I/O address assigned to the parallel port
444 UINT8 Irq; ///< IRQ assigned to the parallel port.
445 UINT8 Dma; ///< DMA assigned to the parallel port.
446 PARALLEL_MODE Mode; ///< Mode of the parallel port. Values are defined below.
447 } DEVICE_PRODUCER_PARALLEL;
448
449 ///
450 /// DEVICE_PRODUCER_PARALLEL's modes
451 ///@{
452 #define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00
453 #define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01
454 #define DEVICE_PARALLEL_MODE_MODE_EPP 0x02
455 #define DEVICE_PARALLEL_MODE_MODE_ECP 0x03
456 ///@}
457
458 ///
459 /// DEVICE_PRODUCER_FLOPPY
460 ///
461 typedef struct {
462 UINT16 Address; ///< I/O address assigned to the floppy
463 UINT8 Irq; ///< IRQ assigned to the floppy.
464 UINT8 Dma; ///< DMA assigned to the floppy.
465 UINT8 NumberOfFloppy; ///< Number of floppies in the system.
466 } DEVICE_PRODUCER_FLOPPY;
467
468 ///
469 /// LEGACY_DEVICE_FLAGS
470 ///
471 typedef struct {
472 UINT32 A20Kybd : 1; ///< A20 controller by keyboard controller.
473 UINT32 A20Port90 : 1; ///< A20 controlled by port 0x92.
474 UINT32 Reserved : 30; ///< Reserved for future usage.
475 } LEGACY_DEVICE_FLAGS;
476
477 ///
478 /// DEVICE_PRODUCER_DATA_HEADER
479 ///
480 typedef struct {
481 DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial port x. Type DEVICE_PRODUCER_SERIAL is defined below.
482 DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel port x. Type DEVICE_PRODUCER_PARALLEL is defined below.
483 DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. Type DEVICE_PRODUCER_FLOPPY is defined below.
484 UINT8 MousePresent; ///< Flag to indicate if mouse is present.
485 LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boolean state information passed to CSM.
486 } DEVICE_PRODUCER_DATA_HEADER;
487
488 ///
489 /// ATAPI_IDENTIFY
490 ///
491 typedef struct {
492 UINT16 Raw[256]; ///< Raw data from the IDE IdentifyDrive command.
493 } ATAPI_IDENTIFY;
494
495 ///
496 /// HDD_INFO
497 ///
498 typedef struct {
499 ///
500 /// Status of IDE device. Values are defined below. There is one HDD_INFO structure
501 /// per IDE controller. The IdentifyDrive is per drive. Index 0 is master and index
502 /// 1 is slave.
503 ///
504 UINT16 Status;
505
506 ///
507 /// PCI bus of IDE controller.
508 ///
509 UINT32 Bus;
510
511 ///
512 /// PCI device of IDE controller.
513 ///
514 UINT32 Device;
515
516 ///
517 /// PCI function of IDE controller.
518 ///
519 UINT32 Function;
520
521 ///
522 /// Command ports base address.
523 ///
524 UINT16 CommandBaseAddress;
525
526 ///
527 /// Control ports base address.
528 ///
529 UINT16 ControlBaseAddress;
530
531 ///
532 /// Bus master address
533 ///
534 UINT16 BusMasterAddress;
535
536 UINT8 HddIrq;
537
538 ///
539 /// Data that identifies the drive data, one per possible attached drive
540 ///
541 ATAPI_IDENTIFY IdentifyDrive[2];
542 } HDD_INFO;
543
544 ///
545 /// HDD_INFO status bits
546 ///
547 #define HDD_PRIMARY 0x01
548 #define HDD_SECONDARY 0x02
549 #define HDD_MASTER_ATAPI_CDROM 0x04
550 #define HDD_SLAVE_ATAPI_CDROM 0x08
551 #define HDD_MASTER_IDE 0x20
552 #define HDD_SLAVE_IDE 0x40
553 #define HDD_MASTER_ATAPI_ZIPDISK 0x10
554 #define HDD_SLAVE_ATAPI_ZIPDISK 0x80
555
556 ///
557 /// BBS_STATUS_FLAGS
558 ///
559 typedef struct {
560 UINT16 OldPosition : 4; ///< Prior priority.
561 UINT16 Reserved1 : 4; ///< Reserved for future use.
562 UINT16 Enabled : 1; ///< If 0, ignore this entry.
563 UINT16 Failed : 1; ///< 0 = Not known if boot failure occurred.
564 ///< 1 = Boot attempted failed.
565
566 ///
567 /// State of media present.
568 /// 00 = No bootable media is present in the device.
569 /// 01 = Unknown if a bootable media present.
570 /// 10 = Media is present and appears bootable.
571 /// 11 = Reserved.
572 ///
573 UINT16 MediaPresent : 2;
574 UINT16 Reserved2 : 4; ///< Reserved for future use.
575 } BBS_STATUS_FLAGS;
576
577 ///
578 /// BBS_TABLE, device type values & boot priority values
579 ///
580 typedef struct {
581 ///
582 /// The boot priority for this boot device. Values are defined below.
583 ///
584 UINT16 BootPriority;
585
586 ///
587 /// The PCI bus for this boot device.
588 ///
589 UINT32 Bus;
590
591 ///
592 /// The PCI device for this boot device.
593 ///
594 UINT32 Device;
595
596 ///
597 /// The PCI function for the boot device.
598 ///
599 UINT32 Function;
600
601 ///
602 /// The PCI class for this boot device.
603 ///
604 UINT8 Class;
605
606 ///
607 /// The PCI Subclass for this boot device.
608 ///
609 UINT8 SubClass;
610
611 ///
612 /// Segment:offset address of an ASCIIZ description string describing the manufacturer.
613 ///
614 UINT16 MfgStringOffset;
615
616 ///
617 /// Segment:offset address of an ASCIIZ description string describing the manufacturer.
618 ///
619 UINT16 MfgStringSegment;
620
621 ///
622 /// BBS device type. BBS device types are defined below.
623 ///
624 UINT16 DeviceType;
625
626 ///
627 /// Status of this boot device. Type BBS_STATUS_FLAGS is defined below.
628 ///
629 BBS_STATUS_FLAGS StatusFlags;
630
631 ///
632 /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for
633 /// BCV devices.
634 ///
635 UINT16 BootHandlerOffset;
636
637 ///
638 /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for
639 /// BCV devices.
640 ///
641 UINT16 BootHandlerSegment;
642
643 ///
644 /// Segment:offset address of an ASCIIZ description string describing this device.
645 ///
646 UINT16 DescStringOffset;
647
648 ///
649 /// Segment:offset address of an ASCIIZ description string describing this device.
650 ///
651 UINT16 DescStringSegment;
652
653 ///
654 /// Reserved.
655 ///
656 UINT32 InitPerReserved;
657
658 ///
659 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
660 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
661 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
662 ///
663 UINT32 AdditionalIrq13Handler;
664
665 ///
666 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
667 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
668 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
669 ///
670 UINT32 AdditionalIrq18Handler;
671
672 ///
673 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
674 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
675 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
676 ///
677 UINT32 AdditionalIrq19Handler;
678
679 ///
680 /// The use of these fields is IBV dependent. They can be used to flag that an OpROM
681 /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI
682 /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup
683 ///
684 UINT32 AdditionalIrq40Handler;
685 UINT8 AssignedDriveNumber;
686 UINT32 AdditionalIrq41Handler;
687 UINT32 AdditionalIrq46Handler;
688 UINT32 IBV1;
689 UINT32 IBV2;
690 } BBS_TABLE;
691
692 ///
693 /// BBS device type values
694 ///@{
695 #define BBS_FLOPPY 0x01
696 #define BBS_HARDDISK 0x02
697 #define BBS_CDROM 0x03
698 #define BBS_PCMCIA 0x04
699 #define BBS_USB 0x05
700 #define BBS_EMBED_NETWORK 0x06
701 #define BBS_BEV_DEVICE 0x80
702 #define BBS_UNKNOWN 0xff
703 ///@}
704
705 ///
706 /// BBS boot priority values
707 ///@{
708 #define BBS_DO_NOT_BOOT_FROM 0xFFFC
709 #define BBS_LOWEST_PRIORITY 0xFFFD
710 #define BBS_UNPRIORITIZED_ENTRY 0xFFFE
711 #define BBS_IGNORE_ENTRY 0xFFFF
712 ///@}
713
714 ///
715 /// SMM_ATTRIBUTES
716 ///
717 typedef struct {
718 ///
719 /// Access mechanism used to generate the soft SMI. Defined types are below. The other
720 /// values are reserved for future usage.
721 ///
722 UINT16 Type : 3;
723
724 ///
725 /// Size of "port" in bits. Defined values are below.
726 ///
727 UINT16 PortGranularity : 3;
728
729 ///
730 /// Size of data in bits. Defined values are below.
731 ///
732 UINT16 DataGranularity : 3;
733
734 ///
735 /// Reserved for future use.
736 ///
737 UINT16 Reserved : 7;
738 } SMM_ATTRIBUTES;
739
740 ///
741 /// SMM_ATTRIBUTES type values
742 ///@{
743 #define STANDARD_IO 0x00
744 #define STANDARD_MEMORY 0x01
745 ///@}
746
747 ///
748 /// SMM_ATTRIBUTES port size constants
749 ///@{
750 #define PORT_SIZE_8 0x00
751 #define PORT_SIZE_16 0x01
752 #define PORT_SIZE_32 0x02
753 #define PORT_SIZE_64 0x03
754 ///@}
755
756 ///
757 /// SMM_ATTRIBUTES data size constants
758 ///@{
759 #define DATA_SIZE_8 0x00
760 #define DATA_SIZE_16 0x01
761 #define DATA_SIZE_32 0x02
762 #define DATA_SIZE_64 0x03
763 ///@}
764
765 ///
766 /// SMM_FUNCTION & relating constants
767 ///
768 typedef struct {
769 UINT16 Function : 15;
770 UINT16 Owner : 1;
771 } SMM_FUNCTION;
772
773 ///
774 /// SMM_FUNCTION Function constants
775 ///@{
776 #define INT15_D042 0x0000
777 #define GET_USB_BOOT_INFO 0x0001
778 #define DMI_PNP_50_57 0x0002
779 ///@}
780
781 ///
782 /// SMM_FUNCTION Owner constants
783 ///@{
784 #define STANDARD_OWNER 0x0
785 #define OEM_OWNER 0x1
786 ///@}
787
788 /**
789 * SMM_ENTRY
790 *
791 * This structure assumes both port and data sizes are 1. SmmAttribute must be
792 * properly to reflect that assumption.
793 **/
794 typedef struct {
795 ///
796 /// Describes the access mechanism, SmmPort, and SmmData sizes. Type
797 /// SMM_ATTRIBUTES is defined below.
798 ///
799 SMM_ATTRIBUTES SmmAttributes;
800
801 ///
802 /// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below.
803 ///
804 SMM_FUNCTION SmmFunction;
805
806 ///
807 /// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16 bytes
808 ///
809 UINT8 SmmPort;
810
811 ///
812 /// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16 bytes
813 ///
814 UINT8 SmmData;
815 } SMM_ENTRY;
816
817 ///
818 /// SMM_TABLE
819 ///
820 typedef struct {
821 UINT16 NumSmmEntries; ///< Number of entries represented by SmmEntry.
822 SMM_ENTRY SmmEntry; ///< One entry per function. Type SMM_ENTRY is defined below.
823 } SMM_TABLE;
824
825 ///
826 /// UDC_ATTRIBUTES
827 ///
828 typedef struct {
829 ///
830 /// This bit set indicates that the ServiceAreaData is valid.
831 ///
832 UINT8 DirectoryServiceValidity : 1;
833
834 ///
835 /// This bit set indicates to use the Reserve Area Boot Code Address (RACBA) only if
836 /// DirectoryServiceValidity is 0.
837 ///
838 UINT8 RabcaUsedFlag : 1;
839
840 ///
841 /// This bit set indicates to execute hard disk diagnostics.
842 ///
843 UINT8 ExecuteHddDiagnosticsFlag : 1;
844
845 ///
846 /// Reserved for future use. Set to 0.
847 ///
848 UINT8 Reserved : 5;
849 } UDC_ATTRIBUTES;
850
851 ///
852 /// UD_TABLE
853 ///
854 typedef struct {
855 ///
856 /// This field contains the bit-mapped attributes of the PARTIES information. Type
857 /// UDC_ATTRIBUTES is defined below.
858 ///
859 UDC_ATTRIBUTES Attributes;
860
861 ///
862 /// This field contains the zero-based device on which the selected
863 /// ServiceDataArea is present. It is 0 for master and 1 for the slave device.
864 ///
865 UINT8 DeviceNumber;
866
867 ///
868 /// This field contains the zero-based index into the BbsTable for the parent device.
869 /// This index allows the user to reference the parent device information such as PCI
870 /// bus, device function.
871 ///
872 UINT8 BbsTableEntryNumberForParentDevice;
873
874 ///
875 /// This field contains the zero-based index into the BbsTable for the boot entry.
876 ///
877 UINT8 BbsTableEntryNumberForBoot;
878
879 ///
880 /// This field contains the zero-based index into the BbsTable for the HDD diagnostics entry.
881 ///
882 UINT8 BbsTableEntryNumberForHddDiag;
883
884 ///
885 /// The raw Beer data.
886 ///
887 UINT8 BeerData[128];
888
889 ///
890 /// The raw data of selected service area.
891 ///
892 UINT8 ServiceAreaData[64];
893 } UD_TABLE;
894
895 #define EFI_TO_LEGACY_MAJOR_VERSION 0x02
896 #define EFI_TO_LEGACY_MINOR_VERSION 0x00
897 #define MAX_IDE_CONTROLLER 8
898
899 ///
900 /// EFI_TO_COMPATIBILITY16_BOOT_TABLE
901 ///
902 typedef struct {
903 UINT16 MajorVersion; ///< The EfiCompatibility major version number.
904 UINT16 MinorVersion; ///< The EfiCompatibility minor version number.
905 UINT32 AcpiTable; ///< Location of the RSDT ACPI table. < 4G range
906 UINT32 SmbiosTable; ///< Location of the SMBIOS table in EFI memory. < 4G range
907 UINT32 SmbiosTableLength;
908 //
909 // Legacy SIO state
910 //
911 DEVICE_PRODUCER_DATA_HEADER SioData; ///< Standard traditional device information.
912 UINT16 DevicePathType; ///< The default boot type.
913 UINT16 PciIrqMask; ///< Mask of which IRQs have been assigned to PCI.
914 UINT32 NumberE820Entries; ///< Number of E820 entries. The number can change from the
915 ///< Compatibility16InitializeYourself() function.
916 //
917 // Controller & Drive Identify[2] per controller information
918 //
919 HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Hard disk drive information, including raw Identify Drive data.
920 UINT32 NumberBbsEntries; ///< Number of entries in the BBS table
921 UINT32 BbsTable; ///< Pointer to the BBS table. Type BBS_TABLE is defined below.
922 UINT32 SmmTable; ///< Pointer to the SMM table. Type SMM_TABLE is defined below.
923 UINT32 OsMemoryAbove1Mb; ///< The amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can
924 ///< differ from the value in EFI_TO_COMPATIBILITY16_INIT_TABLE as more
925 ///< memory may have been discovered.
926 UINT32 UnconventionalDeviceTable; ///< Information to boot off an unconventional device like a PARTIES partition. Type
927 ///< UD_TABLE is defined below.
928 } EFI_TO_COMPATIBILITY16_BOOT_TABLE;
929
930 ///
931 /// EFI_LEGACY_INSTALL_PCI_HANDLER
932 ///
933 typedef struct {
934 UINT8 PciBus; ///< The PCI bus of the device.
935 UINT8 PciDeviceFun; ///< The PCI device in bits 7:3 and function in bits 2:0.
936 UINT8 PciSegment; ///< The PCI segment of the device.
937 UINT8 PciClass; ///< The PCI class code of the device.
938 UINT8 PciSubclass; ///< The PCI subclass code of the device.
939 UINT8 PciInterface; ///< The PCI interface code of the device.
940 //
941 // Primary section
942 //
943 UINT8 PrimaryIrq; ///< The primary device IRQ.
944 UINT8 PrimaryReserved; ///< Reserved.
945 UINT16 PrimaryControl; ///< The primary device control I/O base.
946 UINT16 PrimaryBase; ///< The primary device I/O base.
947 UINT16 PrimaryBusMaster; ///< The primary device bus master I/O base.
948 //
949 // Secondary Section
950 //
951 UINT8 SecondaryIrq; ///< The secondary device IRQ.
952 UINT8 SecondaryReserved; ///< Reserved.
953 UINT16 SecondaryControl; ///< The secondary device control I/O base.
954 UINT16 SecondaryBase; ///< The secondary device I/O base.
955 UINT16 SecondaryBusMaster; ///< The secondary device bus master I/O base.
956 } EFI_LEGACY_INSTALL_PCI_HANDLER;
957
958 //
959 // Restore default pack value
960 //
961 #pragma pack()
962
963 #endif /* _FRAMEWORK_LEGACY_16_H_ */