2 This file declares the SMM CPU Save State protocol, which provides the processor
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3 save-state information for IA-32 and Itanium processors.
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5 Copyright (c) 2010, Intel Corporation
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6 All rights reserved. This program and the accompanying materials
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7 are licensed and made available under the terms and conditions of the BSD License
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8 which accompanies this distribution. The full text of the license may be found at
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9 http://opensource.org/licenses/bsd-license.php
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11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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14 @par Revision Reference:
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15 This Protocol is defined in Framework of EFI SMM Core Interface Spec
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19 #ifndef _SMM_CPU_SAVE_STATE_H_
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20 #define _SMM_CPU_SAVE_STATE_H_
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22 #define EFI_SMM_CPU_SAVE_STATE_PROTOCOL_GUID \
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24 0x21f302ad, 0x6e94, 0x471b, {0x84, 0xbc, 0xb1, 0x48, 0x0, 0x40, 0x3a, 0x1d} \
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27 typedef struct _EFI_SMM_CPU_SAVE_STATE_PROTOCOL EFI_SMM_CPU_SAVE_STATE_PROTOCOL;
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29 #define EFI_SMM_MIN_REV_ID_x64 0x30006
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34 /// CPU save-state strcuture for IA32 and X64.
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36 /// This struct declaration does not exctly match the Framework SMM CIS 0.91 because the
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37 /// union in the Framework SMM CIS 0.91 contains an unnamed union member that causes build
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38 /// breaks on many compilers with high warning levels. Instead, the UINT8 Reserved[0x200]
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39 /// field has been moved into EFI_SMM_CPU_STATE32. This maintains binary compatibility for
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40 /// the layout and also maintains source comaptibility for access of all fields in this
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43 /// This struct declaration does not exctly match the Framework SMM CIS 0.91 because
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44 /// The Framework SMM CIS 0.91 uses ASM_XXX for base types in this structure. These
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45 /// have been changed to use the base types defined in the UEFI Specification.
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48 UINT8 Reserved[0x200];
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49 UINT8 Reserved1[0xf8]; // fe00h
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50 UINT32 SMBASE; // fef8h
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51 UINT32 SMMRevId; // fefch
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52 UINT16 IORestart; // ff00h
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53 UINT16 AutoHALTRestart; // ff02h
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54 UINT32 IEDBASE; // ff04h
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55 UINT8 Reserved2[0x98]; // ff08h
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56 UINT32 IOMemAddr; // ffa0h
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57 UINT32 IOMisc; // ffa4h
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80 } EFI_SMM_CPU_STATE32;
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83 /// This struct declaration does not exctly match the Framework SMM CIS 0.91 because
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84 /// The Framework SMM CIS 0.91 uses ASM_XXX for base types in this structure. These
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85 /// have been changed to use the base types defined in the UEFI Specification.
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88 UINT8 Reserved1[0x1d0]; // fc00h
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89 UINT32 GdtBaseHiDword; // fdd0h
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90 UINT32 LdtBaseHiDword; // fdd4h
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91 UINT32 IdtBaseHiDword; // fdd8h
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92 UINT8 Reserved2[0xc]; // fddch
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93 UINT64 IO_EIP; // fde8h
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94 UINT8 Reserved3[0x50]; // fdf0h
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95 UINT32 _CR4; // fe40h
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96 UINT8 Reserved4[0x48]; // fe44h
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97 UINT32 GdtBaseLoDword; // fe8ch
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98 UINT32 GdtLimit; // fe90h
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99 UINT32 IdtBaseLoDword; // fe94h
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100 UINT32 IdtLimit; // fe98h
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101 UINT32 LdtBaseLoDword; // fe9ch
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102 UINT32 LdtLimit; // fea0h
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103 UINT32 LdtInfo; // fea4h
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104 UINT8 Reserved5[0x50]; // fea8h
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105 UINT32 SMBASE; // fef8h
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106 UINT32 SMMRevId; // fefch
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107 UINT16 AutoHALTRestart; // ff00h
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108 UINT16 IORestart; // ff02h
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109 UINT32 IEDBASE; // ff04h
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110 UINT8 Reserved6[0x14]; // ff08h
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111 UINT64 _R15; // ff1ch
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119 UINT64 _RAX; // ff5ch
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127 UINT64 IOMemAddr; // ff9ch
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128 UINT32 IOMisc; // ffa4h
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129 UINT32 _ES; // ffa8h
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135 UINT32 _LDTR; // ffc0h
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137 UINT64 _DR7; // ffc8h
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139 UINT64 _RIP; // ffd8h
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140 UINT64 IA32_EFER; // ffe0h
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141 UINT64 _RFLAGS; // ffe8h
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142 UINT64 _CR3; // fff0h
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143 UINT64 _CR0; // fff8h
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144 } EFI_SMM_CPU_STATE64;
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147 /// Union of CPU save-state strcutures for IA32 and X64.
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149 /// This union declaration does not exctly match the Framework SMM CIS 0.91 because the
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150 /// union in the Framework SMM CIS 0.91 contains an unnamed union member that causes build
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151 /// breaks on many compilers with high warning levels. Instead, the UINT8 Reserved[0x200]
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152 /// field has been moved into EFI_SMM_CPU_STATE32. This maintains binary compatibility for
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153 /// the layout and also maintains source comaptibility for access of all fields in this
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157 EFI_SMM_CPU_STATE32 x86;
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158 EFI_SMM_CPU_STATE64 x64;
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159 } EFI_SMM_CPU_STATE;
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164 /// Provides a programatic means to access SMM save state.
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166 struct _EFI_SMM_CPU_SAVE_STATE_PROTOCOL {
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168 /// Reference to a list of save states
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170 EFI_SMM_CPU_STATE **CpuSaveState;
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173 extern EFI_GUID gEfiSmmCpuSaveStateProtocolGuid;
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