IntelFrameworkPkg/Include/Protocol/SmmCpuSaveState.h

   1 /** @file
   2   This file declares the SMM CPU Save State protocol, which provides the processor
   3   save-state information for IA-32 and Itanium processors.
   4
   5   Copyright (c) 2010, Intel Corporation
   6   All rights reserved. This program and the accompanying materials
   7   are licensed and made available under the terms and conditions of the BSD License
   8   which accompanies this distribution.  The full text of the license may be found at
   9   http://opensource.org/licenses/bsd-license.php
  10
  11   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14   @par Revision Reference:
  15   This Protocol is defined in Framework of EFI SMM Core Interface Spec
  16   Version 0.91.
  17 **/
  18
  19 #ifndef _SMM_CPU_SAVE_STATE_H_
  20 #define _SMM_CPU_SAVE_STATE_H_
  21
  22 #define EFI_SMM_CPU_SAVE_STATE_PROTOCOL_GUID \
  23   { \
  24     0x21f302ad, 0x6e94, 0x471b, {0x84, 0xbc, 0xb1, 0x48, 0x0, 0x40, 0x3a, 0x1d} \
  25   }
  26
  27 typedef struct _EFI_SMM_CPU_SAVE_STATE_PROTOCOL  EFI_SMM_CPU_SAVE_STATE_PROTOCOL;
  28
  29 #define EFI_SMM_MIN_REV_ID_x64  0x30006
  30
  31 #pragma pack (1)
  32
  33 ///
  34 /// CPU save-state strcuture for IA32 and X64.
  35 ///
  36 /// This struct declaration does not exctly match the Framework SMM CIS 0.91 because the
  37 /// union in the Framework SMM CIS 0.91 contains an unnamed union member that causes build
  38 /// breaks on many compilers with high warning levels.  Instead, the UINT8 Reserved[0x200]
  39 /// field has been moved into EFI_SMM_CPU_STATE32.  This maintains binary compatibility for
  40 /// the layout and also maintains source comaptibility for access of all fields in this
  41 /// union.
  42 ///
  43 /// This struct declaration does not exctly match the Framework SMM CIS 0.91 because
  44 /// The Framework SMM CIS 0.91 uses ASM_XXX for base types in this structure.  These
  45 /// have been changed to use the base types defined in the UEFI Specification.
  46 ///
  47 typedef struct {
  48   UINT8   Reserved[0x200];
  49   UINT8   Reserved1[0xf8];  // fe00h
  50   UINT32  SMBASE;           // fef8h
  51   UINT32  SMMRevId;         // fefch
  52   UINT16  IORestart;        // ff00h
  53   UINT16  AutoHALTRestart;  // ff02h
  54   UINT32  IEDBASE;          // ff04h
  55   UINT8   Reserved2[0x98];  // ff08h
  56   UINT32  IOMemAddr;        // ffa0h
  57   UINT32  IOMisc;           // ffa4h
  58   UINT32  _ES;
  59   UINT32  _CS;
  60   UINT32  _SS;
  61   UINT32  _DS;
  62   UINT32  _FS;
  63   UINT32  _GS;
  64   UINT32  _LDTBase;
  65   UINT32  _TR;
  66   UINT32  _DR7;
  67   UINT32  _DR6;
  68   UINT32  _EAX;
  69   UINT32  _ECX;
  70   UINT32  _EDX;
  71   UINT32  _EBX;
  72   UINT32  _ESP;
  73   UINT32  _EBP;
  74   UINT32  _ESI;
  75   UINT32  _EDI;
  76   UINT32  _EIP;
  77   UINT32  _EFLAGS;
  78   UINT32  _CR3;
  79   UINT32  _CR0;
  80 } EFI_SMM_CPU_STATE32;
  81
  82 ///
  83 /// This struct declaration does not exctly match the Framework SMM CIS 0.91 because
  84 /// The Framework SMM CIS 0.91 uses ASM_XXX for base types in this structure.  These
  85 /// have been changed to use the base types defined in the UEFI Specification.
  86 ///
  87 typedef struct {
  88   UINT8   Reserved1[0x1d0];  // fc00h
  89   UINT32  GdtBaseHiDword;    // fdd0h
  90   UINT32  LdtBaseHiDword;    // fdd4h
  91   UINT32  IdtBaseHiDword;    // fdd8h
  92   UINT8   Reserved2[0xc];    // fddch
  93   UINT64  IO_EIP;            // fde8h
  94   UINT8   Reserved3[0x50];   // fdf0h
  95   UINT32  _CR4;              // fe40h
  96   UINT8   Reserved4[0x48];   // fe44h
  97   UINT32  GdtBaseLoDword;    // fe8ch
  98   UINT32  GdtLimit;          // fe90h
  99   UINT32  IdtBaseLoDword;    // fe94h
 100   UINT32  IdtLimit;          // fe98h
 101   UINT32  LdtBaseLoDword;    // fe9ch
 102   UINT32  LdtLimit;          // fea0h
 103   UINT32  LdtInfo;           // fea4h
 104   UINT8   Reserved5[0x50];   // fea8h
 105   UINT32  SMBASE;            // fef8h
 106   UINT32  SMMRevId;          // fefch
 107   UINT16  AutoHALTRestart;   // ff00h
 108   UINT16  IORestart;         // ff02h
 109   UINT32  IEDBASE;           // ff04h
 110   UINT8   Reserved6[0x14];   // ff08h
 111   UINT64  _R15;              // ff1ch
 112   UINT64  _R14;
 113   UINT64  _R13;
 114   UINT64  _R12;
 115   UINT64  _R11;
 116   UINT64  _R10;
 117   UINT64  _R9;
 118   UINT64  _R8;
 119   UINT64  _RAX;              // ff5ch
 120   UINT64  _RCX;
 121   UINT64  _RDX;
 122   UINT64  _RBX;
 123   UINT64  _RSP;
 124   UINT64  _RBP;
 125   UINT64  _RSI;
 126   UINT64  _RDI;
 127   UINT64  IOMemAddr;         // ff9ch
 128   UINT32  IOMisc;            // ffa4h
 129   UINT32  _ES;               // ffa8h
 130   UINT32  _CS;
 131   UINT32  _SS;
 132   UINT32  _DS;
 133   UINT32  _FS;
 134   UINT32  _GS;
 135   UINT32  _LDTR;             // ffc0h
 136   UINT32  _TR;
 137   UINT64  _DR7;              // ffc8h
 138   UINT64  _DR6;
 139   UINT64  _RIP;              // ffd8h
 140   UINT64  IA32_EFER;         // ffe0h
 141   UINT64  _RFLAGS;           // ffe8h
 142   UINT64  _CR3;              // fff0h
 143   UINT64  _CR0;              // fff8h
 144 } EFI_SMM_CPU_STATE64;
 145
 146 ///
 147 /// Union of CPU save-state strcutures for IA32 and X64.
 148 ///
 149 /// This union declaration does not exctly match the Framework SMM CIS 0.91 because the
 150 /// union in the Framework SMM CIS 0.91 contains an unnamed union member that causes build
 151 /// breaks on many compilers with high warning levels.  Instead, the UINT8 Reserved[0x200]
 152 /// field has been moved into EFI_SMM_CPU_STATE32.  This maintains binary compatibility for
 153 /// the layout and also maintains source comaptibility for access of all fields in this
 154 /// union.
 155 ///
 156 typedef union  {
 157   EFI_SMM_CPU_STATE32  x86;
 158   EFI_SMM_CPU_STATE64  x64;
 159 } EFI_SMM_CPU_STATE;
 160
 161 #pragma pack ()
 162
 163 ///
 164 /// Provides a programatic means to access SMM save state.
 165 ///
 166 struct _EFI_SMM_CPU_SAVE_STATE_PROTOCOL {
 167   ///
 168   /// Reference to a list of save states
 169   ///
 170   EFI_SMM_CPU_STATE  **CpuSaveState;
 171 };
 172
 173 extern EFI_GUID gEfiSmmCpuSaveStateProtocolGuid;
 174
 175 #endif