3 The implementation of I/O operation for this library instance
4 are based on EFI_CPU_IO_PROTOCOL.
6 Copyright (c) 2006, Intel Corporation<BR>
7 All rights reserved. This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
20 #include "DxeCpuIoLibInternal.h"
23 // Globle varible to cache pointer to CpuIo protocol.
25 STATIC EFI_CPU_IO_PROTOCOL
*mCpuIo
= NULL
;
26 STATIC EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*mPciRootBridgeIo
= NULL
;
29 The constructor function caches the pointer to CpuIo protocol.
31 The constructor function locates CpuIo protocol from protocol database.
32 It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.
34 @param ImageHandle The firmware allocated handle for the EFI image.
35 @param SystemTable A pointer to the EFI System Table.
37 @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.
43 IN EFI_HANDLE ImageHandle
,
44 IN EFI_SYSTEM_TABLE
*SystemTable
49 Status
= gBS
->LocateProtocol (&gEfiPciRootBridgeIoProtocolGuid
, NULL
, (VOID
**) &mPciRootBridgeIo
);
50 if (EFI_ERROR (Status
)) {
51 Status
= gBS
->LocateProtocol (&gEfiCpuIoProtocolGuid
, NULL
, (VOID
**) &mCpuIo
);
53 ASSERT_EFI_ERROR (Status
);
59 Reads registers in the EFI CPU I/O space.
61 Reads the I/O port specified by Port with registers width specified by Width.
62 The read value is returned. If such operations are not supported, then ASSERT().
63 This function must guarantee that all I/O read and write operations are serialized.
65 @param Port The base address of the I/O operation.
66 The caller is responsible for aligning the Address if required.
67 @param Width The width of the I/O operation.
69 @return Data read from registers in the EFI CPU I/O space.
76 IN EFI_CPU_IO_PROTOCOL_WIDTH Width
82 if (mPciRootBridgeIo
!= NULL
) {
83 Status
= mPciRootBridgeIo
->Io
.Read (mPciRootBridgeIo
, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
) Width
, Port
, 1, &Data
);
85 Status
= mCpuIo
->Io
.Read (mCpuIo
, Width
, Port
, 1, &Data
);
87 ASSERT_EFI_ERROR (Status
);
93 Writes registers in the EFI CPU I/O space.
95 Writes the I/O port specified by Port with registers width and value specified by Width
96 and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
97 This function must guarantee that all I/O read and write operations are serialized.
99 @param Port The base address of the I/O operation.
100 The caller is responsible for aligning the Address if required.
101 @param Width The width of the I/O operation.
102 @param Data The value to write to the I/O port.
104 @return The paramter of Data.
111 IN EFI_CPU_IO_PROTOCOL_WIDTH Width
,
117 if (mPciRootBridgeIo
!= NULL
) {
118 Status
= mPciRootBridgeIo
->Io
.Write (mPciRootBridgeIo
, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
) Width
, Port
, 1, &Data
);
120 Status
= mCpuIo
->Io
.Write (mCpuIo
, Width
, Port
, 1, &Data
);
122 ASSERT_EFI_ERROR (Status
);
128 Reads memory-mapped registers in the EFI system memory space.
130 Reads the MMIO registers specified by Address with registers width specified by Width.
131 The read value is returned. If such operations are not supported, then ASSERT().
132 This function must guarantee that all MMIO read and write operations are serialized.
134 @param Address The MMIO register to read.
135 The caller is responsible for aligning the Address if required.
136 @param Width The width of the I/O operation.
138 @return Data read from registers in the EFI system memory space.
145 IN EFI_CPU_IO_PROTOCOL_WIDTH Width
151 if (mPciRootBridgeIo
!= NULL
) {
152 Status
= mPciRootBridgeIo
->Mem
.Read (mPciRootBridgeIo
, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
) Width
, Address
, 1, &Data
);
154 Status
= mCpuIo
->Mem
.Read (mCpuIo
, Width
, Address
, 1, &Data
);
156 ASSERT_EFI_ERROR (Status
);
162 Writes memory-mapped registers in the EFI system memory space.
164 Writes the MMIO registers specified by Address with registers width and value specified by Width
165 and Data respectively. Data is returned. If such operations are not supported, then ASSERT().
166 This function must guarantee that all MMIO read and write operations are serialized.
168 @param Address The MMIO register to read.
169 The caller is responsible for aligning the Address if required.
170 @param Width The width of the I/O operation.
172 @return Data read from registers in the EFI system memory space.
179 IN EFI_CPU_IO_PROTOCOL_WIDTH Width
,
185 if (mPciRootBridgeIo
!= NULL
) {
186 Status
= mPciRootBridgeIo
->Mem
.Write (mPciRootBridgeIo
, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH
) Width
, Address
, 1, &Data
);
188 Status
= mCpuIo
->Mem
.Write (mCpuIo
, Width
, Address
, 1, &Data
);
190 ASSERT_EFI_ERROR (Status
);
196 Reads an 8-bit I/O port.
198 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.
199 This function must guarantee that all I/O read and write operations are
202 If 8-bit I/O port operations are not supported, then ASSERT().
204 @param Port The I/O port to read.
206 @return The value read.
215 return (UINT8
)IoReadWorker (Port
, EfiCpuIoWidthUint8
);
219 Writes an 8-bit I/O port.
221 Writes the 8-bit I/O port specified by Port with the value specified by Value
222 and returns Value. This function must guarantee that all I/O read and write
223 operations are serialized.
225 If 8-bit I/O port operations are not supported, then ASSERT().
227 @param Port The I/O port to write.
228 @param Value The value to write to the I/O port.
230 @return The value written the I/O port.
240 return (UINT8
)IoWriteWorker (Port
, EfiCpuIoWidthUint8
, Value
);
244 Reads a 16-bit I/O port.
246 Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.
247 This function must guarantee that all I/O read and write operations are
250 If 16-bit I/O port operations are not supported, then ASSERT().
252 @param Port The I/O port to read.
254 @return The value read.
264 // Make sure Port is aligned on a 16-bit boundary.
266 ASSERT ((Port
& 1) == 0);
267 return (UINT16
)IoReadWorker (Port
, EfiCpuIoWidthUint16
);
271 Writes a 16-bit I/O port.
273 Writes the 16-bit I/O port specified by Port with the value specified by Value
274 and returns Value. This function must guarantee that all I/O read and write
275 operations are serialized.
277 If 16-bit I/O port operations are not supported, then ASSERT().
279 @param Port The I/O port to write.
280 @param Value The value to write to the I/O port.
282 @return The value written the I/O port.
293 // Make sure Port is aligned on a 16-bit boundary.
295 ASSERT ((Port
& 1) == 0);
296 return (UINT16
)IoWriteWorker (Port
, EfiCpuIoWidthUint16
, Value
);
300 Reads a 32-bit I/O port.
302 Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.
303 This function must guarantee that all I/O read and write operations are
306 If 32-bit I/O port operations are not supported, then ASSERT().
308 @param Port The I/O port to read.
310 @return The value read.
320 // Make sure Port is aligned on a 32-bit boundary.
322 ASSERT ((Port
& 3) == 0);
323 return (UINT32
)IoReadWorker (Port
, EfiCpuIoWidthUint32
);
327 Writes a 32-bit I/O port.
329 Writes the 32-bit I/O port specified by Port with the value specified by Value
330 and returns Value. This function must guarantee that all I/O read and write
331 operations are serialized.
333 If 32-bit I/O port operations are not supported, then ASSERT().
335 @param Port The I/O port to write.
336 @param Value The value to write to the I/O port.
338 @return The value written the I/O port.
349 // Make sure Port is aligned on a 32-bit boundary.
351 ASSERT ((Port
& 3) == 0);
352 return (UINT32
)IoWriteWorker (Port
, EfiCpuIoWidthUint32
, Value
);
356 Reads a 64-bit I/O port.
358 Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.
359 This function must guarantee that all I/O read and write operations are
362 If 64-bit I/O port operations are not supported, then ASSERT().
364 @param Port The I/O port to read.
366 @return The value read.
376 // Make sure Port is aligned on a 64-bit boundary.
378 ASSERT ((Port
& 7) == 0);
379 return IoReadWorker (Port
, EfiCpuIoWidthUint64
);
383 Writes a 64-bit I/O port.
385 Writes the 64-bit I/O port specified by Port with the value specified by Value
386 and returns Value. This function must guarantee that all I/O read and write
387 operations are serialized.
389 If 64-bit I/O port operations are not supported, then ASSERT().
391 @param Port The I/O port to write.
392 @param Value The value to write to the I/O port.
394 @return The value written the I/O port.
405 // Make sure Port is aligned on a 64-bit boundary.
407 ASSERT ((Port
& 7) == 0);
408 return IoWriteWorker (Port
, EfiCpuIoWidthUint64
, Value
);
412 Reads an 8-bit MMIO register.
414 Reads the 8-bit MMIO register specified by Address. The 8-bit read value is
415 returned. This function must guarantee that all MMIO read and write
416 operations are serialized.
418 If 8-bit MMIO register operations are not supported, then ASSERT().
420 @param Address The MMIO register to read.
422 @return The value read.
431 return (UINT8
)MmioReadWorker (Address
, EfiCpuIoWidthUint8
);
435 Writes an 8-bit MMIO register.
437 Writes the 8-bit MMIO register specified by Address with the value specified
438 by Value and returns Value. This function must guarantee that all MMIO read
439 and write operations are serialized.
441 If 8-bit MMIO register operations are not supported, then ASSERT().
443 @param Address The MMIO register to write.
444 @param Value The value to write to the MMIO register.
454 return (UINT8
)MmioWriteWorker (Address
, EfiCpuIoWidthUint8
, Value
);
458 Reads a 16-bit MMIO register.
460 Reads the 16-bit MMIO register specified by Address. The 16-bit read value is
461 returned. This function must guarantee that all MMIO read and write
462 operations are serialized.
464 If 16-bit MMIO register operations are not supported, then ASSERT().
466 @param Address The MMIO register to read.
468 @return The value read.
478 // Make sure Address is aligned on a 16-bit boundary.
480 ASSERT ((Address
& 1) == 0);
481 return (UINT16
)MmioReadWorker (Address
, EfiCpuIoWidthUint16
);
485 Writes a 16-bit MMIO register.
487 Writes the 16-bit MMIO register specified by Address with the value specified
488 by Value and returns Value. This function must guarantee that all MMIO read
489 and write operations are serialized.
491 If 16-bit MMIO register operations are not supported, then ASSERT().
493 @param Address The MMIO register to write.
494 @param Value The value to write to the MMIO register.
505 // Make sure Address is aligned on a 16-bit boundary.
507 ASSERT ((Address
& 1) == 0);
508 return (UINT16
)MmioWriteWorker (Address
, EfiCpuIoWidthUint16
, Value
);
512 Reads a 32-bit MMIO register.
514 Reads the 32-bit MMIO register specified by Address. The 32-bit read value is
515 returned. This function must guarantee that all MMIO read and write
516 operations are serialized.
518 If 32-bit MMIO register operations are not supported, then ASSERT().
520 @param Address The MMIO register to read.
522 @return The value read.
532 // Make sure Address is aligned on a 32-bit boundary.
534 ASSERT ((Address
& 3) == 0);
535 return (UINT32
)MmioReadWorker (Address
, EfiCpuIoWidthUint32
);
539 Writes a 32-bit MMIO register.
541 Writes the 32-bit MMIO register specified by Address with the value specified
542 by Value and returns Value. This function must guarantee that all MMIO read
543 and write operations are serialized.
545 If 32-bit MMIO register operations are not supported, then ASSERT().
547 @param Address The MMIO register to write.
548 @param Value The value to write to the MMIO register.
559 // Make sure Address is aligned on a 32-bit boundary.
561 ASSERT ((Address
& 3) == 0);
562 return (UINT32
)MmioWriteWorker (Address
, EfiCpuIoWidthUint32
, Value
);
566 Reads a 64-bit MMIO register.
568 Reads the 64-bit MMIO register specified by Address. The 64-bit read value is
569 returned. This function must guarantee that all MMIO read and write
570 operations are serialized.
572 If 64-bit MMIO register operations are not supported, then ASSERT().
574 @param Address The MMIO register to read.
576 @return The value read.
586 // Make sure Address is aligned on a 64-bit boundary.
588 ASSERT ((Address
& 7) == 0);
589 return (UINT64
)MmioReadWorker (Address
, EfiCpuIoWidthUint64
);
593 Writes a 64-bit MMIO register.
595 Writes the 64-bit MMIO register specified by Address with the value specified
596 by Value and returns Value. This function must guarantee that all MMIO read
597 and write operations are serialized.
599 If 64-bit MMIO register operations are not supported, then ASSERT().
601 @param Address The MMIO register to write.
602 @param Value The value to write to the MMIO register.
613 // Make sure Address is aligned on a 64-bit boundary.
615 ASSERT ((Address
& 7) == 0);
616 return (UINT64
)MmioWriteWorker (Address
, EfiCpuIoWidthUint64
, Value
);