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1 /** @file
2 Header file for FSP-M Arch Config PPI for Dispatch mode
3
4 Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>
5
6 This program and the accompanying materials are licensed and made available under
7 the terms and conditions of the BSD License which accompanies this distribution.
8 The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15
16 #ifndef _FSPM_ARCH_CONFIG_PPI_H_
17 #define _FSPM_ARCH_CONFIG_PPI_H_
18
19 #define FSPM_ARCH_CONFIG_PPI_REVISION 0x1
20
21 ///
22 /// Global ID for the FSPM_ARCH_CONFIG_PPI.
23 ///
24 #define FSPM_ARCH_CONFIG_GUID \
25 { \
26 0x824d5a3a, 0xaf92, 0x4c0c, { 0x9f, 0x19, 0x19, 0x52, 0x6d, 0xca, 0x4a, 0xbb } \
27 }
28
29 ///
30 /// This PPI provides FSP-M Arch Config PPI.
31 ///
32 typedef struct {
33 ///
34 /// Revision of the structure
35 ///
36 UINT8 Revision;
37 UINT8 Reserved[3];
38 ///
39 /// Pointer to the non-volatile storage (NVS) data buffer.
40 /// If it is NULL it indicates the NVS data is not available.
41 ///
42 VOID *NvsBufferPtr;
43 ///
44 /// Size of memory to be reserved by FSP below "top
45 /// of low usable memory" for bootloader usage.
46 ///
47 UINT32 BootLoaderTolumSize;
48 UINT8 Reserved1[4];
49 } FSPM_ARCH_CONFIG_PPI;
50
51 extern EFI_GUID gFspmArchConfigPpiGuid;
52
53 #endif // _FSPM_ARCH_CONFIG_PPI_H_