MdeModulePkg/LockboxNullLib: clean up INF file.
[mirror_edk2.git] / IntelFsp2WrapperPkg / IntelFsp2WrapperPkg.dec
1 ## @file
2 # Provides drivers and definitions to support fsp in EDKII bios.
3 #
4 # Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
5 # This program and the accompanying materials are licensed and made available under
6 # the terms and conditions of the BSD License that accompanies this distribution.
7 # The full text of the license may be found at
8 # http://opensource.org/licenses/bsd-license.php.
9 #
10 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12 #
13 ##
14
15 [Defines]
16 DEC_SPECIFICATION = 0x00010005
17 PACKAGE_NAME = IntelFsp2WrapperPkg
18 PACKAGE_GUID = FAFE06D4-7245-42D7-9FD2-E5D5E36AB0A0
19 PACKAGE_VERSION = 0.1
20
21 [Includes]
22 Include
23
24 [LibraryClasses]
25 ## @libraryclass Provide FSP API related function.
26 FspWrapperApiLib|Include/Library/FspWrapperApiLib.h
27 FspWrapperApiTestLib|Include/Library/FspWrapperApiTestLib.h
28
29 ## @libraryclass Provide FSP hob process related function.
30 FspWrapperHobProcessLib|Include/Library/FspWrapperHobProcessLib.h
31
32 ## @libraryclass Provide FSP platform related function.
33 FspWrapperPlatformLib|Include/Library/FspWrapperPlatformLib.h
34
35 [Guids]
36 #
37 # GUID defined in package
38 #
39 gIntelFsp2WrapperTokenSpaceGuid = { 0xa34cf082, 0xf50, 0x4f0d, { 0x89, 0x8a, 0x3d, 0x39, 0x30, 0x2b, 0xc5, 0x1e } }
40 gFspApiPerformanceGuid = { 0xc9122295, 0x56ed, 0x4d4e, { 0x06, 0xa6, 0x50, 0x8d, 0x89, 0x4d, 0x3e, 0x40 } }
41 gFspHobGuid = { 0x6d86fb36, 0xba90, 0x472c, { 0xb5, 0x83, 0x3f, 0xbe, 0xd3, 0xfb, 0x20, 0x9a } }
42
43 [Ppis]
44 gFspSiliconInitDonePpiGuid = { 0x4eb6e09c, 0xd256, 0x4e1e, { 0xb5, 0x0a, 0x87, 0x4b, 0xd2, 0x84, 0xb3, 0xde } }
45 gTopOfTemporaryRamPpiGuid = { 0x2f3962b2, 0x57c5, 0x44ec, { 0x9e, 0xfc, 0xa6, 0x9f, 0xd3, 0x02, 0x03, 0x2b } }
46
47 [Protocols]
48 gAddPerfRecordProtocolGuid = { 0xc4a58d6d, 0x3677, 0x49cb, { 0xa0, 0x0a, 0x94, 0x70, 0x76, 0x5f, 0xb5, 0x5e } }
49
50 ################################################################################
51 #
52 # PCD Declarations section - list of all PCDs Declared by this Package
53 # Only this package should be providing the
54 # declaration, other packages should not.
55 #
56 ################################################################################
57 [PcdsFixedAtBuild, PcdsPatchableInModule]
58 ## Provides the memory mapped base address of the BIOS CodeCache Flash Device.
59 gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheAddress|0xFFE00000|UINT32|0x10000001
60 ## Provides the size of the BIOS Flash Device.
61 gIntelFsp2WrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00200000|UINT32|0x10000002
62
63 ## Indicates the base address of the first Microcode Patch in the Microcode Region
64 gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x10000005
65 gIntelFsp2WrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x10000006
66 ## Indicates the offset of the Cpu Microcode.
67 gIntelFsp2WrapperTokenSpaceGuid.PcdFlashMicrocodeOffset|0x90|UINT32|0x10000007
68
69 ## Indicate the PEI memory size platform want to report
70 gIntelFsp2WrapperTokenSpaceGuid.PcdPeiMinMemSize|0x1800000|UINT32|0x40000004
71 ## Indicate the PEI memory size platform want to report
72 gIntelFsp2WrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT32|0x40000005
73
74 ## This is the base address of FSP-T
75 gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT32|0x00000300
76
77 ## This PCD indicates if FSP APIs are skipped from FSP wrapper.<BR><BR>
78 # If a bit is set, that means this FSP API is skipped.<BR>
79 # If a bit is clear, that means this FSP API is NOT skipped.<BR>
80 # NOTE: Only NotifyPhase Post PCI enumeration (BIT16) is implemented.<BR>
81 # BIT[15:0] is for function:<BR>
82 # BIT0 - Skip TempRamInit<BR>
83 # BIT1 - Skip MemoryInit<BR>
84 # BIT2 - Skip TempRamExit<BR>
85 # BIT3 - Skip SiliconInit<BR>
86 # BIT4 - Skip NotifyPhase<BR>
87 # BIT[32:16] is for sub-function:<BR>
88 # BIT16 - Skip NotifyPhase (AfterPciEnumeration)<BR>
89 # BIT17 - Skip NotifyPhase (ReadyToBoot)<BR>
90 # BIT18 - Skip NotifyPhase (EndOfFirmware)<BR>
91 # Any undefined BITs are reserved for future use.<BR>
92 # @Prompt Skip FSP API from FSP wrapper.
93 gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x40000009
94
95 ## This PCD decides how Wrapper code utilizes FSP
96 # 0: DISPATCH mode (FSP Wrapper will load PeiCore from FSP without calling FSP API)
97 # 1: API mode (FSP Wrapper will call FSP API)
98 #
99 gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0x00000001|UINT8|0x4000000A
100
101 [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx]
102 #
103 ## These are the base address of FSP-M/S
104 #
105 gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00001000
106 gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32|0x00001001
107 #
108 # To provide flexibility for platform to pre-allocate FSP UPD buffer
109 #
110 # The PCDs define the pre-allocated FSPM and FSPS UPD Data Buffer Address.
111 # 0x00000000 - Platform will not pre-allocate UPD buffer before FspWrapper module
112 # non-zero - Platform will pre-allocate UPD buffer and patch this value to
113 # buffer address before FspWrapper module executing.
114 #
115 gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0x00000000|UINT32|0x50000000
116 gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0x00000000|UINT32|0x50000001