IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/PeiCoreEntry.asm

   1 ;------------------------------------------------------------------------------
   2 ;
   3 ; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
   4 ; This program and the accompanying materials
   5 ; are licensed and made available under the terms and conditions of the BSD License
   6 ; which accompanies this distribution.  The full text of the license may be found at
   7 ; http://opensource.org/licenses/bsd-license.php.
   8 ;
   9 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 ;
  12 ; Module Name:
  13 ;
  14 ;  PeiCoreEntry.asm
  15 ;
  16 ; Abstract:
  17 ;
  18 ;   Find and call SecStartup
  19 ;
  20 ;------------------------------------------------------------------------------
  21
  22 .686p
  23 .xmm
  24 .model flat, c
  25 .code
  26
  27 EXTRN   SecStartup:NEAR
  28 EXTRN   PlatformInit:NEAR
  29
  30 CallPeiCoreEntryPoint   PROC PUBLIC
  31   ;
  32   ; Obtain the hob list pointer
  33   ;
  34   mov     eax, [esp+4]
  35   ;
  36   ; Obtain the stack information
  37   ;   ECX: start of range
  38   ;   EDX: end of range
  39   ;
  40   mov     ecx, [esp+8]
  41   mov     edx, [esp+0Ch]
  42
  43   ;
  44   ; Platform init
  45   ;
  46   pushad
  47   push edx
  48   push ecx
  49   push eax
  50   call PlatformInit
  51   pop  eax
  52   pop  eax
  53   pop  eax
  54   popad
  55
  56   ;
  57   ; Set stack top pointer
  58   ;
  59   mov     esp, edx
  60
  61   ;
  62   ; Push the hob list pointer
  63   ;
  64   push    eax
  65
  66   ;
  67   ; Save the value
  68   ;   ECX: start of range
  69   ;   EDX: end of range
  70   ;
  71   mov     ebp, esp
  72   push    ecx
  73   push    edx
  74
  75   ;
  76   ; Push processor count to stack first, then BIST status (AP then BSP)
  77   ;
  78   mov     eax, 1
  79   cpuid
  80   shr     ebx, 16
  81   and     ebx, 0000000FFh
  82   cmp     bl, 1
  83   jae     PushProcessorCount
  84
  85   ;
  86   ; Some processors report 0 logical processors.  Effectively 0 = 1.
  87   ; So we fix up the processor count
  88   ;
  89   inc     ebx
  90
  91 PushProcessorCount:
  92   push    ebx
  93
  94   ;
  95   ; We need to implement a long-term solution for BIST capture.  For now, we just copy BSP BIST
  96   ; for all processor threads
  97   ;
  98   xor     ecx, ecx
  99   mov     cl, bl
 100 PushBist:
 101   movd    eax, mm0
 102   push    eax
 103   loop    PushBist
 104
 105   ; Save Time-Stamp Counter
 106   movd eax, mm5
 107   push eax
 108
 109   movd eax, mm6
 110   push eax
 111
 112   ;
 113   ; Pass entry point of the PEI core
 114   ;
 115   mov     edi, 0FFFFFFE0h
 116   push    DWORD PTR ds:[edi]
 117
 118   ;
 119   ; Pass BFV into the PEI Core
 120   ;
 121   mov     edi, 0FFFFFFFCh
 122   push    DWORD PTR ds:[edi]
 123
 124   ;
 125   ; Pass stack size into the PEI Core
 126   ;
 127   mov     ecx, [ebp - 4]
 128   mov     edx, [ebp - 8]
 129   push    ecx       ; RamBase
 130
 131   sub     edx, ecx
 132   push    edx       ; RamSize
 133
 134   ;
 135   ; Pass Control into the PEI Core
 136   ;
 137   call SecStartup
 138 CallPeiCoreEntryPoint   ENDP
 139
 140 END