IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/PeiCoreEntry.nasm

   1 ;------------------------------------------------------------------------------
   2 ;
   3 ; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
   4 ; This program and the accompanying materials
   5 ; are licensed and made available under the terms and conditions of the BSD License
   6 ; which accompanies this distribution.  The full text of the license may be found at
   7 ; http://opensource.org/licenses/bsd-license.php.
   8 ;
   9 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 ;
  12 ; Module Name:
  13 ;
  14 ;  PeiCoreEntry.nasm
  15 ;
  16 ; Abstract:
  17 ;
  18 ;   Find and call SecStartup
  19 ;
  20 ;------------------------------------------------------------------------------
  21
  22 SECTION .text
  23
  24 extern ASM_PFX(SecStartup)
  25 extern ASM_PFX(PlatformInit)
  26
  27 global ASM_PFX(CallPeiCoreEntryPoint)
  28 ASM_PFX(CallPeiCoreEntryPoint):
  29   ;
  30   ; Obtain the hob list pointer
  31   ;
  32   mov     eax, [esp+4]
  33   ;
  34   ; Obtain the stack information
  35   ;   ECX: start of range
  36   ;   EDX: end of range
  37   ;
  38   mov     ecx, [esp+8]
  39   mov     edx, [esp+0xC]
  40
  41   ;
  42   ; Platform init
  43   ;
  44   pushad
  45   push edx
  46   push ecx
  47   push eax
  48   call ASM_PFX(PlatformInit)
  49   pop  eax
  50   pop  eax
  51   pop  eax
  52   popad
  53
  54   ;
  55   ; Set stack top pointer
  56   ;
  57   mov     esp, edx
  58
  59   ;
  60   ; Push the hob list pointer
  61   ;
  62   push    eax
  63
  64   ;
  65   ; Save the value
  66   ;   ECX: start of range
  67   ;   EDX: end of range
  68   ;
  69   mov     ebp, esp
  70   push    ecx
  71   push    edx
  72
  73   ;
  74   ; Push processor count to stack first, then BIST status (AP then BSP)
  75   ;
  76   mov     eax, 1
  77   cpuid
  78   shr     ebx, 16
  79   and     ebx, 0xFF
  80   cmp     bl, 1
  81   jae     PushProcessorCount
  82
  83   ;
  84   ; Some processors report 0 logical processors.  Effectively 0 = 1.
  85   ; So we fix up the processor count
  86   ;
  87   inc     ebx
  88
  89 PushProcessorCount:
  90   push    ebx
  91
  92   ;
  93   ; We need to implement a long-term solution for BIST capture.  For now, we just copy BSP BIST
  94   ; for all processor threads
  95   ;
  96   xor     ecx, ecx
  97   mov     cl, bl
  98 PushBist:
  99   movd    eax, mm0
 100   push    eax
 101   loop    PushBist
 102
 103   ; Save Time-Stamp Counter
 104   movd eax, mm5
 105   push eax
 106
 107   movd eax, mm6
 108   push eax
 109
 110   ;
 111   ; Pass entry point of the PEI core
 112   ;
 113   mov     edi, 0xFFFFFFE0
 114   push    DWORD [edi]
 115
 116   ;
 117   ; Pass BFV into the PEI Core
 118   ;
 119   mov     edi, 0xFFFFFFFC
 120   push    DWORD [edi]
 121
 122   ;
 123   ; Pass stack size into the PEI Core
 124   ;
 125   mov     ecx, [ebp - 4]
 126   mov     edx, [ebp - 8]
 127   push    ecx       ; RamBase
 128
 129   sub     edx, ecx
 130   push    edx       ; RamSize
 131
 132   ;
 133   ; Pass Control into the PEI Core
 134   ;
 135   call ASM_PFX(SecStartup)
 136