1 #------------------------------------------------------------------------------
3 # Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
4 # This program and the accompanying materials
5 # are licensed and made available under the terms and conditions of the BSD License
6 # which accompanies this distribution. The full text of the license may be found at
7 # http://opensource.org/licenses/bsd-license.php.
9 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 # This is the code that goes from real-mode to protected mode.
19 # It consumes the reset vector, calls TempRamInit API from FSP binary.
21 #------------------------------------------------------------------------------
25 ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFsptBaseAddress)
27 ASM_GLOBAL ASM_PFX(_TEXT_REALMODE)
28 ASM_PFX(_TEXT_REALMODE):
29 #----------------------------------------------------------------------------
31 # Procedure: _ModuleEntryPoint
37 # Destroys: Assume all registers
41 # Transition to non-paged flat-model protected mode from a
42 # hard-coded GDT that provides exactly two descriptors.
43 # This is a bare bones transition to protected mode only
44 # used for a while in PEI and possibly DXE.
46 # After enabling protected mode, a far jump is executed to
47 # transfer to PEI using the newly loaded GDT.
53 # MM5 = Save time-stamp counter value high32bit
54 # MM6 = Save time-stamp counter value low32bit.
56 #----------------------------------------------------------------------------
59 ASM_GLOBAL ASM_PFX(_ModuleEntryPoint)
60 ASM_PFX(_ModuleEntryPoint):
61 fninit # clear any pending Floating point exceptions
63 # Store the BIST value in mm0
68 # Save time-stamp counter value
69 # rdtsc load 64bit time-stamp counter to EDX:EAX
76 # Load the GDT table in GdtDesc
83 # Transition to 16 bit protected mode
85 movl %cr0, %eax # Get control register 0
86 orl $0x00000003, %eax # Set PE bit (bit #0) & MP bit (bit #1)
87 movl %eax, %cr0 # Activate protected mode
89 movl %cr4, %eax # Get control register 4
90 orl $0x00000600, %eax # Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)
94 # Now we're in 16 bit protected mode
95 # Set up the selectors for 32 bit protected mode entry
97 movw SYS_DATA_SEL, %ax
105 # Transition to Flat 32 bit protected mode
106 # The jump to a far pointer causes the transition to 32 bit mode
108 movl ASM_PFX(ProtectedModeEntryLinearAddress), %esi
111 ASM_GLOBAL ASM_PFX(_TEXT_PROTECTED_MODE)
112 ASM_PFX(_TEXT_PROTECTED_MODE):
114 #----------------------------------------------------------------------------
116 # Procedure: ProtectedModeEntryPoint
122 # Destroys: Assume all registers
126 # This function handles:
127 # Call two basic APIs from FSP binary
128 # Initializes stack with some early data (BIST, PEI entry, etc)
132 #----------------------------------------------------------------------------
135 ASM_GLOBAL ASM_PFX(ProtectedModeEntryPoint)
136 ASM_PFX(ProtectedModeEntryPoint):
138 # Find the fsp info header
139 movl ASM_PFX(_gPcd_FixedAtBuild_PcdFsptBaseAddress), %edi
141 movl FVH_SIGINATURE_OFFSET(%edi), %eax
142 cmp $FVH_SIGINATURE_VALID_VALUE, %eax
143 jnz FspHeaderNotFound
146 movw FVH_EXTHEADER_OFFSET_OFFSET(%edi), %ax
148 jnz FspFvExtHeaderExist
151 movw FVH_HEADER_LENGTH_OFFSET(%edi), %ax # Bypass Fv Header
153 jmp FspCheckFfsHeader
157 movl FVH_EXTHEADER_SIZE_OFFSET(%edi), %eax # Bypass Ext Fv Header
160 # Round up to 8 byte alignment
165 and $0xFFFFFFF8, %edi
171 cmp $FSP_HEADER_GUID_DWORD1, %eax
172 jnz FspHeaderNotFound
175 cmp $FSP_HEADER_GUID_DWORD2, %eax
176 jnz FspHeaderNotFound
178 movl 0x08(%edi), %eax
179 cmp $FSP_HEADER_GUID_DWORD3, %eax
180 jnz FspHeaderNotFound
182 movl 0x0c(%edi), %eax
183 cmp $FSP_HEADER_GUID_DWORD4, %eax
184 jnz FspHeaderNotFound
186 add $FFS_HEADER_SIZE_VALUE, %edi # Bypass the ffs header
188 # Check the section type as raw section
189 movb SECTION_HEADER_TYPE_OFFSET(%edi), %al
191 jnz FspHeaderNotFound
193 addl $RAW_SECTION_HEADER_SIZE_VALUE, %edi # Bypass the section header
200 # Get the fsp TempRamInit Api address
201 movl FSP_HEADER_IMAGEBASE_OFFSET(%edi), %eax
202 addl FSP_HEADER_TEMPRAMINIT_OFFSET(%edi), %eax
204 # Setup the hardcode stack
205 movl $TempRamInitStack, %esp
207 # Call the fsp TempRamInit Api
211 cmp $0x8000000E, %eax #Check if EFI_NOT_FOUND returned. Error code for Microcode Update not found.
212 je CallSecFspInit #If microcode not found, don't hang, but continue.
217 # ECX: start of range
223 # Align the stack at DWORD
225 andl $0xFFFFFFFC, %esp
229 pushl %eax # zero - no hob list yet
230 call ASM_PFX(CallPeiCoreEntryPoint)
237 .long TempRamInitDone
238 .long ASM_PFX(FsptUpdDataPtr)
241 # ROM-based Global-Descriptor Table for the Tiano PEI Phase
246 # GDT[0]: 0x00: Null entry, never used.
248 .equ NULL_SEL, . - GDT_BASE # Selector [0]
250 BootGdtTable: .long 0
253 # Linear data segment descriptor
255 .equ LINEAR_SEL, . - GDT_BASE # Selector [0x8]
256 .word 0xFFFF # limit 0xFFFFF
259 .byte 0x92 # present, ring 0, data, expand-up, writable
260 .byte 0xCF # page-granular, 32-bit
263 # Linear code segment descriptor
265 .equ LINEAR_CODE_SEL, . - GDT_BASE # Selector [0x10]
266 .word 0xFFFF # limit 0xFFFFF
269 .byte 0x9B # present, ring 0, data, expand-up, not-writable
270 .byte 0xCF # page-granular, 32-bit
273 # System data segment descriptor
275 .equ SYS_DATA_SEL, . - GDT_BASE # Selector [0x18]
276 .word 0xFFFF # limit 0xFFFFF
279 .byte 0x93 # present, ring 0, data, expand-up, not-writable
280 .byte 0xCF # page-granular, 32-bit
284 # System code segment descriptor
286 .equ SYS_CODE_SEL, . - GDT_BASE # Selector [0x20]
287 .word 0xFFFF # limit 0xFFFFF
290 .byte 0x9A # present, ring 0, data, expand-up, writable
291 .byte 0xCF # page-granular, 32-bit
294 # Spare segment descriptor
296 .equ SYS16_CODE_SEL, . - GDT_BASE # Selector [0x28]
297 .word 0xFFFF # limit 0xFFFFF
299 .byte 0x0E # Changed from F000 to E000.
300 .byte 0x9B # present, ring 0, code, expand-up, writable
301 .byte 0x00 # byte-granular, 16-bit
304 # Spare segment descriptor
306 .equ SYS16_DATA_SEL, . - GDT_BASE # Selector [0x30]
307 .word 0xFFFF # limit 0xFFFF
310 .byte 0x93 # present, ring 0, data, expand-up, not-writable
311 .byte 0x00 # byte-granular, 16-bit
315 # Spare segment descriptor
317 .equ SPARE5_SEL, . - GDT_BASE # Selector [0x38]
321 .byte 0 # present, ring 0, data, expand-up, writable
322 .byte 0 # page-granular, 32-bit
324 .equ GDT_SIZE, . - BootGdtTable # Size, in bytes
329 GdtDesc: # GDT descriptor
330 .word GDT_SIZE - 1 # GDT limit
331 .long BootGdtTable # GDT base address
333 ASM_PFX(ProtectedModeEntryLinearAddress):
334 ProtectedModeEntryLinearOffset:
335 .long ASM_PFX(ProtectedModeEntryPoint) # Offset of our 32 bit code
336 .word LINEAR_CODE_SEL