IntelFsp2WrapperPkg/Library/SecFspWrapperPlatformSecLibSample/Ia32/SecEntry.asm

   1 ;------------------------------------------------------------------------------
   2 ;
   3 ; Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
   4 ; This program and the accompanying materials
   5 ; are licensed and made available under the terms and conditions of the BSD License
   6 ; which accompanies this distribution.  The full text of the license may be found at
   7 ; http://opensource.org/licenses/bsd-license.php.
   8 ;
   9 ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 ;
  12 ; Module Name:
  13 ;
  14 ;  SecEntry.asm
  15 ;
  16 ; Abstract:
  17 ;
  18 ;  This is the code that goes from real-mode to protected mode.
  19 ;  It consumes the reset vector, calls TempRamInit API from FSP binary.
  20 ;
  21 ;------------------------------------------------------------------------------
  22
  23 #include "Fsp.h"
  24
  25 .686p
  26 .xmm
  27 .model small, c
  28
  29 EXTRN   CallPeiCoreEntryPoint:NEAR
  30 EXTRN   FsptUpdDataPtr:FAR
  31
  32 ; Pcds
  33 EXTRN   PcdGet32 (PcdFsptBaseAddress):DWORD
  34
  35 _TEXT_REALMODE      SEGMENT PARA PUBLIC USE16 'CODE'
  36                     ASSUME  CS:_TEXT_REALMODE, DS:_TEXT_REALMODE
  37
  38 ;----------------------------------------------------------------------------
  39 ;
  40 ; Procedure:    _ModuleEntryPoint
  41 ;
  42 ; Input:        None
  43 ;
  44 ; Output:       None
  45 ;
  46 ; Destroys:     Assume all registers
  47 ;
  48 ; Description:
  49 ;
  50 ;   Transition to non-paged flat-model protected mode from a
  51 ;   hard-coded GDT that provides exactly two descriptors.
  52 ;   This is a bare bones transition to protected mode only
  53 ;   used for a while in PEI and possibly DXE.
  54 ;
  55 ;   After enabling protected mode, a far jump is executed to
  56 ;   transfer to PEI using the newly loaded GDT.
  57 ;
  58 ; Return:       None
  59 ;
  60 ;  MMX Usage:
  61 ;              MM0 = BIST State
  62 ;              MM5 = Save time-stamp counter value high32bit
  63 ;              MM6 = Save time-stamp counter value low32bit.
  64 ;
  65 ;----------------------------------------------------------------------------
  66
  67 align 4
  68 _ModuleEntryPoint PROC NEAR C PUBLIC
  69   fninit                                ; clear any pending Floating point exceptions
  70   ;
  71   ; Store the BIST value in mm0
  72   ;
  73   movd    mm0, eax
  74
  75   ;
  76   ; Save time-stamp counter value
  77   ; rdtsc load 64bit time-stamp counter to EDX:EAX
  78   ;
  79   rdtsc
  80   movd    mm5, edx
  81   movd    mm6, eax
  82
  83   ;
  84   ; Load the GDT table in GdtDesc
  85   ;
  86   mov     esi,  OFFSET GdtDesc
  87   DB      66h
  88   lgdt    fword ptr cs:[si]
  89
  90   ;
  91   ; Transition to 16 bit protected mode
  92   ;
  93   mov     eax, cr0                   ; Get control register 0
  94   or      eax, 00000003h             ; Set PE bit (bit #0) & MP bit (bit #1)
  95   mov     cr0, eax                   ; Activate protected mode
  96
  97   mov     eax, cr4                   ; Get control register 4
  98   or      eax, 00000600h             ; Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)
  99   mov     cr4, eax
 100
 101   ;
 102   ; Now we're in 16 bit protected mode
 103   ; Set up the selectors for 32 bit protected mode entry
 104   ;
 105   mov     ax, SYS_DATA_SEL
 106   mov     ds, ax
 107   mov     es, ax
 108   mov     fs, ax
 109   mov     gs, ax
 110   mov     ss, ax
 111
 112   ;
 113   ; Transition to Flat 32 bit protected mode
 114   ; The jump to a far pointer causes the transition to 32 bit mode
 115   ;
 116   mov esi, offset ProtectedModeEntryLinearAddress
 117   jmp     fword ptr cs:[si]
 118
 119 _ModuleEntryPoint   ENDP
 120 _TEXT_REALMODE      ENDS
 121
 122 _TEXT_PROTECTED_MODE      SEGMENT PARA PUBLIC USE32 'CODE'
 123                           ASSUME  CS:_TEXT_PROTECTED_MODE, DS:_TEXT_PROTECTED_MODE
 124
 125 ;----------------------------------------------------------------------------
 126 ;
 127 ; Procedure:    ProtectedModeEntryPoint
 128 ;
 129 ; Input:        None
 130 ;
 131 ; Output:       None
 132 ;
 133 ; Destroys:     Assume all registers
 134 ;
 135 ; Description:
 136 ;
 137 ; This function handles:
 138 ;   Call two basic APIs from FSP binary
 139 ;   Initializes stack with some early data (BIST, PEI entry, etc)
 140 ;
 141 ; Return:       None
 142 ;
 143 ;----------------------------------------------------------------------------
 144
 145 align 4
 146 ProtectedModeEntryPoint PROC NEAR PUBLIC
 147
 148   ; Find the fsp info header
 149   mov  edi, PcdGet32 (PcdFsptBaseAddress)
 150
 151   mov  eax, dword ptr [edi + FVH_SIGINATURE_OFFSET]
 152   cmp  eax, FVH_SIGINATURE_VALID_VALUE
 153   jnz  FspHeaderNotFound
 154
 155   xor  eax, eax
 156   mov  ax, word ptr [edi + FVH_EXTHEADER_OFFSET_OFFSET]
 157   cmp  ax, 0
 158   jnz  FspFvExtHeaderExist
 159
 160   xor  eax, eax
 161   mov  ax, word ptr [edi + FVH_HEADER_LENGTH_OFFSET]   ; Bypass Fv Header
 162   add  edi, eax
 163   jmp  FspCheckFfsHeader
 164
 165 FspFvExtHeaderExist:
 166   add  edi, eax
 167   mov  eax, dword ptr [edi + FVH_EXTHEADER_SIZE_OFFSET]  ; Bypass Ext Fv Header
 168   add  edi, eax
 169
 170   ; Round up to 8 byte alignment
 171   mov  eax, edi
 172   and  al,  07h
 173   jz   FspCheckFfsHeader
 174
 175   and  edi, 0FFFFFFF8h
 176   add  edi, 08h
 177
 178 FspCheckFfsHeader:
 179   ; Check the ffs guid
 180   mov  eax, dword ptr [edi]
 181   cmp  eax, FSP_HEADER_GUID_DWORD1
 182   jnz  FspHeaderNotFound
 183
 184   mov  eax, dword ptr [edi + 4]
 185   cmp  eax, FSP_HEADER_GUID_DWORD2
 186   jnz  FspHeaderNotFound
 187
 188   mov  eax, dword ptr [edi + 8]
 189   cmp  eax, FSP_HEADER_GUID_DWORD3
 190   jnz  FspHeaderNotFound
 191
 192   mov  eax, dword ptr [edi + 0Ch]
 193   cmp  eax, FSP_HEADER_GUID_DWORD4
 194   jnz  FspHeaderNotFound
 195
 196   add  edi, FFS_HEADER_SIZE_VALUE       ; Bypass the ffs header
 197
 198   ; Check the section type as raw section
 199   mov  al, byte ptr [edi + SECTION_HEADER_TYPE_OFFSET]
 200   cmp  al, 019h
 201   jnz FspHeaderNotFound
 202
 203   add  edi, RAW_SECTION_HEADER_SIZE_VALUE ; Bypass the section header
 204   jmp FspHeaderFound
 205
 206 FspHeaderNotFound:
 207   jmp  $
 208
 209 FspHeaderFound:
 210   ; Get the fsp TempRamInit Api address
 211   mov eax, dword ptr [edi + FSP_HEADER_IMAGEBASE_OFFSET]
 212   add eax, dword ptr [edi + FSP_HEADER_TEMPRAMINIT_OFFSET]
 213
 214   ; Setup the hardcode stack
 215   mov esp, OFFSET TempRamInitStack
 216
 217   ; Call the fsp TempRamInit Api
 218   jmp eax
 219
 220 TempRamInitDone:
 221   cmp eax, 8000000Eh      ;Check if EFI_NOT_FOUND returned. Error code for Microcode Update not found.
 222   je  CallSecFspInit      ;If microcode not found, don't hang, but continue.
 223
 224   cmp eax, 0              ;Check if EFI_SUCCESS retuned.
 225   jnz FspApiFailed
 226
 227   ;   ECX: start of range
 228   ;   EDX: end of range
 229 CallSecFspInit:
 230   xor     eax, eax
 231   mov     esp, edx
 232
 233   ; Align the stack at DWORD
 234   add  esp,  3
 235   and  esp, 0FFFFFFFCh
 236
 237   push    edx
 238   push    ecx
 239   push    eax ; zero - no hob list yet
 240   call    CallPeiCoreEntryPoint
 241
 242 FspApiFailed:
 243   jmp $
 244
 245 align 10h
 246 TempRamInitStack:
 247     DD  OFFSET TempRamInitDone
 248     DD  OFFSET FsptUpdDataPtr ; TempRamInitParams
 249
 250 ProtectedModeEntryPoint ENDP
 251
 252 ;
 253 ; ROM-based Global-Descriptor Table for the Tiano PEI Phase
 254 ;
 255 align 16
 256 PUBLIC  BootGdtTable
 257
 258 ;
 259 ; GDT[0]: 0x00: Null entry, never used.
 260 ;
 261 NULL_SEL            EQU $ - GDT_BASE    ; Selector [0]
 262 GDT_BASE:
 263 BootGdtTable        DD  0
 264                     DD  0
 265 ;
 266 ; Linear data segment descriptor
 267 ;
 268 LINEAR_SEL          EQU $ - GDT_BASE    ; Selector [0x8]
 269     DW  0FFFFh                          ; limit 0xFFFFF
 270     DW  0                               ; base 0
 271     DB  0
 272     DB  092h                            ; present, ring 0, data, expand-up, writable
 273     DB  0CFh                            ; page-granular, 32-bit
 274     DB  0
 275 ;
 276 ; Linear code segment descriptor
 277 ;
 278 LINEAR_CODE_SEL     EQU $ - GDT_BASE    ; Selector [0x10]
 279     DW  0FFFFh                          ; limit 0xFFFFF
 280     DW  0                               ; base 0
 281     DB  0
 282     DB  09Bh                            ; present, ring 0, data, expand-up, not-writable
 283     DB  0CFh                            ; page-granular, 32-bit
 284     DB  0
 285 ;
 286 ; System data segment descriptor
 287 ;
 288 SYS_DATA_SEL        EQU $ - GDT_BASE    ; Selector [0x18]
 289     DW  0FFFFh                          ; limit 0xFFFFF
 290     DW  0                               ; base 0
 291     DB  0
 292     DB  093h                            ; present, ring 0, data, expand-up, not-writable
 293     DB  0CFh                            ; page-granular, 32-bit
 294     DB  0
 295
 296 ;
 297 ; System code segment descriptor
 298 ;
 299 SYS_CODE_SEL        EQU $ - GDT_BASE    ; Selector [0x20]
 300     DW  0FFFFh                          ; limit 0xFFFFF
 301     DW  0                               ; base 0
 302     DB  0
 303     DB  09Ah                            ; present, ring 0, data, expand-up, writable
 304     DB  0CFh                            ; page-granular, 32-bit
 305     DB  0
 306 ;
 307 ; Spare segment descriptor
 308 ;
 309 SYS16_CODE_SEL      EQU $ - GDT_BASE    ; Selector [0x28]
 310     DW  0FFFFh                          ; limit 0xFFFFF
 311     DW  0                               ; base 0
 312     DB  0Eh                             ; Changed from F000 to E000.
 313     DB  09Bh                            ; present, ring 0, code, expand-up, writable
 314     DB  00h                             ; byte-granular, 16-bit
 315     DB  0
 316 ;
 317 ; Spare segment descriptor
 318 ;
 319 SYS16_DATA_SEL      EQU $ - GDT_BASE    ; Selector [0x30]
 320     DW  0FFFFh                          ; limit 0xFFFF
 321     DW  0                               ; base 0
 322     DB  0
 323     DB  093h                            ; present, ring 0, data, expand-up, not-writable
 324     DB  00h                             ; byte-granular, 16-bit
 325     DB  0
 326
 327 ;
 328 ; Spare segment descriptor
 329 ;
 330 SPARE5_SEL          EQU $ - GDT_BASE    ; Selector [0x38]
 331     DW  0                               ; limit 0
 332     DW  0                               ; base 0
 333     DB  0
 334     DB  0                               ; present, ring 0, data, expand-up, writable
 335     DB  0                               ; page-granular, 32-bit
 336     DB  0
 337 GDT_SIZE            EQU $ - BootGdtTable    ; Size, in bytes
 338
 339 ;
 340 ; GDT Descriptor
 341 ;
 342 GdtDesc:                                ; GDT descriptor
 343     DW  GDT_SIZE - 1                    ; GDT limit
 344     DD  OFFSET BootGdtTable             ; GDT base address
 345
 346
 347 ProtectedModeEntryLinearAddress   LABEL   FWORD
 348 ProtectedModeEntryLinearOffset    LABEL   DWORD
 349   DD      OFFSET ProtectedModeEntryPoint  ; Offset of our 32 bit code
 350   DW      LINEAR_CODE_SEL
 351
 352 _TEXT_PROTECTED_MODE    ENDS
 353 END