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[mirror_edk2.git] / IntelFspPkg / Library / BaseCacheLib / CacheLibInternal.h
1 /** @file
2
3 Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
4 This program and the accompanying materials
5 are licensed and made available under the terms and conditions of the BSD License
6 which accompanies this distribution. The full text of the license may be found at
7 http://opensource.org/licenses/bsd-license.php.
8
9 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11
12 **/
13
14 #ifndef _CACHE_LIB_INTERNAL_H_
15 #define _CACHE_LIB_INTERNAL_H_
16
17 #define EFI_MSR_CACHE_VARIABLE_MTRR_BASE 0x00000200
18 #define EFI_MSR_CACHE_VARIABLE_MTRR_END 0x0000020F
19 #define V_EFI_FIXED_MTRR_NUMBER 11
20
21 #define EFI_MSR_IA32_MTRR_FIX64K_00000 0x00000250
22 #define EFI_MSR_IA32_MTRR_FIX16K_80000 0x00000258
23 #define EFI_MSR_IA32_MTRR_FIX16K_A0000 0x00000259
24 #define EFI_MSR_IA32_MTRR_FIX4K_C0000 0x00000268
25 #define EFI_MSR_IA32_MTRR_FIX4K_C8000 0x00000269
26 #define EFI_MSR_IA32_MTRR_FIX4K_D0000 0x0000026A
27 #define EFI_MSR_IA32_MTRR_FIX4K_D8000 0x0000026B
28 #define EFI_MSR_IA32_MTRR_FIX4K_E0000 0x0000026C
29 #define EFI_MSR_IA32_MTRR_FIX4K_E8000 0x0000026D
30 #define EFI_MSR_IA32_MTRR_FIX4K_F0000 0x0000026E
31 #define EFI_MSR_IA32_MTRR_FIX4K_F8000 0x0000026F
32 #define EFI_MSR_CACHE_IA32_MTRR_DEF_TYPE 0x000002FF
33 #define B_EFI_MSR_CACHE_MTRR_VALID BIT11
34 #define B_EFI_MSR_GLOBAL_MTRR_ENABLE BIT11
35 #define B_EFI_MSR_FIXED_MTRR_ENABLE BIT10
36 #define B_EFI_MSR_CACHE_MEMORY_TYPE (BIT2 | BIT1 | BIT0)
37
38 #define EFI_MSR_VALID_MASK 0xFFFFFFFFF
39 #define EFI_CACHE_VALID_ADDRESS 0xFFFFFF000
40 #define EFI_SMRR_CACHE_VALID_ADDRESS 0xFFFFF000
41 #define EFI_CACHE_VALID_EXTENDED_ADDRESS 0xFFFFFFFFFF000
42
43 // Leave one MTRR pairs for OS use
44 #define EFI_CACHE_NUM_VAR_MTRR_PAIRS_FOR_OS 1
45 #define EFI_CACHE_LAST_VARIABLE_MTRR_FOR_BIOS (EFI_MSR_CACHE_VARIABLE_MTRR_END) - \
46 (EFI_CACHE_NUM_VAR_MTRR_PAIRS_FOR_OS * 2)
47
48 #define EFI_MSR_IA32_MTRR_CAP 0x000000FE
49 #define B_EFI_MSR_IA32_MTRR_CAP_EMRR_SUPPORT BIT12
50 #define B_EFI_MSR_IA32_MTRR_CAP_SMRR_SUPPORT BIT11
51 #define B_EFI_MSR_IA32_MTRR_CAP_WC_SUPPORT BIT10
52 #define B_EFI_MSR_IA32_MTRR_CAP_FIXED_SUPPORT BIT8
53 #define B_EFI_MSR_IA32_MTRR_CAP_VARIABLE_SUPPORT (BIT7 | BIT6 | BIT5 | BIT4 | BIT3 | BIT2 | BIT1 | BIT0)
54
55 #define CPUID_VIR_PHY_ADDRESS_SIZE 0x80000008
56 #define CPUID_EXTENDED_FUNCTION 0x80000000
57
58 #endif
59