1 #------------------------------------------------------------------------------
3 # Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
4 # This program and the accompanying materials
5 # are licensed and made available under the terms and conditions of the BSD License
6 # which accompanies this distribution. The full text of the license may be found at
7 # http://opensource.org/licenses/bsd-license.php.
9 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 # This is the code that goes from real-mode to protected mode.
19 # It consumes the reset vector, calls TempRamInit API from FSP binary.
21 #------------------------------------------------------------------------------
25 ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspBase)
26 ASM_GLOBAL ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspSize)
28 ASM_GLOBAL ASM_PFX(_TEXT_REALMODE)
29 ASM_PFX(_TEXT_REALMODE):
30 #----------------------------------------------------------------------------
32 # Procedure: _ModuleEntryPoint
38 # Destroys: Assume all registers
42 # Transition to non-paged flat-model protected mode from a
43 # hard-coded GDT that provides exactly two descriptors.
44 # This is a bare bones transition to protected mode only
45 # used for a while in PEI and possibly DXE.
47 # After enabling protected mode, a far jump is executed to
48 # transfer to PEI using the newly loaded GDT.
54 # MM5 = Save time-stamp counter value high32bit
55 # MM6 = Save time-stamp counter value low32bit.
57 #----------------------------------------------------------------------------
60 ASM_GLOBAL ASM_PFX(_ModuleEntryPoint)
61 ASM_PFX(_ModuleEntryPoint):
62 fninit # clear any pending Floating point exceptions
64 # Store the BIST value in mm0
69 # Save time-stamp counter value
70 # rdtsc load 64bit time-stamp counter to EDX:EAX
77 # Load the GDT table in GdtDesc
84 # Transition to 16 bit protected mode
86 movl %cr0, %eax # Get control register 0
87 orl $0x00000003, %eax # Set PE bit (bit #0) & MP bit (bit #1)
88 movl %eax, %cr0 # Activate protected mode
90 movl %cr4, %eax # Get control register 4
91 orl $0x00000600, %eax # Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)
95 # Now we're in 16 bit protected mode
96 # Set up the selectors for 32 bit protected mode entry
98 movw SYS_DATA_SEL, %ax
106 # Transition to Flat 32 bit protected mode
107 # The jump to a far pointer causes the transition to 32 bit mode
109 movl ASM_PFX(ProtectedModeEntryLinearAddress), %esi
112 ASM_GLOBAL ASM_PFX(_TEXT_PROTECTED_MODE)
113 ASM_PFX(_TEXT_PROTECTED_MODE):
115 #----------------------------------------------------------------------------
117 # Procedure: ProtectedModeEntryPoint
123 # Destroys: Assume all registers
127 # This function handles:
128 # Call two basic APIs from FSP binary
129 # Initializes stack with some early data (BIST, PEI entry, etc)
133 #----------------------------------------------------------------------------
136 ASM_GLOBAL ASM_PFX(ProtectedModeEntryPoint)
137 ASM_PFX(ProtectedModeEntryPoint):
139 # Find the fsp info header
140 movl ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspBase), %edi
141 movl ASM_PFX(_gPcd_FixedAtBuild_PcdFlashFvFspSize), %ecx
143 movl FVH_SIGINATURE_OFFSET(%edi), %eax
144 cmp $FVH_SIGINATURE_VALID_VALUE, %eax
145 jnz FspHeaderNotFound
148 movw FVH_EXTHEADER_OFFSET_OFFSET(%edi), %ax
150 jnz FspFvExtHeaderExist
153 movw FVH_HEADER_LENGTH_OFFSET(%edi), %ax # Bypass Fv Header
155 jmp FspCheckFfsHeader
159 movl FVH_EXTHEADER_SIZE_OFFSET(%edi), %eax # Bypass Ext Fv Header
162 # Round up to 8 byte alignment
167 and $0xFFFFFFF8, %edi
173 cmp $FSP_HEADER_GUID_DWORD1, %eax
174 jnz FspHeaderNotFound
177 cmp $FSP_HEADER_GUID_DWORD2, %eax
178 jnz FspHeaderNotFound
180 movl 0x08(%edi), %eax
181 cmp $FSP_HEADER_GUID_DWORD3, %eax
182 jnz FspHeaderNotFound
184 movl 0x0c(%edi), %eax
185 cmp $FSP_HEADER_GUID_DWORD4, %eax
186 jnz FspHeaderNotFound
188 add $FFS_HEADER_SIZE_VALUE, %edi # Bypass the ffs header
190 # Check the section type as raw section
191 movb SECTION_HEADER_TYPE_OFFSET(%edi), %al
193 jnz FspHeaderNotFound
195 addl $RAW_SECTION_HEADER_SIZE_VALUE, %edi # Bypass the section header
202 # Get the fsp TempRamInit Api address
203 movl FSP_HEADER_IMAGEBASE_OFFSET(%edi), %eax
204 addl FSP_HEADER_TEMPRAMINIT_OFFSET(%edi), %eax
206 # Setup the hardcode stack
207 movl $TempRamInitStack, %esp
209 # Call the fsp TempRamInit Api
216 # ECX: start of range
221 pushl %eax # zero - no hob list yet
222 call ASM_PFX(CallPeiCoreEntryPoint)
229 .long TempRamInitDone
230 .long ASM_PFX(TempRamInitParams)
233 # ROM-based Global-Descriptor Table for the Tiano PEI Phase
238 # GDT[0]: 0x00: Null entry, never used.
240 .equ NULL_SEL, . - GDT_BASE # Selector [0]
242 BootGdtTable: .long 0
245 # Linear data segment descriptor
247 .equ LINEAR_SEL, . - GDT_BASE # Selector [0x8]
248 .word 0xFFFF # limit 0xFFFFF
251 .byte 0x92 # present, ring 0, data, expand-up, writable
252 .byte 0xCF # page-granular, 32-bit
255 # Linear code segment descriptor
257 .equ LINEAR_CODE_SEL, . - GDT_BASE # Selector [0x10]
258 .word 0xFFFF # limit 0xFFFFF
261 .byte 0x9B # present, ring 0, data, expand-up, not-writable
262 .byte 0xCF # page-granular, 32-bit
265 # System data segment descriptor
267 .equ SYS_DATA_SEL, . - GDT_BASE # Selector [0x18]
268 .word 0xFFFF # limit 0xFFFFF
271 .byte 0x93 # present, ring 0, data, expand-up, not-writable
272 .byte 0xCF # page-granular, 32-bit
276 # System code segment descriptor
278 .equ SYS_CODE_SEL, . - GDT_BASE # Selector [0x20]
279 .word 0xFFFF # limit 0xFFFFF
282 .byte 0x9A # present, ring 0, data, expand-up, writable
283 .byte 0xCF # page-granular, 32-bit
286 # Spare segment descriptor
288 .equ SYS16_CODE_SEL, . - GDT_BASE # Selector [0x28]
289 .word 0xFFFF # limit 0xFFFFF
291 .byte 0x0E # Changed from F000 to E000.
292 .byte 0x9B # present, ring 0, code, expand-up, writable
293 .byte 0x00 # byte-granular, 16-bit
296 # Spare segment descriptor
298 .equ SYS16_DATA_SEL, . - GDT_BASE # Selector [0x30]
299 .word 0xFFFF # limit 0xFFFF
302 .byte 0x93 # present, ring 0, data, expand-up, not-writable
303 .byte 0x00 # byte-granular, 16-bit
307 # Spare segment descriptor
309 .equ SPARE5_SEL, . - GDT_BASE # Selector [0x38]
313 .byte 0 # present, ring 0, data, expand-up, writable
314 .byte 0 # page-granular, 32-bit
316 .equ GDT_SIZE, . - BootGdtTable # Size, in bytes
321 GdtDesc: # GDT descriptor
322 .word GDT_SIZE - 1 # GDT limit
323 .long BootGdtTable # GDT base address
325 ASM_PFX(ProtectedModeEntryLinearAddress):
326 ProtectedModeEntryLinearOffset:
327 .long ASM_PFX(ProtectedModeEntryPoint) # Offset of our 32 bit code
328 .word LINEAR_CODE_SEL