1 #------------------------------------------------------------------------------
3 # Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>
4 # This program and the accompanying materials
5 # are licensed and made available under the terms and conditions of the BSD License
6 # which accompanies this distribution. The full text of the license may be found at
7 # http://opensource.org/licenses/bsd-license.php.
9 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
18 # This is the code that goes from real-mode to protected mode.
19 # It consumes the reset vector, calls TempRamInit API from FSP binary.
21 #------------------------------------------------------------------------------
25 ASM_GLOBAL ASM_PFX(_TEXT_REALMODE)
26 ASM_PFX(_TEXT_REALMODE):
27 #----------------------------------------------------------------------------
29 # Procedure: _ModuleEntryPoint
35 # Destroys: Assume all registers
39 # Transition to non-paged flat-model protected mode from a
40 # hard-coded GDT that provides exactly two descriptors.
41 # This is a bare bones transition to protected mode only
42 # used for a while in PEI and possibly DXE.
44 # After enabling protected mode, a far jump is executed to
45 # transfer to PEI using the newly loaded GDT.
51 # MM5 = Save time-stamp counter value high32bit
52 # MM6 = Save time-stamp counter value low32bit.
54 #----------------------------------------------------------------------------
57 ASM_GLOBAL ASM_PFX(_ModuleEntryPoint)
58 ASM_PFX(_ModuleEntryPoint):
59 fninit # clear any pending Floating point exceptions
61 # Store the BIST value in mm0
66 # Save time-stamp counter value
67 # rdtsc load 64bit time-stamp counter to EDX:EAX
74 # Load the GDT table in GdtDesc
81 # Transition to 16 bit protected mode
83 movl %cr0, %eax # Get control register 0
84 orl $0x00000003, %eax # Set PE bit (bit #0) & MP bit (bit #1)
85 movl %eax, %cr0 # Activate protected mode
87 movl %cr4, %eax # Get control register 4
88 orl $0x00000600, %eax # Set OSFXSR bit (bit #9) & OSXMMEXCPT bit (bit #10)
92 # Now we're in 16 bit protected mode
93 # Set up the selectors for 32 bit protected mode entry
95 movw SYS_DATA_SEL, %ax
103 # Transition to Flat 32 bit protected mode
104 # The jump to a far pointer causes the transition to 32 bit mode
106 movl $ProtectedModeEntryLinearAddress, %esi
109 ASM_GLOBAL ASM_PFX(_TEXT_PROTECTED_MODE)
110 ASM_PFX(_TEXT_PROTECTED_MODE):
112 #----------------------------------------------------------------------------
114 # Procedure: ProtectedModeEntryPoint
120 # Destroys: Assume all registers
124 # This function handles:
125 # Call two basic APIs from FSP binary
126 # Initializes stack with some early data (BIST, PEI entry, etc)
130 #----------------------------------------------------------------------------
133 ASM_GLOBAL ASM_PFX(ProtectedModeEntryPoint)
134 ASM_PFX(ProtectedModeEntryPoint):
136 # Find the fsp info header
137 movl PcdGet32 (PcdFlashFvFspBase), %edi
138 movl PcdGet32 (PcdFlashFvFspSize), %ecx
140 movl FVH_SIGINATURE_OFFSET(%edi), %eax
141 cmp $FVH_SIGINATURE_VALID_VALUE, %eax
142 jnz FspHeaderNotFound
145 movw FVH_EXTHEADER_OFFSET_OFFSET(%edi), %ax
147 jnz FspFvExtHeaderExist
150 movw FVH_HEADER_LENGTH_OFFSET(%edi), %ax # Bypass Fv Header
152 jmp FspCheckFfsHeader
156 movl FVH_EXTHEADER_SIZE_OFFSET(%edi), %eax # Bypass Ext Fv Header
159 # Round up to 8 byte alignment
164 and $0xFFFFFFF8, %edi
170 cmp $FSP_HEADER_GUID_DWORD1, %eax
171 jnz FspHeaderNotFound
174 cmp $FSP_HEADER_GUID_DWORD2, %eax
175 jnz FspHeaderNotFound
177 movl 0x08(%edi), %eax
178 cmp $FSP_HEADER_GUID_DWORD3, %eax
179 jnz FspHeaderNotFound
181 movl 0x0c(%edi), %eax
182 cmp $FSP_HEADER_GUID_DWORD4, %eax
183 jnz FspHeaderNotFound
185 add $FFS_HEADER_SIZE_VALUE, %edi # Bypass the ffs header
187 # Check the section type as raw section
188 movb SECTION_HEADER_TYPE_OFFSET(%edi), %al
190 jnz FspHeaderNotFound
192 addl $RAW_SECTION_HEADER_SIZE_VALUE, %edi # Bypass the section header
199 # Get the fsp TempRamInit Api address
200 movl FSP_HEADER_IMAGEBASE_OFFSET(%edi), %eax
201 addl FSP_HEADER_TEMPRAMINIT_OFFSET(%edi), %eax
203 # Setup the hardcode stack
204 movl $TempRamInitStack, %esp
206 # Call the fsp TempRamInit Api
213 # ECX: start of range
218 pushl %eax # zero - no hob list yet
219 call ASM_PFX(CallPeiCoreEntryPoint)
226 .long TempRamInitDone
227 .long TempRamInitParams
230 # ROM-based Global-Descriptor Table for the Tiano PEI Phase
235 # GDT[0]: 0x00: Null entry, never used.
237 .equ NULL_SEL, . - GDT_BASE # Selector [0]
239 BootGdtTable: .long 0
242 # Linear data segment descriptor
244 .equ LINEAR_SEL, . - GDT_BASE # Selector [0x8]
245 .word 0xFFFF # limit 0xFFFFF
248 .byte 0x92 # present, ring 0, data, expand-up, writable
249 .byte 0xCF # page-granular, 32-bit
252 # Linear code segment descriptor
254 .equ LINEAR_CODE_SEL, . - GDT_BASE # Selector [0x10]
255 .word 0xFFFF # limit 0xFFFFF
258 .byte 0x9B # present, ring 0, data, expand-up, not-writable
259 .byte 0xCF # page-granular, 32-bit
262 # System data segment descriptor
264 .equ SYS_DATA_SEL, . - GDT_BASE # Selector [0x18]
265 .word 0xFFFF # limit 0xFFFFF
268 .byte 0x93 # present, ring 0, data, expand-up, not-writable
269 .byte 0xCF # page-granular, 32-bit
273 # System code segment descriptor
275 .equ SYS_CODE_SEL, . - GDT_BASE # Selector [0x20]
276 .word 0xFFFF # limit 0xFFFFF
279 .byte 0x9A # present, ring 0, data, expand-up, writable
280 .byte 0xCF # page-granular, 32-bit
283 # Spare segment descriptor
285 .equ SYS16_CODE_SEL, . - GDT_BASE # Selector [0x28]
286 .word 0xFFFF # limit 0xFFFFF
288 .byte 0x0E # Changed from F000 to E000.
289 .byte 0x9B # present, ring 0, code, expand-up, writable
290 .byte 0x00 # byte-granular, 16-bit
293 # Spare segment descriptor
295 .equ SYS16_DATA_SEL, . - GDT_BASE # Selector [0x30]
296 .word 0xFFFF # limit 0xFFFF
299 .byte 0x93 # present, ring 0, data, expand-up, not-writable
300 .byte 0x00 # byte-granular, 16-bit
304 # Spare segment descriptor
306 .equ SPARE5_SEL, . - GDT_BASE # Selector [0x38]
310 .byte 0 # present, ring 0, data, expand-up, writable
311 .byte 0 # page-granular, 32-bit
313 .equ GDT_SIZE, . - BootGdtTable # Size, in bytes
318 GdtDesc: # GDT descriptor
319 .word GDT_SIZE - 1 # GDT limit
320 .long BootGdtTable # GDT base address
322 ASM_PFX(ProtectedModeEntryLinearAddress):
323 ProtectedModeEntryLinearOffset:
324 .long ProtectedModeEntryPoint # Offset of our 32 bit code
325 .word LINEAR_CODE_SEL