IntelSiliconPkg/Include/IndustryStandard/IgdOpRegion.h

   1 /** @file
   2   IGD OpRegion definition from Intel Integrated Graphics Device OpRegion
   3   Specification.
   4
   5   https://01.org/sites/default/files/documentation/acpi_igd_opregion_spec_0.pdf
   6
   7   There are some mismatch between the specification and the implementation.
   8   The definition follows the latest implementation.
   9   1) INTEL_IGD_OPREGION_HEADER.RSV1[0xA0]
  10   2) INTEL_IGD_OPREGION_MBOX1.RSV3[0x3C]
  11   3) INTEL_IGD_OPREGION_MBOX3.RSV5[0x62]
  12   4) INTEL_IGD_OPREGION_VBT.RVBT[0x1800] Size is 6KB
  13
  14   Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
  15   This program and the accompanying materials
  16   are licensed and made available under the terms and conditions of the BSD License
  17   which accompanies this distribution.  The full text of the license may be found at
  18   http://opensource.org/licenses/bsd-license.php
  19
  20   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  21   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  22
  23 **/
  24 #ifndef _IGD_OPREGION_H_
  25 #define _IGD_OPREGION_H_
  26
  27 /**
  28   OpRegion structures:
  29   Sub-structures define the different parts of the OpRegion followed by the
  30   main structure representing the entire OpRegion.
  31
  32   @note: These structures are packed to 1 byte offsets because the exact
  33   data location is required by the supporting design specification due to
  34   the fact that the data is used by ASL and Graphics driver code compiled
  35   separately.
  36 **/
  37 #pragma pack(1)
  38 ///
  39 /// OpRegion Mailbox 0 Header structure. The OpRegion Header is used to
  40 /// identify a block of memory as the graphics driver OpRegion.
  41 /// Offset 0x0, Size 0x100
  42 ///
  43 typedef struct {
  44   CHAR8  SIGN[0x10];    ///< Offset 0x00 OpRegion Signature
  45   UINT32 SIZE;          ///< Offset 0x10 OpRegion Size
  46   UINT32 OVER;          ///< Offset 0x14 OpRegion Structure Version
  47   UINT8  SVER[0x20];    ///< Offset 0x18 System BIOS Build Version
  48   UINT8  VVER[0x10];    ///< Offset 0x38 Video BIOS Build Version
  49   UINT8  GVER[0x10];    ///< Offset 0x48 Graphic Driver Build Version
  50   UINT32 MBOX;          ///< Offset 0x58 Supported Mailboxes
  51   UINT32 DMOD;          ///< Offset 0x5C Driver Model
  52   UINT8  RSV1[0xA0];    ///< Offset 0x60 Reserved
  53 } IGD_OPREGION_HEADER;
  54
  55 ///
  56 /// OpRegion Mailbox 1 - Public ACPI Methods
  57 /// Offset 0x100, Size 0x100
  58 ///
  59 typedef struct {
  60   UINT32 DRDY;          ///< Offset 0x100 Driver Readiness
  61   UINT32 CSTS;          ///< Offset 0x104 Status
  62   UINT32 CEVT;          ///< Offset 0x108 Current Event
  63   UINT8  RSVD[0x14];    ///< Offset 0x10C Reserved Must be Zero
  64   UINT32 DIDL[8];       ///< Offset 0x120 Supported Display Devices ID List
  65   UINT32 CPDL[8];       ///< Offset 0x140 Currently Attached Display Devices List
  66   UINT32 CADL[8];       ///< Offset 0x160 Currently Active Display Devices List
  67   UINT32 NADL[8];       ///< Offset 0x180 Next Active Devices List
  68   UINT32 ASLP;          ///< Offset 0x1A0 ASL Sleep Time Out
  69   UINT32 TIDX;          ///< Offset 0x1A4 Toggle Table Index
  70   UINT32 CHPD;          ///< Offset 0x1A8 Current Hotplug Enable Indicator
  71   UINT32 CLID;          ///< Offset 0x1AC Current Lid State Indicator
  72   UINT32 CDCK;          ///< Offset 0x1B0 Current Docking State Indicator
  73   UINT32 SXSW;          ///< Offset 0x1B4 Display Switch Notification on Sx State Resume
  74   UINT32 EVTS;          ///< Offset 0x1B8 Events supported by ASL
  75   UINT32 CNOT;          ///< Offset 0x1BC Current OS Notification
  76   UINT32 NRDY;          ///< Offset 0x1C0 Driver Status
  77   UINT8  RSV3[0x3C];    ///< Offset 0x1C4 - 0x1FF Reserved
  78 } IGD_OPREGION_MBOX1;
  79
  80 ///
  81 /// OpRegion Mailbox 2 - Software SCI Interface
  82 /// Offset 0x200, Size 0x100
  83 ///
  84 typedef struct {
  85   UINT32 SCIC;          ///< Offset 0x200 Software SCI Command / Status / Data
  86   UINT32 PARM;          ///< Offset 0x204 Software SCI Parameters
  87   UINT32 DSLP;          ///< Offset 0x208 Driver Sleep Time Out
  88   UINT8  RSV4[0xF4];    ///< Offset 0x20C - 0x2FF Reserved
  89 } IGD_OPREGION_MBOX2;
  90
  91 ///
  92 /// OpRegion Mailbox 3 - BIOS/Driver Notification - ASLE Support
  93 /// Offset 0x300, Size 0x100
  94 ///
  95 typedef struct {
  96   UINT32 ARDY;          ///< Offset 0x300 Driver Readiness
  97   UINT32 ASLC;          ///< Offset 0x304 ASLE Interrupt Command / Status
  98   UINT32 TCHE;          ///< Offset 0x308 Technology Enabled Indicator
  99   UINT32 ALSI;          ///< Offset 0x30C Current ALS Luminance Reading
 100   UINT32 BCLP;          ///< Offset 0x310 Requested Backlight Brightness
 101   UINT32 PFIT;          ///< Offset 0x314 Panel Fitting State or Request
 102   UINT32 CBLV;          ///< Offset 0x318 Current Brightness Level
 103   UINT16 BCLM[0x14];    ///< Offset 0x31C Backlight Brightness Levels Duty Cycle Mapping Table
 104   UINT32 CPFM;          ///< Offset 0x344 Current Panel Fitting Mode
 105   UINT32 EPFM;          ///< Offset 0x348 Enabled Panel Fitting Modes
 106   UINT8  PLUT[0x4A];    ///< Offset 0x34C Panel Look Up Table & Identifier
 107   UINT32 PFMB;          ///< Offset 0x396 PWM Frequency and Minimum Brightness
 108   UINT32 CCDV;          ///< Offset 0x39A Color Correction Default Values
 109   UINT8  RSV5[0x62];    ///< Offset 0x39E - 0x3FF  Reserved
 110 } IGD_OPREGION_MBOX3;
 111
 112 ///
 113 /// OpRegion Mailbox 4 - VBT Video BIOS Table
 114 /// Offset 0x400, Size 0x1800
 115 ///
 116 typedef struct {
 117   UINT8  RVBT[0x1800];  ///< Offset 0x400 - 0x1BFF Raw VBT Data
 118 } IGD_OPREGION_MBOX4;
 119
 120 ///
 121 /// IGD OpRegion Structure
 122 ///
 123 typedef struct {
 124   IGD_OPREGION_HEADER Header; ///< OpRegion header (Offset 0x0, Size 0x100)
 125   IGD_OPREGION_MBOX1  MBox1;  ///< Mailbox 1: Public ACPI Methods (Offset 0x100, Size 0x100)
 126   IGD_OPREGION_MBOX2  MBox2;  ///< Mailbox 2: Software SCI Interface (Offset 0x200, Size 0x100)
 127   IGD_OPREGION_MBOX3  MBox3;  ///< Mailbox 3: BIOS to Driver Notification (Offset 0x300, Size 0x100)
 128   IGD_OPREGION_MBOX4  MBox4;  ///< Mailbox 4: Video BIOS Table (VBT) (Offset 0x400, Size 0x1800)
 129 } IGD_OPREGION_STRUCTURE;
 130 #pragma pack()
 131
 132 #endif