IntelSiliconPkg/Include/IndustryStandard/Vtd.h

   1 /** @file
   2   The definition for VTD register.
   3   It is defined in "Intel VT for Direct IO Architecture Specification".
   4
   5   Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
   6   This program and the accompanying materials
   7   are licensed and made available under the terms and conditions of the BSD License
   8   which accompanies this distribution.  The full text of the license may be found at
   9   http://opensource.org/licenses/bsd-license.php.
  10
  11   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14 **/
  15
  16 #ifndef __VTD_REG_H__
  17 #define __VTD_REG_H__
  18
  19 #pragma pack(1)
  20
  21 //
  22 // Translation Structure Formats
  23 //
  24 #define VTD_ROOT_ENTRY_NUMBER       256
  25 #define VTD_CONTEXT_ENTRY_NUMBER    256
  26
  27 typedef union {
  28   struct {
  29     UINT64  Present:1;
  30     UINT64  Reserved_1:11;
  31     UINT64  ContextTablePointer:52;
  32
  33     UINT64  Reserved_64;
  34   } Bits;
  35   struct {
  36     UINT64  Uint64Lo;
  37     UINT64  Uint64Hi;
  38   } Uint128;
  39 } VTD_ROOT_ENTRY;
  40
  41 typedef union {
  42   struct {
  43     UINT64  LowerPresent:1;
  44     UINT64  Reserved_1:11;
  45     UINT64  LowerContextTablePointer:52;
  46
  47     UINT64  UpperPresent:1;
  48     UINT64  Reserved_65:11;
  49     UINT64  UpperContextTablePointer:52;
  50   } Bits;
  51   struct {
  52     UINT64  Uint64Lo;
  53     UINT64  Uint64Hi;
  54   } Uint128;
  55 } VTD_EXT_ROOT_ENTRY;
  56
  57 typedef union {
  58   struct {
  59     UINT64  Present:1;
  60     UINT64  FaultProcessingDisable:1;
  61     UINT64  TranslationType:2;
  62     UINT64  Reserved_4:8;
  63     UINT64  SecondLevelPageTranslationPointer:52;
  64
  65     UINT64  AddressWidth:3;
  66     UINT64  Ignored_67:4;
  67     UINT64  Reserved_71:1;
  68     UINT64  DomainIdentifier:16;
  69     UINT64  Reserved_88:40;
  70   } Bits;
  71   struct {
  72     UINT64  Uint64Lo;
  73     UINT64  Uint64Hi;
  74   } Uint128;
  75 } VTD_CONTEXT_ENTRY;
  76
  77 typedef union {
  78   struct {
  79     UINT64  Present:1;
  80     UINT64  FaultProcessingDisable:1;
  81     UINT64  TranslationType:3;
  82     UINT64  ExtendedMemoryType:3;
  83     UINT64  DeferredInvalidateEnable:1;
  84     UINT64  PageRequestEnable:1;
  85     UINT64  NestedTranslationEnable:1;
  86     UINT64  PASIDEnable:1;
  87     UINT64  SecondLevelPageTranslationPointer:52;
  88
  89     UINT64  AddressWidth:3;
  90     UINT64  PageGlobalEnable:1;
  91     UINT64  NoExecuteEnable:1;
  92     UINT64  WriteProtectEnable:1;
  93     UINT64  CacheDisable:1;
  94     UINT64  ExtendedMemoryTypeEnable:1;
  95     UINT64  DomainIdentifier:16;
  96     UINT64  SupervisorModeExecuteProtection:1;
  97     UINT64  ExtendedAccessedFlagEnable:1;
  98     UINT64  ExecuteRequestsEnable:1;
  99     UINT64  SecondLevelExecuteEnable:1;
 100     UINT64  Reserved_92:4;
 101     UINT64  PageAttributeTable0:3;
 102     UINT64  Reserved_Pat0:1;
 103     UINT64  PageAttributeTable1:3;
 104     UINT64  Reserved_Pat1:1;
 105     UINT64  PageAttributeTable2:3;
 106     UINT64  Reserved_Pat2:1;
 107     UINT64  PageAttributeTable3:3;
 108     UINT64  Reserved_Pat3:1;
 109     UINT64  PageAttributeTable4:3;
 110     UINT64  Reserved_Pat4:1;
 111     UINT64  PageAttributeTable5:3;
 112     UINT64  Reserved_Pat5:1;
 113     UINT64  PageAttributeTable6:3;
 114     UINT64  Reserved_Pat6:1;
 115     UINT64  PageAttributeTable7:3;
 116     UINT64  Reserved_Pat7:1;
 117
 118     UINT64  PASIDTableSize:4;
 119     UINT64  Reserved_132:8;
 120     UINT64  PASIDTablePointer:52;
 121
 122     UINT64  Reserved_192:12;
 123     UINT64  PASIDStateTablePointer:52;
 124   } Bits;
 125   struct {
 126     UINT64  Uint64_1;
 127     UINT64  Uint64_2;
 128     UINT64  Uint64_3;
 129     UINT64  Uint64_4;
 130   } Uint256;
 131 } VTD_EXT_CONTEXT_ENTRY;
 132
 133 typedef union {
 134   struct {
 135     UINT64  Present:1;
 136     UINT64  Reserved_1:2;
 137     UINT64  PageLevelCacheDisable:1;
 138     UINT64  PageLevelWriteThrough:1;
 139     UINT64  Reserved_5:6;
 140     UINT64  SupervisorRequestsEnable:1;
 141     UINT64  FirstLevelPageTranslationPointer:52;
 142   } Bits;
 143   UINT64    Uint64;
 144 } VTD_PASID_ENTRY;
 145
 146 typedef union {
 147   struct {
 148     UINT64  Reserved_0:32;
 149     UINT64  ActiveReferenceCount:16;
 150     UINT64  Reserved_48:15;
 151     UINT64  DeferredInvalidate:1;
 152   } Bits;
 153   UINT64    Uint64;
 154 } VTD_PASID_STATE_ENTRY;
 155
 156 typedef union {
 157   struct {
 158     UINT64  Present:1;
 159     UINT64  ReadWrite:1;
 160     UINT64  UserSupervisor:1;
 161     UINT64  PageLevelWriteThrough:1;
 162     UINT64  PageLevelCacheDisable:1;
 163     UINT64  Accessed:1;
 164     UINT64  Dirty:1;
 165     UINT64  PageSize:1; // It is PageAttribute:1 for 4K page entry
 166     UINT64  Global:1;
 167     UINT64  Ignored_9:1;
 168     UINT64  ExtendedAccessed:1;
 169     UINT64  Ignored_11:1;
 170     // NOTE: There is PageAttribute:1 as bit12 for 1G page entry and 2M page entry
 171     UINT64  Address:40;
 172     UINT64  Ignored_52:11;
 173     UINT64  ExecuteDisable:1;
 174   } Bits;
 175   UINT64    Uint64;
 176 } VTD_FIRST_LEVEL_PAGING_ENTRY;
 177
 178 typedef union {
 179   struct {
 180     UINT64  Read:1;
 181     UINT64  Write:1;
 182     UINT64  Execute:1;
 183     UINT64  ExtendedMemoryType:3;
 184     UINT64  IgnorePAT:1;
 185     UINT64  PageSize:1;
 186     UINT64  Ignored_8:3;
 187     UINT64  Snoop:1;
 188     UINT64  Address:40;
 189     UINT64  Ignored_52:10;
 190     UINT64  TransientMapping:1;
 191     UINT64  Ignored_63:1;
 192   } Bits;
 193   UINT64    Uint64;
 194 } VTD_SECOND_LEVEL_PAGING_ENTRY;
 195
 196 //
 197 // Register Descriptions
 198 //
 199 #define R_VER_REG        0x00
 200 #define R_CAP_REG        0x08
 201 #define   B_CAP_REG_RWBF       BIT4
 202 #define R_ECAP_REG       0x10
 203 #define R_GCMD_REG       0x18
 204 #define   B_GMCD_REG_WBF       BIT27
 205 #define   B_GMCD_REG_SRTP      BIT30
 206 #define   B_GMCD_REG_TE        BIT31
 207 #define R_GSTS_REG       0x1C
 208 #define   B_GSTS_REG_WBF       BIT27
 209 #define   B_GSTS_REG_RTPS      BIT30
 210 #define   B_GSTS_REG_TE        BIT31
 211 #define R_RTADDR_REG     0x20
 212 #define R_CCMD_REG       0x28
 213 #define   B_CCMD_REG_CIRG_MASK    (BIT62|BIT61)
 214 #define   V_CCMD_REG_CIRG_GLOBAL  BIT61
 215 #define   V_CCMD_REG_CIRG_DOMAIN  BIT62
 216 #define   V_CCMD_REG_CIRG_DEVICE  (BIT62|BIT61)
 217 #define   B_CCMD_REG_ICC          BIT63
 218 #define R_FSTS_REG       0x34
 219 #define R_FECTL_REG      0x38
 220 #define R_FEDATA_REG     0x3C
 221 #define R_FEADDR_REG     0x40
 222 #define R_FEUADDR_REG    0x44
 223 #define R_AFLOG_REG      0x58
 224
 225 #define R_IVA_REG        0x00 // + IRO
 226 #define   B_IVA_REG_AM_MASK       (BIT0|BIT1|BIT2|BIT3|BIT4|BIT5)
 227 #define   B_IVA_REG_AM_4K         0 // 1 page
 228 #define   B_IVA_REG_AM_2M         9 // 2M page
 229 #define   B_IVA_REG_IH            BIT6
 230 #define R_IOTLB_REG      0x08 // + IRO
 231 #define   B_IOTLB_REG_IIRG_MASK   (BIT61|BIT60)
 232 #define   V_IOTLB_REG_IIRG_GLOBAL BIT60
 233 #define   V_IOTLB_REG_IIRG_DOMAIN BIT61
 234 #define   V_IOTLB_REG_IIRG_PAGE   (BIT61|BIT60)
 235 #define   B_IOTLB_REG_IVT         BIT63
 236
 237 #define R_FRCD_REG       0x00 // + FRO
 238
 239 typedef union {
 240   struct {
 241     UINT8         ND:3; // Number of domains supported
 242     UINT8         AFL:1; // Advanced Fault Logging
 243     UINT8         RWBF:1; // Required Write-Buffer Flushing
 244     UINT8         PLMR:1; // Protected Low-Memory Region
 245     UINT8         PHMR:1; // Protected High-Memory Region
 246     UINT8         CM:1; // Caching Mode
 247
 248     UINT8         SAGAW:5; // Supported Adjusted Guest Address Widths
 249     UINT8         Rsvd_13:3;
 250
 251     UINT8         MGAW:6; // Maximum Guest Address Width
 252     UINT8         ZLR:1; // Zero Length Read
 253     UINT8         Rsvd_23:1;
 254
 255     UINT16        FRO:10; // Fault-recording Register offset
 256     UINT16        SLLPS:4; // Second Level Large Page Support
 257     UINT16        Rsvd_38:1;
 258     UINT16        PSI:1; // Page Selective Invalidation
 259
 260     UINT8         NFR:8; // Number of Fault-recording Registers
 261
 262     UINT8         MAMV:6; // Maximum Address Mask Value
 263     UINT8         DWD:1; // Write Draining
 264     UINT8         DRD:1; // Read Draining
 265
 266     UINT8         FL1GP:1; // First Level 1-GByte Page Support
 267     UINT8         Rsvd_57:2;
 268     UINT8         PI:1; // Posted Interrupts Support
 269     UINT8         Rsvd_60:4;
 270   } Bits;
 271   UINT64     Uint64;
 272 } VTD_CAP_REG;
 273
 274 typedef union {
 275   struct {
 276     UINT8         C:1; // Page-walk Coherency
 277     UINT8         QI:1; // Queued Invalidation support
 278     UINT8         DT:1; // Device-TLB support
 279     UINT8         IR:1; // Interrupt Remapping support
 280     UINT8         EIM:1; // Extended Interrupt Mode
 281     UINT8         Rsvd_5:1;
 282     UINT8         PT:1; // Pass Through
 283     UINT8         SC:1; // Snoop Control
 284
 285     UINT16        IRO:10; // IOTLB Register Offset
 286     UINT16        Rsvd_18:2;
 287     UINT16        MHMV:4; // Maximum Handle Mask Value
 288
 289     UINT8         ECS:1; // Extended Context Support
 290     UINT8         MTS:1; // Memory Type Support
 291     UINT8         NEST:1; // Nested Translation Support
 292     UINT8         DIS:1; // Deferred Invalidate Support
 293     UINT8         PASID:1; // Process Address Space ID Support
 294     UINT8         PRS:1; // Page Request Support
 295     UINT8         ERS:1; // Execute Request Support
 296     UINT8         SRS:1; // Supervisor Request Support
 297
 298     UINT32        Rsvd_32:1;
 299     UINT32        NWFS:1; // No Write Flag Support
 300     UINT32        EAFS:1; // Extended Accessed Flag Support
 301     UINT32        PSS:5; // PASID Size Supported
 302
 303     UINT32        Rsvd_40:24;
 304   } Bits;
 305   UINT64     Uint64;
 306 } VTD_ECAP_REG;
 307
 308 typedef union {
 309   struct {
 310     UINT64   Rsvd_0:12;
 311     UINT64   FI:52;        // FaultInfo
 312
 313     UINT32   SID:16;       // Source Identifier
 314     UINT32   Rsvd_80:13;
 315     UINT32   PRIV:1;       // Privilege Mode Requested
 316     UINT32   EXE:1;        // Execute Permission Requested
 317     UINT32   PP:1;         // PASID Present
 318
 319     UINT32   FR:8;         // Fault Reason
 320     UINT32   PV:20;        // PASID Value
 321     UINT32   AT:2;         // Address Type
 322     UINT32   T:1;          // Type (0: Write, 1: Read)
 323     UINT32   F:1;          // Fault
 324   } Bits;
 325   UINT64     Uint64[2];
 326 } VTD_FRCD_REG;
 327
 328 typedef union {
 329   struct {
 330     UINT8    Function:3;
 331     UINT8    Device:5;
 332     UINT8    Bus;
 333   } Bits;
 334   struct {
 335     UINT8    ContextIndex;
 336     UINT8    RootIndex;
 337   } Index;
 338   UINT16     Uint16;
 339 } VTD_SOURCE_ID;
 340
 341 #pragma pack()
 342
 343 #endif
 344