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1 /** @file
2
3 Provides some data struct used by EHCI controller driver.
4
5 Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15
16 #ifndef _EFI_EHCI_H_
17 #define _EFI_EHCI_H_
18
19
20 #include <Uefi.h>
21
22 #include <Protocol/Usb2HostController.h>
23 #include <Protocol/PciIo.h>
24
25 #include <Guid/EventGroup.h>
26
27 #include <Library/DebugLib.h>
28 #include <Library/BaseMemoryLib.h>
29 #include <Library/UefiDriverEntryPoint.h>
30 #include <Library/UefiBootServicesTableLib.h>
31 #include <Library/UefiLib.h>
32 #include <Library/BaseLib.h>
33 #include <Library/MemoryAllocationLib.h>
34 #include <Library/PcdLib.h>
35 #include <Library/ReportStatusCodeLib.h>
36
37 #include <IndustryStandard/Pci.h>
38
39 typedef struct _USB2_HC_DEV USB2_HC_DEV;
40
41 #include "UsbHcMem.h"
42 #include "EhciReg.h"
43 #include "EhciUrb.h"
44 #include "EhciSched.h"
45 #include "EhciDebug.h"
46 #include "ComponentName.h"
47
48 //
49 // EHC timeout experience values
50 //
51
52 #define EHC_1_MICROSECOND 1
53 #define EHC_1_MILLISECOND (1000 * EHC_1_MICROSECOND)
54 #define EHC_1_SECOND (1000 * EHC_1_MILLISECOND)
55
56 //
57 // EHCI register operation timeout, set by experience
58 //
59 #define EHC_RESET_TIMEOUT (1 * EHC_1_SECOND)
60 #define EHC_GENERIC_TIMEOUT (10 * EHC_1_MILLISECOND)
61
62 //
63 // Wait for roothub port power stable, refers to Spec[EHCI1.0-2.3.9]
64 //
65 #define EHC_ROOT_PORT_RECOVERY_STALL (20 * EHC_1_MILLISECOND)
66
67 //
68 // Sync and Async transfer polling interval, set by experience,
69 // and the unit of Async is 100us, means 1ms as interval.
70 //
71 #define EHC_SYNC_POLL_INTERVAL (1 * EHC_1_MILLISECOND)
72 #define EHC_ASYNC_POLL_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)
73
74 //
75 // EHCI debug port control status register bit definition
76 //
77 #define USB_DEBUG_PORT_IN_USE BIT10
78 #define USB_DEBUG_PORT_ENABLE BIT28
79 #define USB_DEBUG_PORT_OWNER BIT30
80
81 //
82 // EHC raises TPL to TPL_NOTIFY to serialize all its operations
83 // to protect shared data structures.
84 //
85 #define EHC_TPL TPL_NOTIFY
86
87 //
88 //Iterate through the doule linked list. NOT delete safe
89 //
90 #define EFI_LIST_FOR_EACH(Entry, ListHead) \
91 for(Entry = (ListHead)->ForwardLink; Entry != (ListHead); Entry = Entry->ForwardLink)
92
93 //
94 //Iterate through the doule linked list. This is delete-safe.
95 //Don't touch NextEntry
96 //
97 #define EFI_LIST_FOR_EACH_SAFE(Entry, NextEntry, ListHead) \
98 for(Entry = (ListHead)->ForwardLink, NextEntry = Entry->ForwardLink;\
99 Entry != (ListHead); Entry = NextEntry, NextEntry = Entry->ForwardLink)
100
101 #define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field)
102
103
104 #define EHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
105 #define EHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
106 #define EHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
107
108 #define EHC_REG_BIT_IS_SET(Ehc, Offset, Bit) \
109 (EHC_BIT_IS_SET(EhcReadOpReg ((Ehc), (Offset)), (Bit)))
110
111 #define USB2_HC_DEV_SIGNATURE SIGNATURE_32 ('e', 'h', 'c', 'i')
112 #define EHC_FROM_THIS(a) CR(a, USB2_HC_DEV, Usb2Hc, USB2_HC_DEV_SIGNATURE)
113
114 struct _USB2_HC_DEV {
115 UINTN Signature;
116 EFI_USB2_HC_PROTOCOL Usb2Hc;
117
118 EFI_PCI_IO_PROTOCOL *PciIo;
119 EFI_DEVICE_PATH_PROTOCOL *DevicePath;
120 UINT64 OriginalPciAttributes;
121 USBHC_MEM_POOL *MemPool;
122
123 //
124 // Schedule data shared between asynchronous and periodic
125 // transfers:
126 // ShortReadStop, as its name indicates, is used to terminate
127 // the short read except the control transfer. EHCI follows
128 // the alternative next QTD point when a short read happens.
129 // For control transfer, even the short read happens, try the
130 // status stage.
131 //
132 EHC_QTD *ShortReadStop;
133 EFI_EVENT PollTimer;
134
135 //
136 // ExitBootServicesEvent is used to stop the EHC DMA operation
137 // after exit boot service.
138 //
139 EFI_EVENT ExitBootServiceEvent;
140
141 //
142 // Asynchronous(bulk and control) transfer schedule data:
143 // ReclaimHead is used as the head of the asynchronous transfer
144 // list. It acts as the reclamation header.
145 //
146 EHC_QH *ReclaimHead;
147
148 //
149 // Peroidic (interrupt) transfer schedule data:
150 //
151 VOID *PeriodFrame; // the buffer pointed by this pointer is used to store pci bus address of the QH descriptor.
152 VOID *PeriodFrameHost; // the buffer pointed by this pointer is used to store host memory address of the QH descriptor.
153 VOID *PeriodFrameMap;
154
155 EHC_QH *PeriodOne;
156 LIST_ENTRY AsyncIntTransfers;
157
158 //
159 // EHCI configuration data
160 //
161 UINT32 HcStructParams; // Cache of HC structure parameter, EHC_HCSPARAMS_OFFSET
162 UINT32 HcCapParams; // Cache of HC capability parameter, HCCPARAMS
163 UINT32 CapLen; // Capability length
164
165 //
166 // Misc
167 //
168 EFI_UNICODE_STRING_TABLE *ControllerNameTable;
169
170 //
171 // EHCI debug port info
172 //
173 UINT16 DebugPortOffset; // The offset of debug port mmio register
174 UINT8 DebugPortBarNum; // The bar number of debug port mmio register
175 UINT8 DebugPortNum; // The port number of usb debug port
176
177 BOOLEAN Support64BitDma; // Whether 64 bit DMA may be used with this device
178 };
179
180
181 extern EFI_DRIVER_BINDING_PROTOCOL gEhciDriverBinding;
182 extern EFI_COMPONENT_NAME_PROTOCOL gEhciComponentName;
183 extern EFI_COMPONENT_NAME2_PROTOCOL gEhciComponentName2;
184
185 /**
186 Test to see if this driver supports ControllerHandle. Any
187 ControllerHandle that has Usb2HcProtocol installed will
188 be supported.
189
190 @param This Protocol instance pointer.
191 @param Controller Handle of device to test.
192 @param RemainingDevicePath Not used.
193
194 @return EFI_SUCCESS This driver supports this device.
195 @return EFI_UNSUPPORTED This driver does not support this device.
196
197 **/
198 EFI_STATUS
199 EFIAPI
200 EhcDriverBindingSupported (
201 IN EFI_DRIVER_BINDING_PROTOCOL *This,
202 IN EFI_HANDLE Controller,
203 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
204 );
205
206 /**
207 Starting the Usb EHCI Driver.
208
209 @param This Protocol instance pointer.
210 @param Controller Handle of device to test.
211 @param RemainingDevicePath Not used.
212
213 @return EFI_SUCCESS supports this device.
214 @return EFI_UNSUPPORTED do not support this device.
215 @return EFI_DEVICE_ERROR cannot be started due to device Error.
216 @return EFI_OUT_OF_RESOURCES cannot allocate resources.
217
218 **/
219 EFI_STATUS
220 EFIAPI
221 EhcDriverBindingStart (
222 IN EFI_DRIVER_BINDING_PROTOCOL *This,
223 IN EFI_HANDLE Controller,
224 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
225 );
226
227 /**
228 Stop this driver on ControllerHandle. Support stoping any child handles
229 created by this driver.
230
231 @param This Protocol instance pointer.
232 @param Controller Handle of device to stop driver on.
233 @param NumberOfChildren Number of Children in the ChildHandleBuffer.
234 @param ChildHandleBuffer List of handles for the children we need to stop.
235
236 @return EFI_SUCCESS Success.
237 @return EFI_DEVICE_ERROR Fail.
238
239 **/
240 EFI_STATUS
241 EFIAPI
242 EhcDriverBindingStop (
243 IN EFI_DRIVER_BINDING_PROTOCOL *This,
244 IN EFI_HANDLE Controller,
245 IN UINTN NumberOfChildren,
246 IN EFI_HANDLE *ChildHandleBuffer
247 );
248
249 #endif
250