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1 /** @file
2
3 This file contains the definination for host controller memory management routines.
4
5 Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
7
8 **/
9
10 #ifndef _EFI_EHCI_MEM_H_
11 #define _EFI_EHCI_MEM_H_
12
13 #define USB_HC_BIT(a) ((UINTN)(1 << (a)))
14
15 #define USB_HC_BIT_IS_SET(Data, Bit) \
16 ((BOOLEAN)(((Data) & USB_HC_BIT(Bit)) == USB_HC_BIT(Bit)))
17
18 #define USB_HC_HIGH_32BIT(Addr64) \
19 ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
20
21 typedef struct _USBHC_MEM_BLOCK USBHC_MEM_BLOCK;
22 struct _USBHC_MEM_BLOCK {
23 UINT8 *Bits; // Bit array to record which unit is allocated
24 UINTN BitsLen;
25 UINT8 *Buf;
26 UINT8 *BufHost;
27 UINTN BufLen; // Memory size in bytes
28 VOID *Mapping;
29 USBHC_MEM_BLOCK *Next;
30 };
31
32 //
33 // USBHC_MEM_POOL is used to manage the memory used by USB
34 // host controller. EHCI requires the control memory and transfer
35 // data to be on the same 4G memory.
36 //
37 typedef struct _USBHC_MEM_POOL {
38 EFI_PCI_IO_PROTOCOL *PciIo;
39 BOOLEAN Check4G;
40 UINT32 Which4G;
41 USBHC_MEM_BLOCK *Head;
42 } USBHC_MEM_POOL;
43
44 //
45 // Memory allocation unit, must be 2^n, n>4
46 //
47 #define USBHC_MEM_UNIT 64
48
49 #define USBHC_MEM_UNIT_MASK (USBHC_MEM_UNIT - 1)
50 #define USBHC_MEM_DEFAULT_PAGES 16
51
52 #define USBHC_MEM_ROUND(Len) (((Len) + USBHC_MEM_UNIT_MASK) & (~USBHC_MEM_UNIT_MASK))
53
54 //
55 // Advance the byte and bit to the next bit, adjust byte accordingly.
56 //
57 #define NEXT_BIT(Byte, Bit) \
58 do { \
59 (Bit)++; \
60 if ((Bit) > 7) { \
61 (Byte)++; \
62 (Bit) = 0; \
63 } \
64 } while (0)
65
66
67
68 /**
69 Initialize the memory management pool for the host controller.
70
71 @param PciIo The PciIo that can be used to access the host controller.
72 @param Check4G Whether the host controller requires allocated memory
73 from one 4G address space.
74 @param Which4G The 4G memory area each memory allocated should be from.
75
76 @retval EFI_SUCCESS The memory pool is initialized.
77 @retval EFI_OUT_OF_RESOURCE Fail to init the memory pool.
78
79 **/
80 USBHC_MEM_POOL *
81 UsbHcInitMemPool (
82 IN EFI_PCI_IO_PROTOCOL *PciIo,
83 IN BOOLEAN Check4G,
84 IN UINT32 Which4G
85 );
86
87
88 /**
89 Release the memory management pool.
90
91 @param Pool The USB memory pool to free.
92
93 @retval EFI_SUCCESS The memory pool is freed.
94 @retval EFI_DEVICE_ERROR Failed to free the memory pool.
95
96 **/
97 EFI_STATUS
98 UsbHcFreeMemPool (
99 IN USBHC_MEM_POOL *Pool
100 );
101
102
103 /**
104 Allocate some memory from the host controller's memory pool
105 which can be used to communicate with host controller.
106
107 @param Pool The host controller's memory pool.
108 @param Size Size of the memory to allocate.
109
110 @return The allocated memory or NULL.
111
112 **/
113 VOID *
114 UsbHcAllocateMem (
115 IN USBHC_MEM_POOL *Pool,
116 IN UINTN Size
117 );
118
119
120 /**
121 Free the allocated memory back to the memory pool.
122
123 @param Pool The memory pool of the host controller.
124 @param Mem The memory to free.
125 @param Size The size of the memory to free.
126
127 **/
128 VOID
129 UsbHcFreeMem (
130 IN USBHC_MEM_POOL *Pool,
131 IN VOID *Mem,
132 IN UINTN Size
133 );
134
135 /**
136 Calculate the corresponding pci bus address according to the Mem parameter.
137
138 @param Pool The memory pool of the host controller.
139 @param Mem The pointer to host memory.
140 @param Size The size of the memory region.
141
142 @return the pci memory address
143 **/
144 EFI_PHYSICAL_ADDRESS
145 UsbHcGetPciAddressForHostMem (
146 IN USBHC_MEM_POOL *Pool,
147 IN VOID *Mem,
148 IN UINTN Size
149 );
150
151 #endif