2 Private Header file for Usb Host Controller PEIM
4 Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions
8 of the BSD License which accompanies this distribution. The
9 full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #ifndef _RECOVERY_EHC_H_
18 #define _RECOVERY_EHC_H_
22 #include <Ppi/UsbController.h>
23 #include <Ppi/Usb2HostController.h>
25 #include <Library/DebugLib.h>
26 #include <Library/PeimEntryPoint.h>
27 #include <Library/PeiServicesLib.h>
28 #include <Library/BaseMemoryLib.h>
29 #include <Library/TimerLib.h>
30 #include <Library/IoLib.h>
32 typedef struct _PEI_USB2_HC_DEV PEI_USB2_HC_DEV
;
34 #define EFI_LIST_ENTRY LIST_ENTRY
39 #include "EhciSched.h"
41 #define EFI_USB_SPEED_FULL 0x0000
42 #define EFI_USB_SPEED_LOW 0x0001
43 #define EFI_USB_SPEED_HIGH 0x0002
47 #define EHC_1_MICROSECOND 1
48 #define EHC_1_MILLISECOND (1000 * EHC_1_MICROSECOND)
49 #define EHC_1_SECOND (1000 * EHC_1_MILLISECOND)
52 // EHCI register operation timeout, set by experience
54 #define EHC_RESET_TIMEOUT (1 * EHC_1_SECOND)
55 #define EHC_GENERIC_TIMEOUT (10 * EHC_1_MILLISECOND)
59 // Wait for roothub port power stable, refers to Spec[EHCI1.0-2.3.9]
61 #define EHC_ROOT_PORT_RECOVERY_STALL (20 * EHC_1_MILLISECOND)
64 // Sync transfer polling interval, set by experience.
66 #define EHC_SYNC_POLL_INTERVAL (6 * EHC_1_MILLISECOND)
69 //Iterate through the doule linked list. NOT delete safe
71 #define EFI_LIST_FOR_EACH(Entry, ListHead) \
72 for(Entry = (ListHead)->ForwardLink; Entry != (ListHead); Entry = Entry->ForwardLink)
75 //Iterate through the doule linked list. This is delete-safe.
76 //Don't touch NextEntry
78 #define EFI_LIST_FOR_EACH_SAFE(Entry, NextEntry, ListHead) \
79 for(Entry = (ListHead)->ForwardLink, NextEntry = Entry->ForwardLink;\
80 Entry != (ListHead); Entry = NextEntry, NextEntry = Entry->ForwardLink)
82 #define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field)
85 #define EHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0XFFFFFFFF))
86 #define EHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))
87 #define EHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))
89 #define EHC_REG_BIT_IS_SET(Ehc, Offset, Bit) \
90 (EHC_BIT_IS_SET(EhcReadOpReg ((Ehc), (Offset)), (Bit)))
92 #define USB2_HC_DEV_SIGNATURE SIGNATURE_32 ('e', 'h', 'c', 'i')
94 struct _PEI_USB2_HC_DEV
{
96 PEI_USB2_HOST_CONTROLLER_PPI Usb2HostControllerPpi
;
97 EFI_PEI_PPI_DESCRIPTOR PpiDescriptor
;
98 UINT32 UsbHostControllerBaseAddress
;
100 USBHC_MEM_POOL
*MemPool
;
103 // Schedule data shared between asynchronous and periodic
105 // ShortReadStop, as its name indicates, is used to terminate
106 // the short read except the control transfer. EHCI follows
107 // the alternative next QTD point when a short read happens.
108 // For control transfer, even the short read happens, try the
111 PEI_EHC_QTD
*ShortReadStop
;
115 // Asynchronous(bulk and control) transfer schedule data:
116 // ReclaimHead is used as the head of the asynchronous transfer
117 // list. It acts as the reclamation header.
119 PEI_EHC_QH
*ReclaimHead
;
122 // Peroidic (interrupt) transfer schedule data:
124 VOID
*PeriodFrame
; // Mapped as common buffer
125 VOID
*PeriodFrameHost
;
126 VOID
*PeriodFrameMap
;
128 PEI_EHC_QH
*PeriodOne
;
129 EFI_LIST_ENTRY AsyncIntTransfers
;
132 // EHCI configuration data
134 UINT32 HcStructParams
; // Cache of HC structure parameter, EHC_HCSPARAMS_OFFSET
135 UINT32 HcCapParams
; // Cache of HC capability parameter, HCCPARAMS
136 UINT32 CapLen
; // Capability length
137 UINT32 High32bitAddr
;
140 #define PEI_RECOVERY_USB_EHC_DEV_FROM_EHCI_THIS(a) CR (a, PEI_USB2_HC_DEV, Usb2HostControllerPpi, USB2_HC_DEV_SIGNATURE)
143 @param EhcDev EHCI Device.
145 @retval EFI_SUCCESS EHCI successfully initialized.
146 @retval EFI_ABORTED EHCI was failed to be initialized.
151 IN PEI_USB2_HC_DEV
*EhcDev
155 Initialize the memory management pool for the host controller.
157 @param Ehc The EHCI device.
158 @param Check4G Whether the host controller requires allocated memory
159 from one 4G address space.
160 @param Which4G The 4G memory area each memory allocated should be from.
162 @retval EFI_SUCCESS The memory pool is initialized.
163 @retval EFI_OUT_OF_RESOURCE Fail to init the memory pool.
168 IN PEI_USB2_HC_DEV
*Ehc
,
175 Release the memory management pool.
177 @param Pool The USB memory pool to free.
179 @retval EFI_DEVICE_ERROR Fail to free the memory pool.
180 @retval EFI_SUCCESS The memory pool is freed.
185 IN USBHC_MEM_POOL
*Pool
190 Allocate some memory from the host controller's memory pool
191 which can be used to communicate with host controller.
193 @param Ehc The EHCI device.
194 @param Pool The host controller's memory pool.
195 @param Size Size of the memory to allocate.
197 @return The allocated memory or NULL.
202 IN PEI_USB2_HC_DEV
*Ehc
,
203 IN USBHC_MEM_POOL
*Pool
,
209 Free the allocated memory back to the memory pool.
211 @param Pool The memory pool of the host controller.
212 @param Mem The memory to free.
213 @param Size The size of the memory to free.
218 IN USBHC_MEM_POOL
*Pool
,