3 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
4 Copyright (c) 2016, Linaro, Ltd. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 #include "NonDiscoverablePciDeviceIo.h"
18 #include <Library/DxeServicesTableLib.h>
20 #include <IndustryStandard/Acpi.h>
22 #include <Protocol/PciRootBridgeIo.h>
25 EFI_PHYSICAL_ADDRESS AllocAddress
;
27 EFI_PCI_IO_PROTOCOL_OPERATION Operation
;
29 } NON_DISCOVERABLE_PCI_DEVICE_MAP_INFO
;
32 Get the resource associated with BAR number 'BarIndex'.
34 @param Dev Point to the NON_DISCOVERABLE_PCI_DEVICE instance.
35 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
36 base address for the memory operation to perform.
37 @param Descriptor Points to the address space descriptor
42 IN NON_DISCOVERABLE_PCI_DEVICE
*Dev
,
44 OUT EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
**Descriptor
47 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Desc
;
49 if (BarIndex
< Dev
->BarOffset
) {
53 BarIndex
-= (UINT8
)Dev
->BarOffset
;
55 for (Desc
= Dev
->Device
->Resources
;
56 Desc
->Desc
!= ACPI_END_TAG_DESCRIPTOR
;
57 Desc
= (VOID
*)((UINT8
*)Desc
+ Desc
->Len
+ 3)) {
70 Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is
71 satisfied or after a defined duration.
73 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
74 @param Width Signifies the width of the memory or I/O operations.
75 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
76 base address for the memory operation to perform.
77 @param Offset The offset within the selected BAR to start the memory operation.
78 @param Mask Mask used for the polling criteria.
79 @param Value The comparison value used for the polling exit criteria.
80 @param Delay The number of 100 ns units to poll.
81 @param Result Pointer to the last value read from the memory location.
88 IN EFI_PCI_IO_PROTOCOL
*This
,
89 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
99 return EFI_UNSUPPORTED
;
103 Reads from the memory space of a PCI controller. Returns either when the polling exit criteria is
104 satisfied or after a defined duration.
106 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
107 @param Width Signifies the width of the memory or I/O operations.
108 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
109 base address for the memory operation to perform.
110 @param Offset The offset within the selected BAR to start the memory operation.
111 @param Mask Mask used for the polling criteria.
112 @param Value The comparison value used for the polling exit criteria.
113 @param Delay The number of 100 ns units to poll.
114 @param Result Pointer to the last value read from the memory location.
121 IN EFI_PCI_IO_PROTOCOL
*This
,
122 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
132 return EFI_UNSUPPORTED
;
136 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
138 @param Width Signifies the width of the memory or I/O operations.
139 @param Count The number of memory or I/O operations to perform.
140 @param DstStride The stride of the destination buffer.
141 @param Dst For read operations, the destination buffer to store the results. For write
142 operations, the destination buffer to write data to.
143 @param SrcStride The stride of the source buffer.
144 @param Src For read operations, the source buffer to read data from. For write
145 operations, the source buffer to write data from.
147 @retval EFI_SUCCESS The data was read from or written to the PCI controller.
148 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
155 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
163 volatile UINT8
*Dst8
;
164 volatile UINT16
*Dst16
;
165 volatile UINT32
*Dst32
;
166 volatile CONST UINT8
*Src8
;
167 volatile CONST UINT16
*Src16
;
168 volatile CONST UINT32
*Src32
;
171 // Loop for each iteration and move the data
173 switch (Width
& 0x3) {
174 case EfiPciWidthUint8
:
177 for (;Count
> 0; Count
--, Dst8
+= DstStride
, Src8
+= SrcStride
) {
181 case EfiPciWidthUint16
:
182 Dst16
= (UINT16
*)Dst
;
183 Src16
= (UINT16
*)Src
;
184 for (;Count
> 0; Count
--, Dst16
+= DstStride
, Src16
+= SrcStride
) {
188 case EfiPciWidthUint32
:
189 Dst32
= (UINT32
*)Dst
;
190 Src32
= (UINT32
*)Src
;
191 for (;Count
> 0; Count
--, Dst32
+= DstStride
, Src32
+= SrcStride
) {
196 return EFI_INVALID_PARAMETER
;
203 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
205 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
206 @param Width Signifies the width of the memory or I/O operations.
207 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
208 base address for the memory or I/O operation to perform.
209 @param Offset The offset within the selected BAR to start the memory or I/O operation.
210 @param Count The number of memory or I/O operations to perform.
211 @param Buffer For read operations, the destination buffer to store the results. For write
212 operations, the source buffer to write data from.
214 @retval EFI_SUCCESS The data was read from or written to the PCI controller.
215 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
216 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
217 valid for the PCI BAR specified by BarIndex.
218 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
219 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
226 IN EFI_PCI_IO_PROTOCOL
*This
,
227 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
234 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
237 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Desc
;
240 if (Buffer
== NULL
) {
241 return EFI_INVALID_PARAMETER
;
244 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
247 // Only allow accesses to the BARs we emulate
249 Status
= GetBarResource (Dev
, BarIndex
, &Desc
);
250 if (EFI_ERROR (Status
)) {
254 if (Offset
+ (Count
<< (Width
& 0x3)) > Desc
->AddrLen
) {
255 return EFI_UNSUPPORTED
;
258 Address
= (VOID
*)(UINTN
)(Desc
->AddrRangeMin
+ Offset
);
259 AlignMask
= (1 << (Width
& 0x03)) - 1;
260 if ((UINTN
)Address
& AlignMask
) {
261 return EFI_INVALID_PARAMETER
;
265 case EfiPciIoWidthUint8
:
266 case EfiPciIoWidthUint16
:
267 case EfiPciIoWidthUint32
:
268 case EfiPciIoWidthUint64
:
269 return PciIoMemRW (Width
, Count
, 1, Buffer
, 1, Address
);
271 case EfiPciIoWidthFifoUint8
:
272 case EfiPciIoWidthFifoUint16
:
273 case EfiPciIoWidthFifoUint32
:
274 case EfiPciIoWidthFifoUint64
:
275 return PciIoMemRW (Width
, Count
, 1, Buffer
, 0, Address
);
277 case EfiPciIoWidthFillUint8
:
278 case EfiPciIoWidthFillUint16
:
279 case EfiPciIoWidthFillUint32
:
280 case EfiPciIoWidthFillUint64
:
281 return PciIoMemRW (Width
, Count
, 0, Buffer
, 1, Address
);
286 return EFI_INVALID_PARAMETER
;
290 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
292 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
293 @param Width Signifies the width of the memory or I/O operations.
294 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
295 base address for the memory or I/O operation to perform.
296 @param Offset The offset within the selected BAR to start the memory or I/O operation.
297 @param Count The number of memory or I/O operations to perform.
298 @param Buffer For read operations, the destination buffer to store the results. For write
299 operations, the source buffer to write data from.
301 @retval EFI_SUCCESS The data was read from or written to the PCI controller.
302 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
303 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
304 valid for the PCI BAR specified by BarIndex.
305 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
306 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
313 IN EFI_PCI_IO_PROTOCOL
*This
,
314 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
321 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
324 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Desc
;
327 if (Buffer
== NULL
) {
328 return EFI_INVALID_PARAMETER
;
331 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
334 // Only allow accesses to the BARs we emulate
336 Status
= GetBarResource (Dev
, BarIndex
, &Desc
);
337 if (EFI_ERROR (Status
)) {
341 if (Offset
+ (Count
<< (Width
& 0x3)) > Desc
->AddrLen
) {
342 return EFI_UNSUPPORTED
;
345 Address
= (VOID
*)(UINTN
)(Desc
->AddrRangeMin
+ Offset
);
346 AlignMask
= (1 << (Width
& 0x03)) - 1;
347 if ((UINTN
)Address
& AlignMask
) {
348 return EFI_INVALID_PARAMETER
;
352 case EfiPciIoWidthUint8
:
353 case EfiPciIoWidthUint16
:
354 case EfiPciIoWidthUint32
:
355 case EfiPciIoWidthUint64
:
356 return PciIoMemRW (Width
, Count
, 1, Address
, 1, Buffer
);
358 case EfiPciIoWidthFifoUint8
:
359 case EfiPciIoWidthFifoUint16
:
360 case EfiPciIoWidthFifoUint32
:
361 case EfiPciIoWidthFifoUint64
:
362 return PciIoMemRW (Width
, Count
, 0, Address
, 1, Buffer
);
364 case EfiPciIoWidthFillUint8
:
365 case EfiPciIoWidthFillUint16
:
366 case EfiPciIoWidthFillUint32
:
367 case EfiPciIoWidthFillUint64
:
368 return PciIoMemRW (Width
, Count
, 1, Address
, 0, Buffer
);
373 return EFI_INVALID_PARAMETER
;
377 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
379 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
380 @param Width Signifies the width of the memory or I/O operations.
381 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
382 base address for the memory or I/O operation to perform.
383 @param Offset The offset within the selected BAR to start the memory or I/O operation.
384 @param Count The number of memory or I/O operations to perform.
385 @param Buffer For read operations, the destination buffer to store the results. For write
386 operations, the source buffer to write data from.
393 IN EFI_PCI_IO_PROTOCOL
*This
,
394 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
402 return EFI_UNSUPPORTED
;
406 Enable a PCI driver to access PCI controller registers in the PCI memory or I/O space.
408 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
409 @param Width Signifies the width of the memory or I/O operations.
410 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
411 base address for the memory or I/O operation to perform.
412 @param Offset The offset within the selected BAR to start the memory or I/O operation.
413 @param Count The number of memory or I/O operations to perform.
414 @param Buffer For read operations, the destination buffer to store the results. For write
415 operations, the source buffer to write data from.
422 IN EFI_PCI_IO_PROTOCOL
*This
,
423 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
431 return EFI_UNSUPPORTED
;
435 Enable a PCI driver to access PCI config space.
437 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
438 @param Width Signifies the width of the memory or I/O operations.
439 @param Offset The offset within the selected BAR to start the memory or I/O operation.
440 @param Count The number of memory or I/O operations to perform.
441 @param Buffer For read operations, the destination buffer to store the results. For write
442 operations, the source buffer to write data from.
449 IN EFI_PCI_IO_PROTOCOL
*This
,
450 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
456 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
460 if (Width
< 0 || Width
>= EfiPciIoWidthMaximum
|| Buffer
== NULL
) {
461 return EFI_INVALID_PARAMETER
;
464 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
465 Address
= (UINT8
*)&Dev
->ConfigSpace
+ Offset
;
466 Length
= Count
<< ((UINTN
)Width
& 0x3);
468 if (Offset
+ Length
> sizeof (Dev
->ConfigSpace
)) {
470 // Read all zeroes for config space accesses beyond the first
473 Length
-= sizeof (Dev
->ConfigSpace
) - Offset
;
474 ZeroMem ((UINT8
*)Buffer
+ sizeof (Dev
->ConfigSpace
) - Offset
, Length
);
476 Count
-= Length
>> ((UINTN
)Width
& 0x3);
478 return PciIoMemRW (Width
, Count
, 1, Buffer
, 1, Address
);
482 Enable a PCI driver to access PCI config space.
484 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
485 @param Width Signifies the width of the memory or I/O operations.
486 @param Offset The offset within the selected BAR to start the memory or I/O operation.
487 @param Count The number of memory or I/O operations to perform.
488 @param Buffer For read operations, the destination buffer to store the results. For write
489 operations, the source buffer to write data from
491 @retval EFI_SUCCESS The data was read from or written to the PCI controller.
492 @retval EFI_UNSUPPORTED The address range specified by Offset, Width, and Count is not
493 valid for the PCI BAR specified by BarIndex.
494 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
501 IN EFI_PCI_IO_PROTOCOL
*This
,
502 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
508 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
511 if (Width
< 0 || Width
>= EfiPciIoWidthMaximum
|| Buffer
== NULL
) {
512 return EFI_INVALID_PARAMETER
;
515 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
516 Address
= (UINT8
*)&Dev
->ConfigSpace
+ Offset
;
518 if (Offset
+ (Count
<< ((UINTN
)Width
& 0x3)) > sizeof (Dev
->ConfigSpace
)) {
519 return EFI_UNSUPPORTED
;
522 return PciIoMemRW (Width
, Count
, 1, Address
, 1, Buffer
);
526 Enables a PCI driver to copy one region of PCI memory space to another region of PCI
529 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
530 @param Width Signifies the width of the memory operations.
531 @param DestBarIndex The BAR index in the standard PCI Configuration header to use as the
532 base address for the memory operation to perform.
533 @param DestOffset The destination offset within the BAR specified by DestBarIndex to
534 start the memory writes for the copy operation.
535 @param SrcBarIndex The BAR index in the standard PCI Configuration header to use as the
536 base address for the memory operation to perform.
537 @param SrcOffset The source offset within the BAR specified by SrcBarIndex to start
538 the memory reads for the copy operation.
539 @param Count The number of memory operations to perform. Bytes moved is Width
540 size * Count, starting at DestOffset and SrcOffset.
547 IN EFI_PCI_IO_PROTOCOL
*This
,
548 IN EFI_PCI_IO_PROTOCOL_WIDTH Width
,
549 IN UINT8 DestBarIndex
,
550 IN UINT64 DestOffset
,
551 IN UINT8 SrcBarIndex
,
557 return EFI_UNSUPPORTED
;
561 Provides the PCI controller-specific addresses needed to access system memory.
563 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
564 @param Operation Indicates if the bus master is going to read or write to system memory.
565 @param HostAddress The system memory address to map to the PCI controller.
566 @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
568 @param DeviceAddress The resulting map address for the bus master PCI controller to use to
569 access the hosts HostAddress.
570 @param Mapping A resulting value to pass to Unmap().
572 @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
573 @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
574 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
575 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
576 @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
583 IN EFI_PCI_IO_PROTOCOL
*This
,
584 IN EFI_PCI_IO_PROTOCOL_OPERATION Operation
,
585 IN VOID
*HostAddress
,
586 IN OUT UINTN
*NumberOfBytes
,
587 OUT EFI_PHYSICAL_ADDRESS
*DeviceAddress
,
591 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
593 NON_DISCOVERABLE_PCI_DEVICE_MAP_INFO
*MapInfo
;
596 // If HostAddress exceeds 4 GB, and this device does not support 64-bit DMA
597 // addressing, we need to allocate a bounce buffer and copy over the data.
599 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
600 if ((Dev
->Attributes
& EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
) == 0 &&
601 (EFI_PHYSICAL_ADDRESS
)(UINTN
)HostAddress
+ *NumberOfBytes
> SIZE_4GB
) {
604 // Bounce buffering is not possible for consistent mappings
606 if (Operation
== EfiPciIoOperationBusMasterCommonBuffer
) {
607 return EFI_UNSUPPORTED
;
610 MapInfo
= AllocatePool (sizeof *MapInfo
);
611 if (MapInfo
== NULL
) {
612 return EFI_OUT_OF_RESOURCES
;
615 MapInfo
->AllocAddress
= MAX_UINT32
;
616 MapInfo
->HostAddress
= HostAddress
;
617 MapInfo
->Operation
= Operation
;
618 MapInfo
->NumberOfBytes
= *NumberOfBytes
;
620 Status
= gBS
->AllocatePages (AllocateMaxAddress
, EfiBootServicesData
,
621 EFI_SIZE_TO_PAGES (MapInfo
->NumberOfBytes
),
622 &MapInfo
->AllocAddress
);
623 if (EFI_ERROR (Status
)) {
625 // If we fail here, it is likely because the system has no memory below
626 // 4 GB to begin with. There is not much we can do about that other than
627 // fail the map request.
630 return EFI_DEVICE_ERROR
;
632 if (Operation
== EfiPciIoOperationBusMasterRead
) {
633 gBS
->CopyMem ((VOID
*)(UINTN
)MapInfo
->AllocAddress
, HostAddress
,
636 *DeviceAddress
= MapInfo
->AllocAddress
;
639 *DeviceAddress
= (EFI_PHYSICAL_ADDRESS
)(UINTN
)HostAddress
;
646 Completes the Map() operation and releases any corresponding resources.
648 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
649 @param Mapping The mapping value returned from Map().
651 @retval EFI_SUCCESS The range was unmapped.
658 IN EFI_PCI_IO_PROTOCOL
*This
,
662 NON_DISCOVERABLE_PCI_DEVICE_MAP_INFO
*MapInfo
;
665 if (MapInfo
!= NULL
) {
666 if (MapInfo
->Operation
== EfiPciIoOperationBusMasterWrite
) {
667 gBS
->CopyMem (MapInfo
->HostAddress
, (VOID
*)(UINTN
)MapInfo
->AllocAddress
,
668 MapInfo
->NumberOfBytes
);
670 gBS
->FreePages (MapInfo
->AllocAddress
,
671 EFI_SIZE_TO_PAGES (MapInfo
->NumberOfBytes
));
680 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
681 @param Type This parameter is not used and must be ignored.
682 @param MemoryType The type of memory to allocate, EfiBootServicesData or
683 EfiRuntimeServicesData.
684 @param Pages The number of pages to allocate.
685 @param HostAddress A pointer to store the base system memory address of the
687 @param Attributes The requested bit mask of attributes for the allocated range.
689 @retval EFI_SUCCESS The requested memory pages were allocated.
690 @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
691 MEMORY_WRITE_COMBINE and MEMORY_CACHED.
692 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
693 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
699 CoherentPciIoAllocateBuffer (
700 IN EFI_PCI_IO_PROTOCOL
*This
,
701 IN EFI_ALLOCATE_TYPE Type
,
702 IN EFI_MEMORY_TYPE MemoryType
,
704 OUT VOID
**HostAddress
,
708 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
709 EFI_PHYSICAL_ADDRESS AllocAddress
;
710 EFI_ALLOCATE_TYPE AllocType
;
713 if ((Attributes
& ~(EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE
|
714 EFI_PCI_ATTRIBUTE_MEMORY_CACHED
)) != 0) {
715 return EFI_UNSUPPORTED
;
719 // Allocate below 4 GB if the dual address cycle attribute has not
720 // been set. If the system has no memory available below 4 GB, there
721 // is little we can do except propagate the error.
723 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
724 if ((Dev
->Attributes
& EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
) == 0) {
725 AllocAddress
= MAX_UINT32
;
726 AllocType
= AllocateMaxAddress
;
728 AllocType
= AllocateAnyPages
;
731 Status
= gBS
->AllocatePages (AllocType
, MemoryType
, Pages
, &AllocAddress
);
732 if (!EFI_ERROR (Status
)) {
733 *HostAddress
= (VOID
*)(UINTN
)AllocAddress
;
739 Frees memory that was allocated in function CoherentPciIoAllocateBuffer ().
741 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
742 @param Pages The number of pages to free.
743 @param HostAddress The base system memory address of the allocated range.
745 @retval EFI_SUCCESS The requested memory pages were freed.
751 CoherentPciIoFreeBuffer (
752 IN EFI_PCI_IO_PROTOCOL
*This
,
757 FreePages (HostAddress
, Pages
);
762 Frees memory that was allocated in function NonCoherentPciIoAllocateBuffer ().
764 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
765 @param Pages The number of pages to free.
766 @param HostAddress The base system memory address of the allocated range.
768 @retval EFI_SUCCESS The requested memory pages were freed.
769 @retval others The operation contain some errors.
775 NonCoherentPciIoFreeBuffer (
776 IN EFI_PCI_IO_PROTOCOL
*This
,
781 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
784 NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION
*Alloc
;
787 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
793 // Find the uncached allocation list entry associated
794 // with this allocation
796 for (Entry
= Dev
->UncachedAllocationList
.ForwardLink
;
797 Entry
!= &Dev
->UncachedAllocationList
;
798 Entry
= Entry
->ForwardLink
) {
800 Alloc
= BASE_CR (Entry
, NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION
, List
);
801 if (Alloc
->HostAddress
== HostAddress
&& Alloc
->NumPages
== Pages
) {
803 // We are freeing the exact allocation we were given
804 // before by AllocateBuffer()
812 ASSERT_EFI_ERROR (EFI_NOT_FOUND
);
813 return EFI_NOT_FOUND
;
816 RemoveEntryList (&Alloc
->List
);
818 Status
= gDS
->SetMemorySpaceAttributes (
819 (EFI_PHYSICAL_ADDRESS
)(UINTN
)HostAddress
,
820 EFI_PAGES_TO_SIZE (Pages
),
822 if (EFI_ERROR (Status
)) {
827 // If we fail to restore the original attributes, it is better to leak the
828 // memory than to return it to the heap
830 FreePages (HostAddress
, Pages
);
840 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
841 @param Type This parameter is not used and must be ignored.
842 @param MemoryType The type of memory to allocate, EfiBootServicesData or
843 EfiRuntimeServicesData.
844 @param Pages The number of pages to allocate.
845 @param HostAddress A pointer to store the base system memory address of the
847 @param Attributes The requested bit mask of attributes for the allocated range.
849 @retval EFI_SUCCESS The requested memory pages were allocated.
850 @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are
851 MEMORY_WRITE_COMBINE and MEMORY_CACHED.
852 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
853 @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.
859 NonCoherentPciIoAllocateBuffer (
860 IN EFI_PCI_IO_PROTOCOL
*This
,
861 IN EFI_ALLOCATE_TYPE Type
,
862 IN EFI_MEMORY_TYPE MemoryType
,
864 OUT VOID
**HostAddress
,
868 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
869 EFI_GCD_MEMORY_SPACE_DESCRIPTOR GcdDescriptor
;
872 NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION
*Alloc
;
875 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
877 Status
= CoherentPciIoAllocateBuffer (This
, Type
, MemoryType
, Pages
,
878 &AllocAddress
, Attributes
);
879 if (EFI_ERROR (Status
)) {
883 Status
= gDS
->GetMemorySpaceDescriptor (
884 (EFI_PHYSICAL_ADDRESS
)(UINTN
)AllocAddress
,
886 if (EFI_ERROR (Status
)) {
890 if ((GcdDescriptor
.Capabilities
& (EFI_MEMORY_WC
| EFI_MEMORY_UC
)) == 0) {
891 Status
= EFI_UNSUPPORTED
;
896 // Set the preferred memory attributes
898 if ((Attributes
& EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE
) != 0 ||
899 (GcdDescriptor
.Capabilities
& EFI_MEMORY_UC
) == 0) {
901 // Use write combining if it was requested, or if it is the only
902 // type supported by the region.
904 MemType
= EFI_MEMORY_WC
;
906 MemType
= EFI_MEMORY_UC
;
909 Alloc
= AllocatePool (sizeof *Alloc
);
914 Alloc
->HostAddress
= AllocAddress
;
915 Alloc
->NumPages
= Pages
;
916 Alloc
->Attributes
= GcdDescriptor
.Attributes
;
919 // Record this allocation in the linked list, so we
920 // can restore the memory space attributes later
922 InsertHeadList (&Dev
->UncachedAllocationList
, &Alloc
->List
);
924 Status
= gDS
->SetMemorySpaceAttributes (
925 (EFI_PHYSICAL_ADDRESS
)(UINTN
)AllocAddress
,
926 EFI_PAGES_TO_SIZE (Pages
),
928 if (EFI_ERROR (Status
)) {
932 Status
= mCpu
->FlushDataCache (
934 (EFI_PHYSICAL_ADDRESS
)(UINTN
)AllocAddress
,
935 EFI_PAGES_TO_SIZE (Pages
),
936 EfiCpuFlushTypeInvalidate
);
937 if (EFI_ERROR (Status
)) {
941 *HostAddress
= AllocAddress
;
946 RemoveEntryList (&Alloc
->List
);
950 CoherentPciIoFreeBuffer (This
, Pages
, AllocAddress
);
955 Provides the PCI controller-specific addresses needed to access system memory.
957 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
958 @param Operation Indicates if the bus master is going to read or write to system memory.
959 @param HostAddress The system memory address to map to the PCI controller.
960 @param NumberOfBytes On input the number of bytes to map. On output the number of bytes
962 @param DeviceAddress The resulting map address for the bus master PCI controller to use to
963 access the hosts HostAddress.
964 @param Mapping A resulting value to pass to Unmap().
966 @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.
967 @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.
968 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
969 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
970 @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.
976 NonCoherentPciIoMap (
977 IN EFI_PCI_IO_PROTOCOL
*This
,
978 IN EFI_PCI_IO_PROTOCOL_OPERATION Operation
,
979 IN VOID
*HostAddress
,
980 IN OUT UINTN
*NumberOfBytes
,
981 OUT EFI_PHYSICAL_ADDRESS
*DeviceAddress
,
985 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
987 NON_DISCOVERABLE_PCI_DEVICE_MAP_INFO
*MapInfo
;
990 EFI_GCD_MEMORY_SPACE_DESCRIPTOR GcdDescriptor
;
993 MapInfo
= AllocatePool (sizeof *MapInfo
);
994 if (MapInfo
== NULL
) {
995 return EFI_OUT_OF_RESOURCES
;
998 MapInfo
->HostAddress
= HostAddress
;
999 MapInfo
->Operation
= Operation
;
1000 MapInfo
->NumberOfBytes
= *NumberOfBytes
;
1002 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
1005 // If this device does not support 64-bit DMA addressing, we need to allocate
1006 // a bounce buffer and copy over the data in case HostAddress >= 4 GB.
1008 Bounce
= ((Dev
->Attributes
& EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
) == 0 &&
1009 (EFI_PHYSICAL_ADDRESS
)(UINTN
)HostAddress
+ *NumberOfBytes
> SIZE_4GB
);
1012 switch (Operation
) {
1013 case EfiPciIoOperationBusMasterRead
:
1014 case EfiPciIoOperationBusMasterWrite
:
1016 // For streaming DMA, it is sufficient if the buffer is aligned to
1017 // the CPUs DMA buffer alignment.
1019 AlignMask
= mCpu
->DmaBufferAlignment
- 1;
1020 if ((((UINTN
) HostAddress
| *NumberOfBytes
) & AlignMask
) == 0) {
1025 case EfiPciIoOperationBusMasterCommonBuffer
:
1027 // Check whether the host address refers to an uncached mapping.
1029 Status
= gDS
->GetMemorySpaceDescriptor (
1030 (EFI_PHYSICAL_ADDRESS
)(UINTN
)HostAddress
,
1032 if (EFI_ERROR (Status
) ||
1033 (GcdDescriptor
.Attributes
& (EFI_MEMORY_WB
|EFI_MEMORY_WT
)) != 0) {
1044 if (Operation
== EfiPciIoOperationBusMasterCommonBuffer
) {
1045 Status
= EFI_DEVICE_ERROR
;
1049 Status
= NonCoherentPciIoAllocateBuffer (This
, AllocateAnyPages
,
1050 EfiBootServicesData
, EFI_SIZE_TO_PAGES (MapInfo
->NumberOfBytes
),
1051 &AllocAddress
, EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE
);
1052 if (EFI_ERROR (Status
)) {
1055 MapInfo
->AllocAddress
= (EFI_PHYSICAL_ADDRESS
)(UINTN
)AllocAddress
;
1056 if (Operation
== EfiPciIoOperationBusMasterRead
) {
1057 gBS
->CopyMem (AllocAddress
, HostAddress
, *NumberOfBytes
);
1059 *DeviceAddress
= MapInfo
->AllocAddress
;
1061 MapInfo
->AllocAddress
= 0;
1062 *DeviceAddress
= (EFI_PHYSICAL_ADDRESS
)(UINTN
)HostAddress
;
1065 // We are not using a bounce buffer: the mapping is sufficiently
1066 // aligned to allow us to simply flush the caches. Note that cleaning
1067 // the caches is necessary for both data directions:
1068 // - for bus master read, we want the latest data to be present
1070 // - for bus master write, we don't want any stale dirty cachelines that
1071 // may be written back unexpectedly, and clobber the data written to
1072 // main memory by the device.
1074 mCpu
->FlushDataCache (mCpu
, (EFI_PHYSICAL_ADDRESS
)(UINTN
)HostAddress
,
1075 *NumberOfBytes
, EfiCpuFlushTypeWriteBack
);
1088 Completes the Map() operation and releases any corresponding resources.
1090 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1091 @param Mapping The mapping value returned from Map().
1093 @retval EFI_SUCCESS The range was unmapped.
1099 NonCoherentPciIoUnmap (
1100 IN EFI_PCI_IO_PROTOCOL
*This
,
1104 NON_DISCOVERABLE_PCI_DEVICE_MAP_INFO
*MapInfo
;
1106 if (Mapping
== NULL
) {
1107 return EFI_DEVICE_ERROR
;
1111 if (MapInfo
->AllocAddress
!= 0) {
1113 // We are using a bounce buffer: copy back the data if necessary,
1114 // and free the buffer.
1116 if (MapInfo
->Operation
== EfiPciIoOperationBusMasterWrite
) {
1117 gBS
->CopyMem (MapInfo
->HostAddress
, (VOID
*)(UINTN
)MapInfo
->AllocAddress
,
1118 MapInfo
->NumberOfBytes
);
1120 NonCoherentPciIoFreeBuffer (This
,
1121 EFI_SIZE_TO_PAGES (MapInfo
->NumberOfBytes
),
1122 (VOID
*)(UINTN
)MapInfo
->AllocAddress
);
1125 // We are *not* using a bounce buffer: if this is a bus master write,
1126 // we have to invalidate the caches so the CPU will see the uncached
1127 // data written by the device.
1129 if (MapInfo
->Operation
== EfiPciIoOperationBusMasterWrite
) {
1130 mCpu
->FlushDataCache (mCpu
,
1131 (EFI_PHYSICAL_ADDRESS
)(UINTN
)MapInfo
->HostAddress
,
1132 MapInfo
->NumberOfBytes
, EfiCpuFlushTypeInvalidate
);
1140 Flushes all PCI posted write transactions from a PCI host bridge to system memory.
1142 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1149 IN EFI_PCI_IO_PROTOCOL
*This
1156 Retrieves this PCI controller's current PCI bus number, device number, and function number.
1158 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1159 @param SegmentNumber The PCI controller's current PCI segment number.
1160 @param BusNumber The PCI controller's current PCI bus number.
1161 @param DeviceNumber The PCI controller's current PCI device number.
1162 @param FunctionNumber The PCI controller's current PCI function number.
1164 @retval EFI_SUCCESS The PCI controller location was returned.
1165 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
1172 IN EFI_PCI_IO_PROTOCOL
*This
,
1173 OUT UINTN
*SegmentNumber
,
1174 OUT UINTN
*BusNumber
,
1175 OUT UINTN
*DeviceNumber
,
1176 OUT UINTN
*FunctionNumber
1179 if (SegmentNumber
== NULL
||
1180 BusNumber
== NULL
||
1181 DeviceNumber
== NULL
||
1182 FunctionNumber
== NULL
) {
1183 return EFI_INVALID_PARAMETER
;
1189 *FunctionNumber
= 0;
1195 Performs an operation on the attributes that this PCI controller supports. The operations include
1196 getting the set of supported attributes, retrieving the current attributes, setting the current
1197 attributes, enabling attributes, and disabling attributes.
1199 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1200 @param Operation The operation to perform on the attributes for this PCI controller.
1201 @param Attributes The mask of attributes that are used for Set, Enable, and Disable
1203 @param Result A pointer to the result mask of attributes that are returned for the Get
1204 and Supported operations.
1206 @retval EFI_SUCCESS The operation on the PCI controller's attributes was completed.
1207 @retval EFI_INVALID_PARAMETER One or more parameters are invalid.
1208 @retval EFI_UNSUPPORTED one or more of the bits set in
1209 Attributes are not supported by this PCI controller or one of
1210 its parent bridges when Operation is Set, Enable or Disable.
1217 IN EFI_PCI_IO_PROTOCOL
*This
,
1218 IN EFI_PCI_IO_PROTOCOL_ATTRIBUTE_OPERATION Operation
,
1219 IN UINT64 Attributes
,
1220 OUT UINT64
*Result OPTIONAL
1223 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
1226 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
1229 switch (Operation
) {
1230 case EfiPciIoAttributeOperationGet
:
1231 if (Result
== NULL
) {
1232 return EFI_INVALID_PARAMETER
;
1234 *Result
= Dev
->Attributes
;
1237 case EfiPciIoAttributeOperationSupported
:
1238 if (Result
== NULL
) {
1239 return EFI_INVALID_PARAMETER
;
1241 *Result
= EFI_PCI_DEVICE_ENABLE
| EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE
;
1244 case EfiPciIoAttributeOperationEnable
:
1245 Attributes
|= Dev
->Attributes
;
1246 case EfiPciIoAttributeOperationSet
:
1247 Enable
= ((~Dev
->Attributes
& Attributes
) & EFI_PCI_DEVICE_ENABLE
) != 0;
1248 Dev
->Attributes
= Attributes
;
1251 case EfiPciIoAttributeOperationDisable
:
1252 Dev
->Attributes
&= ~Attributes
;
1256 return EFI_INVALID_PARAMETER
;
1260 // If we're setting any of the EFI_PCI_DEVICE_ENABLE bits, perform
1261 // the device specific initialization now.
1263 if (Enable
&& !Dev
->Enabled
&& Dev
->Device
->Initialize
!= NULL
) {
1264 Dev
->Device
->Initialize (Dev
->Device
);
1265 Dev
->Enabled
= TRUE
;
1271 Gets the attributes that this PCI controller supports setting on a BAR using
1272 SetBarAttributes(), and retrieves the list of resource descriptors for a BAR.
1274 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1275 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
1276 base address for resource range. The legal range for this field is 0..5.
1277 @param Supports A pointer to the mask of attributes that this PCI controller supports
1278 setting for this BAR with SetBarAttributes().
1279 @param Resources A pointer to the ACPI 2.0 resource descriptors that describe the current
1280 configuration of this BAR of the PCI controller.
1282 @retval EFI_SUCCESS If Supports is not NULL, then the attributes that the PCI
1283 controller supports are returned in Supports. If Resources
1284 is not NULL, then the ACPI 2.0 resource descriptors that the PCI
1285 controller is currently using are returned in Resources.
1286 @retval EFI_INVALID_PARAMETER Both Supports and Attributes are NULL.
1287 @retval EFI_UNSUPPORTED BarIndex not valid for this PCI controller.
1288 @retval EFI_OUT_OF_RESOURCES There are not enough resources available to allocate
1295 PciIoGetBarAttributes (
1296 IN EFI_PCI_IO_PROTOCOL
*This
,
1298 OUT UINT64
*Supports OPTIONAL
,
1299 OUT VOID
**Resources OPTIONAL
1302 NON_DISCOVERABLE_PCI_DEVICE
*Dev
;
1303 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Descriptor
;
1304 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*BarDesc
;
1305 EFI_ACPI_END_TAG_DESCRIPTOR
*End
;
1308 if (Supports
== NULL
&& Resources
== NULL
) {
1309 return EFI_INVALID_PARAMETER
;
1312 Dev
= NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This
);
1314 Status
= GetBarResource (Dev
, BarIndex
, &BarDesc
);
1315 if (EFI_ERROR (Status
)) {
1320 // Don't expose any configurable attributes for our emulated BAR
1322 if (Supports
!= NULL
) {
1326 if (Resources
!= NULL
) {
1327 Descriptor
= AllocatePool (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
) +
1328 sizeof (EFI_ACPI_END_TAG_DESCRIPTOR
));
1329 if (Descriptor
== NULL
) {
1330 return EFI_OUT_OF_RESOURCES
;
1333 CopyMem (Descriptor
, BarDesc
, sizeof *Descriptor
);
1335 End
= (EFI_ACPI_END_TAG_DESCRIPTOR
*) (Descriptor
+ 1);
1336 End
->Desc
= ACPI_END_TAG_DESCRIPTOR
;
1339 *Resources
= Descriptor
;
1345 Sets the attributes for a range of a BAR on a PCI controller.
1347 @param This A pointer to the EFI_PCI_IO_PROTOCOL instance.
1348 @param Attributes The mask of attributes to set for the resource range specified by
1349 BarIndex, Offset, and Length.
1350 @param BarIndex The BAR index of the standard PCI Configuration header to use as the
1351 base address for resource range. The legal range for this field is 0..5.
1352 @param Offset A pointer to the BAR relative base address of the resource range to be
1353 modified by the attributes specified by Attributes.
1354 @param Length A pointer to the length of the resource range to be modified by the
1355 attributes specified by Attributes.
1360 PciIoSetBarAttributes (
1361 IN EFI_PCI_IO_PROTOCOL
*This
,
1362 IN UINT64 Attributes
,
1364 IN OUT UINT64
*Offset
,
1365 IN OUT UINT64
*Length
1369 return EFI_UNSUPPORTED
;
1372 STATIC CONST EFI_PCI_IO_PROTOCOL PciIoTemplate
=
1376 { PciIoMemRead
, PciIoMemWrite
},
1377 { PciIoIoRead
, PciIoIoWrite
},
1378 { PciIoPciRead
, PciIoPciWrite
},
1382 CoherentPciIoAllocateBuffer
,
1383 CoherentPciIoFreeBuffer
,
1387 PciIoGetBarAttributes
,
1388 PciIoSetBarAttributes
,
1394 Initialize PciIo Protocol.
1396 @param Dev Point to NON_DISCOVERABLE_PCI_DEVICE instance.
1400 InitializePciIoProtocol (
1401 NON_DISCOVERABLE_PCI_DEVICE
*Dev
1404 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Desc
;
1407 InitializeListHead (&Dev
->UncachedAllocationList
);
1409 Dev
->ConfigSpace
.Hdr
.VendorId
= PCI_ID_VENDOR_UNKNOWN
;
1410 Dev
->ConfigSpace
.Hdr
.DeviceId
= PCI_ID_DEVICE_DONTCARE
;
1412 // Copy protocol structure
1413 CopyMem(&Dev
->PciIo
, &PciIoTemplate
, sizeof PciIoTemplate
);
1415 if (Dev
->Device
->DmaType
== NonDiscoverableDeviceDmaTypeNonCoherent
) {
1416 Dev
->PciIo
.AllocateBuffer
= NonCoherentPciIoAllocateBuffer
;
1417 Dev
->PciIo
.FreeBuffer
= NonCoherentPciIoFreeBuffer
;
1418 Dev
->PciIo
.Map
= NonCoherentPciIoMap
;
1419 Dev
->PciIo
.Unmap
= NonCoherentPciIoUnmap
;
1422 if (CompareGuid (Dev
->Device
->Type
, &gEdkiiNonDiscoverableAhciDeviceGuid
)) {
1423 Dev
->ConfigSpace
.Hdr
.ClassCode
[0] = PCI_IF_MASS_STORAGE_AHCI
;
1424 Dev
->ConfigSpace
.Hdr
.ClassCode
[1] = PCI_CLASS_MASS_STORAGE_SATADPA
;
1425 Dev
->ConfigSpace
.Hdr
.ClassCode
[2] = PCI_CLASS_MASS_STORAGE
;
1427 } else if (CompareGuid (Dev
->Device
->Type
,
1428 &gEdkiiNonDiscoverableEhciDeviceGuid
)) {
1429 Dev
->ConfigSpace
.Hdr
.ClassCode
[0] = PCI_IF_EHCI
;
1430 Dev
->ConfigSpace
.Hdr
.ClassCode
[1] = PCI_CLASS_SERIAL_USB
;
1431 Dev
->ConfigSpace
.Hdr
.ClassCode
[2] = PCI_CLASS_SERIAL
;
1433 } else if (CompareGuid (Dev
->Device
->Type
,
1434 &gEdkiiNonDiscoverableNvmeDeviceGuid
)) {
1435 Dev
->ConfigSpace
.Hdr
.ClassCode
[0] = 0x2; // PCI_IF_NVMHCI
1436 Dev
->ConfigSpace
.Hdr
.ClassCode
[1] = 0x8; // PCI_CLASS_MASS_STORAGE_NVM
1437 Dev
->ConfigSpace
.Hdr
.ClassCode
[2] = PCI_CLASS_MASS_STORAGE
;
1439 } else if (CompareGuid (Dev
->Device
->Type
,
1440 &gEdkiiNonDiscoverableOhciDeviceGuid
)) {
1441 Dev
->ConfigSpace
.Hdr
.ClassCode
[0] = PCI_IF_OHCI
;
1442 Dev
->ConfigSpace
.Hdr
.ClassCode
[1] = PCI_CLASS_SERIAL_USB
;
1443 Dev
->ConfigSpace
.Hdr
.ClassCode
[2] = PCI_CLASS_SERIAL
;
1445 } else if (CompareGuid (Dev
->Device
->Type
,
1446 &gEdkiiNonDiscoverableSdhciDeviceGuid
)) {
1447 Dev
->ConfigSpace
.Hdr
.ClassCode
[0] = 0x0; // don't care
1448 Dev
->ConfigSpace
.Hdr
.ClassCode
[1] = PCI_SUBCLASS_SD_HOST_CONTROLLER
;
1449 Dev
->ConfigSpace
.Hdr
.ClassCode
[2] = PCI_CLASS_SYSTEM_PERIPHERAL
;
1451 } else if (CompareGuid (Dev
->Device
->Type
,
1452 &gEdkiiNonDiscoverableXhciDeviceGuid
)) {
1453 Dev
->ConfigSpace
.Hdr
.ClassCode
[0] = PCI_IF_XHCI
;
1454 Dev
->ConfigSpace
.Hdr
.ClassCode
[1] = PCI_CLASS_SERIAL_USB
;
1455 Dev
->ConfigSpace
.Hdr
.ClassCode
[2] = PCI_CLASS_SERIAL
;
1457 } else if (CompareGuid (Dev
->Device
->Type
,
1458 &gEdkiiNonDiscoverableUhciDeviceGuid
)) {
1459 Dev
->ConfigSpace
.Hdr
.ClassCode
[0] = PCI_IF_UHCI
;
1460 Dev
->ConfigSpace
.Hdr
.ClassCode
[1] = PCI_CLASS_SERIAL_USB
;
1461 Dev
->ConfigSpace
.Hdr
.ClassCode
[2] = PCI_CLASS_SERIAL
;
1463 } else if (CompareGuid (Dev
->Device
->Type
,
1464 &gEdkiiNonDiscoverableUfsDeviceGuid
)) {
1465 Dev
->ConfigSpace
.Hdr
.ClassCode
[0] = 0x0; // don't care
1466 Dev
->ConfigSpace
.Hdr
.ClassCode
[1] = 0x9; // UFS controller subclass;
1467 Dev
->ConfigSpace
.Hdr
.ClassCode
[2] = PCI_CLASS_MASS_STORAGE
;
1470 ASSERT_EFI_ERROR (EFI_INVALID_PARAMETER
);
1474 // Iterate over the resources to populate the virtual BARs
1476 Idx
= Dev
->BarOffset
;
1477 for (Desc
= Dev
->Device
->Resources
, Dev
->BarCount
= 0;
1478 Desc
->Desc
!= ACPI_END_TAG_DESCRIPTOR
;
1479 Desc
= (VOID
*)((UINT8
*)Desc
+ Desc
->Len
+ 3)) {
1481 ASSERT (Desc
->Desc
== ACPI_ADDRESS_SPACE_DESCRIPTOR
);
1482 ASSERT (Desc
->ResType
== ACPI_ADDRESS_SPACE_TYPE_MEM
);
1484 if (Idx
>= PCI_MAX_BARS
||
1485 (Idx
== PCI_MAX_BARS
- 1 && Desc
->AddrSpaceGranularity
== 64)) {
1486 DEBUG ((DEBUG_ERROR
,
1487 "%a: resource count exceeds number of emulated BARs\n",
1493 Dev
->ConfigSpace
.Device
.Bar
[Idx
] = (UINT32
)Desc
->AddrRangeMin
;
1496 if (Desc
->AddrSpaceGranularity
== 64) {
1497 Dev
->ConfigSpace
.Device
.Bar
[Idx
] |= 0x4;
1498 Dev
->ConfigSpace
.Device
.Bar
[++Idx
] = (UINT32
)RShiftU64 (
1499 Desc
->AddrRangeMin
, 32);