e641189267eeea45a1499f1c25260ddadd28e4d3
[mirror_edk2.git] / MdeModulePkg / Bus / Pci / NonDiscoverablePciDeviceDxe / NonDiscoverablePciDeviceIo.h
1 /** @file
2
3 Copyright (C) 2016, Linaro Ltd. All rights reserved.<BR>
4
5 This program and the accompanying materials are licensed and made available
6 under the terms and conditions of the BSD License which accompanies this
7 distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT
11 WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #ifndef __NON_DISCOVERABLE_PCI_DEVICE_IO_H__
16 #define __NON_DISCOVERABLE_PCI_DEVICE_IO_H__
17
18 #include <PiDxe.h>
19
20 #include <Library/BaseMemoryLib.h>
21 #include <Library/DebugLib.h>
22 #include <Library/MemoryAllocationLib.h>
23 #include <Library/UefiBootServicesTableLib.h>
24 #include <Library/UefiLib.h>
25
26 #include <IndustryStandard/Pci.h>
27
28 #include <Protocol/ComponentName.h>
29 #include <Protocol/NonDiscoverableDevice.h>
30 #include <Protocol/Cpu.h>
31 #include <Protocol/PciIo.h>
32
33 #define NON_DISCOVERABLE_PCI_DEVICE_SIG SIGNATURE_32 ('P', 'P', 'I', 'D')
34
35 #define NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(PciIoPointer) \
36 CR (PciIoPointer, NON_DISCOVERABLE_PCI_DEVICE, PciIo, \
37 NON_DISCOVERABLE_PCI_DEVICE_SIG)
38
39 #define PCI_ID_VENDOR_UNKNOWN 0xffff
40 #define PCI_ID_DEVICE_DONTCARE 0x0000
41
42 #define PCI_MAX_BARS 6
43
44 extern EFI_CPU_ARCH_PROTOCOL *mCpu;
45
46 typedef struct {
47 //
48 // The linked-list next pointer
49 //
50 LIST_ENTRY List;
51 //
52 // The address of the uncached allocation
53 //
54 VOID *HostAddress;
55 //
56 // The number of pages in the allocation
57 //
58 UINTN NumPages;
59 //
60 // The attributes of the allocation
61 //
62 UINT64 Attributes;
63 } NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION;
64
65 typedef struct {
66 UINT32 Signature;
67 //
68 // The bound non-discoverable device protocol instance
69 //
70 NON_DISCOVERABLE_DEVICE *Device;
71 //
72 // The exposed PCI I/O protocol instance.
73 //
74 EFI_PCI_IO_PROTOCOL PciIo;
75 //
76 // The emulated PCI config space of the device. Only the minimally required
77 // items are assigned.
78 //
79 PCI_TYPE00 ConfigSpace;
80 //
81 // The first virtual BAR to assign based on the resources described
82 // by the non-discoverable device.
83 //
84 UINT32 BarOffset;
85 //
86 // The number of virtual BARs we expose based on the number of
87 // resources
88 //
89 UINT32 BarCount;
90 //
91 // The PCI I/O attributes for this device
92 //
93 UINT64 Attributes;
94 //
95 // Whether this device has been enabled
96 //
97 BOOLEAN Enabled;
98 //
99 // Linked list to keep track of uncached allocations performed
100 // on behalf of this device
101 //
102 LIST_ENTRY UncachedAllocationList;
103 } NON_DISCOVERABLE_PCI_DEVICE;
104
105 /**
106 Initialize PciIo Protocol.
107
108 @param Device Point to NON_DISCOVERABLE_PCI_DEVICE instance.
109
110 **/
111 VOID
112 InitializePciIoProtocol (
113 NON_DISCOVERABLE_PCI_DEVICE *Device
114 );
115
116 extern EFI_COMPONENT_NAME_PROTOCOL gComponentName;
117 extern EFI_COMPONENT_NAME2_PROTOCOL gComponentName2;
118
119 #endif