MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.h

   1 /** @file
   2
   3   Copyright (C) 2016, Linaro Ltd. All rights reserved.<BR>
   4
   5   SPDX-License-Identifier: BSD-2-Clause-Patent
   6
   7 **/
   8
   9 #ifndef __NON_DISCOVERABLE_PCI_DEVICE_IO_H__
  10 #define __NON_DISCOVERABLE_PCI_DEVICE_IO_H__
  11
  12 #include <PiDxe.h>
  13
  14 #include <Library/BaseMemoryLib.h>
  15 #include <Library/DebugLib.h>
  16 #include <Library/MemoryAllocationLib.h>
  17 #include <Library/UefiBootServicesTableLib.h>
  18 #include <Library/UefiLib.h>
  19
  20 #include <IndustryStandard/Pci.h>
  21
  22 #include <Protocol/ComponentName.h>
  23 #include <Protocol/NonDiscoverableDevice.h>
  24 #include <Protocol/Cpu.h>
  25 #include <Protocol/PciIo.h>
  26
  27 #define NON_DISCOVERABLE_PCI_DEVICE_SIG SIGNATURE_32 ('P', 'P', 'I', 'D')
  28
  29 #define NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(PciIoPointer) \
  30         CR (PciIoPointer, NON_DISCOVERABLE_PCI_DEVICE, PciIo, \
  31             NON_DISCOVERABLE_PCI_DEVICE_SIG)
  32
  33 #define DEV_SUPPORTED_ATTRIBUTES \
  34     (EFI_PCI_DEVICE_ENABLE | EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE)
  35
  36 #define PCI_ID_VENDOR_UNKNOWN         0xffff
  37 #define PCI_ID_DEVICE_DONTCARE        0x0000
  38
  39 #define PCI_MAX_BARS                  6
  40
  41 extern EFI_CPU_ARCH_PROTOCOL      *mCpu;
  42
  43 typedef struct {
  44   //
  45   // The linked-list next pointer
  46   //
  47   LIST_ENTRY          List;
  48   //
  49   // The address of the uncached allocation
  50   //
  51   VOID                *HostAddress;
  52   //
  53   // The number of pages in the allocation
  54   //
  55   UINTN               NumPages;
  56   //
  57   // The attributes of the allocation
  58   //
  59   UINT64              Attributes;
  60 } NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION;
  61
  62 typedef struct {
  63   UINT32                    Signature;
  64   //
  65   // The bound non-discoverable device protocol instance
  66   //
  67   NON_DISCOVERABLE_DEVICE   *Device;
  68   //
  69   // The exposed PCI I/O protocol instance.
  70   //
  71   EFI_PCI_IO_PROTOCOL       PciIo;
  72   //
  73   // The emulated PCI config space of the device. Only the minimally required
  74   // items are assigned.
  75   //
  76   PCI_TYPE00                ConfigSpace;
  77   //
  78   // The first virtual BAR to assign based on the resources described
  79   // by the non-discoverable device.
  80   //
  81   UINT32                    BarOffset;
  82   //
  83   // The number of virtual BARs we expose based on the number of
  84   // resources
  85   //
  86   UINT32                    BarCount;
  87   //
  88   // The PCI I/O attributes for this device
  89   //
  90   UINT64                    Attributes;
  91   //
  92   // Whether this device has been enabled
  93   //
  94   BOOLEAN                   Enabled;
  95   //
  96   // Linked list to keep track of uncached allocations performed
  97   // on behalf of this device
  98   //
  99   LIST_ENTRY                UncachedAllocationList;
 100   //
 101   // Unique ID for this device instance: needed so that we can report unique
 102   // segment/bus/device number for each device instance. Note that this number
 103   // may change when disconnecting/reconnecting the driver.
 104   //
 105   UINTN                     UniqueId;
 106 } NON_DISCOVERABLE_PCI_DEVICE;
 107
 108 /**
 109   Initialize PciIo Protocol.
 110
 111   @param  Device      Point to NON_DISCOVERABLE_PCI_DEVICE instance.
 112
 113 **/
 114 VOID
 115 InitializePciIoProtocol (
 116   NON_DISCOVERABLE_PCI_DEVICE     *Device
 117   );
 118
 119 extern EFI_COMPONENT_NAME_PROTOCOL gComponentName;
 120 extern EFI_COMPONENT_NAME2_PROTOCOL gComponentName2;
 121
 122 #endif