2 NvmExpressDxe driver is used to manage non-volatile memory subsystem which follows
3 NVM Express specification.
5 (C) Copyright 2014 Hewlett-Packard Development Company, L.P.<BR>
6 Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>
7 This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php.
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #include "NvmExpress.h"
20 // Page size should be set in the Controller Configuration register
21 // during controller init, and the controller configuration save in
22 // the controller's private data. The Max and Min supported page sizes
23 // for the controller are specified in the Controller Capabilities register.
26 GLOBAL_REMOVE_IF_UNREFERENCED NVM_EXPRESS_PASS_THRU_MODE gNvmExpressPassThruMode
= {
28 NVM_EXPRESS_PASS_THRU_ATTRIBUTES_PHYSICAL
| NVM_EXPRESS_PASS_THRU_ATTRIBUTES_CMD_SET_NVME
,
37 Dump the execution status from a given completion queue entry.
39 @param[in] Cq A pointer to the NVME_CQ item.
47 DEBUG ((EFI_D_VERBOSE
, "Dump NVMe Completion Entry Status from [0x%x]:\n", Cq
));
49 DEBUG ((EFI_D_VERBOSE
, " SQ Identifier : [0x%x], Phase Tag : [%d], Cmd Identifier : [0x%x]\n", Cq
->Sqid
, Cq
->Pt
, Cq
->Cid
));
51 DEBUG ((EFI_D_VERBOSE
, " NVMe Cmd Execution Result - "));
57 DEBUG ((EFI_D_VERBOSE
, "Successful Completion\n"));
60 DEBUG ((EFI_D_VERBOSE
, "Invalid Command Opcode\n"));
63 DEBUG ((EFI_D_VERBOSE
, "Invalid Field in Command\n"));
66 DEBUG ((EFI_D_VERBOSE
, "Command ID Conflict\n"));
69 DEBUG ((EFI_D_VERBOSE
, "Data Transfer Error\n"));
72 DEBUG ((EFI_D_VERBOSE
, "Commands Aborted due to Power Loss Notification\n"));
75 DEBUG ((EFI_D_VERBOSE
, "Internal Device Error\n"));
78 DEBUG ((EFI_D_VERBOSE
, "Command Abort Requested\n"));
81 DEBUG ((EFI_D_VERBOSE
, "Command Aborted due to SQ Deletion\n"));
84 DEBUG ((EFI_D_VERBOSE
, "Command Aborted due to Failed Fused Command\n"));
87 DEBUG ((EFI_D_VERBOSE
, "Command Aborted due to Missing Fused Command\n"));
90 DEBUG ((EFI_D_VERBOSE
, "Invalid Namespace or Format\n"));
93 DEBUG ((EFI_D_VERBOSE
, "Command Sequence Error\n"));
96 DEBUG ((EFI_D_VERBOSE
, "Invalid SGL Last Segment Descriptor\n"));
99 DEBUG ((EFI_D_VERBOSE
, "Invalid Number of SGL Descriptors\n"));
102 DEBUG ((EFI_D_VERBOSE
, "Data SGL Length Invalid\n"));
105 DEBUG ((EFI_D_VERBOSE
, "Metadata SGL Length Invalid\n"));
108 DEBUG ((EFI_D_VERBOSE
, "SGL Descriptor Type Invalid\n"));
111 DEBUG ((EFI_D_VERBOSE
, "LBA Out of Range\n"));
114 DEBUG ((EFI_D_VERBOSE
, "Capacity Exceeded\n"));
117 DEBUG ((EFI_D_VERBOSE
, "Namespace Not Ready\n"));
120 DEBUG ((EFI_D_VERBOSE
, "Reservation Conflict\n"));
128 DEBUG ((EFI_D_VERBOSE
, "Completion Queue Invalid\n"));
131 DEBUG ((EFI_D_VERBOSE
, "Invalid Queue Identifier\n"));
134 DEBUG ((EFI_D_VERBOSE
, "Maximum Queue Size Exceeded\n"));
137 DEBUG ((EFI_D_VERBOSE
, "Abort Command Limit Exceeded\n"));
140 DEBUG ((EFI_D_VERBOSE
, "Asynchronous Event Request Limit Exceeded\n"));
143 DEBUG ((EFI_D_VERBOSE
, "Invalid Firmware Slot\n"));
146 DEBUG ((EFI_D_VERBOSE
, "Invalid Firmware Image\n"));
149 DEBUG ((EFI_D_VERBOSE
, "Invalid Interrupt Vector\n"));
152 DEBUG ((EFI_D_VERBOSE
, "Invalid Log Page\n"));
155 DEBUG ((EFI_D_VERBOSE
, "Invalid Format\n"));
158 DEBUG ((EFI_D_VERBOSE
, "Firmware Application Requires Conventional Reset\n"));
161 DEBUG ((EFI_D_VERBOSE
, "Invalid Queue Deletion\n"));
164 DEBUG ((EFI_D_VERBOSE
, "Feature Identifier Not Saveable\n"));
167 DEBUG ((EFI_D_VERBOSE
, "Feature Not Changeable\n"));
170 DEBUG ((EFI_D_VERBOSE
, "Feature Not Namespace Specific\n"));
173 DEBUG ((EFI_D_VERBOSE
, "Firmware Application Requires NVM Subsystem Reset\n"));
176 DEBUG ((EFI_D_VERBOSE
, "Conflicting Attributes\n"));
179 DEBUG ((EFI_D_VERBOSE
, "Invalid Protection Information\n"));
182 DEBUG ((EFI_D_VERBOSE
, "Attempted Write to Read Only Range\n"));
190 DEBUG ((EFI_D_VERBOSE
, "Write Fault\n"));
193 DEBUG ((EFI_D_VERBOSE
, "Unrecovered Read Error\n"));
196 DEBUG ((EFI_D_VERBOSE
, "End-to-end Guard Check Error\n"));
199 DEBUG ((EFI_D_VERBOSE
, "End-to-end Application Tag Check Error\n"));
202 DEBUG ((EFI_D_VERBOSE
, "End-to-end Reference Tag Check Error\n"));
205 DEBUG ((EFI_D_VERBOSE
, "Compare Failure\n"));
208 DEBUG ((EFI_D_VERBOSE
, "Access Denied\n"));
219 Create PRP lists for data transfer which is larger than 2 memory pages.
220 Note here we calcuate the number of required PRP lists and allocate them at one time.
222 @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.
223 @param[in] PhysicalAddr The physical base address of data buffer.
224 @param[in] Pages The number of pages to be transfered.
225 @param[out] PrpListHost The host base address of PRP lists.
226 @param[in,out] PrpListNo The number of PRP List.
227 @param[out] Mapping The mapping value returned from PciIo.Map().
229 @retval The pointer to the first PRP List of the PRP lists.
234 IN EFI_PCI_IO_PROTOCOL
*PciIo
,
235 IN EFI_PHYSICAL_ADDRESS PhysicalAddr
,
237 OUT VOID
**PrpListHost
,
238 IN OUT UINTN
*PrpListNo
,
247 EFI_PHYSICAL_ADDRESS PrpListPhyAddr
;
252 // The number of Prp Entry in a memory page.
254 PrpEntryNo
= EFI_PAGE_SIZE
/ sizeof (UINT64
);
257 // Calculate total PrpList number.
259 *PrpListNo
= (UINTN
)DivU64x64Remainder ((UINT64
)Pages
, (UINT64
)PrpEntryNo
- 1, &Remainder
);
260 if (*PrpListNo
== 0) {
262 } else if ((Remainder
!= 0) && (Remainder
!= 1)) {
264 } else if (Remainder
== 1) {
265 Remainder
= PrpEntryNo
;
266 } else if (Remainder
== 0) {
267 Remainder
= PrpEntryNo
- 1;
270 Status
= PciIo
->AllocateBuffer (
279 if (EFI_ERROR (Status
)) {
283 Bytes
= EFI_PAGES_TO_SIZE (*PrpListNo
);
284 Status
= PciIo
->Map (
286 EfiPciIoOperationBusMasterCommonBuffer
,
293 if (EFI_ERROR (Status
) || (Bytes
!= EFI_PAGES_TO_SIZE (*PrpListNo
))) {
294 DEBUG ((EFI_D_ERROR
, "NvmeCreatePrpList: create PrpList failure!\n"));
298 // Fill all PRP lists except of last one.
300 ZeroMem (*PrpListHost
, Bytes
);
301 for (PrpListIndex
= 0; PrpListIndex
< *PrpListNo
- 1; ++PrpListIndex
) {
302 PrpListBase
= *(UINT64
*)PrpListHost
+ PrpListIndex
* EFI_PAGE_SIZE
;
304 for (PrpEntryIndex
= 0; PrpEntryIndex
< PrpEntryNo
; ++PrpEntryIndex
) {
305 if (PrpEntryIndex
!= PrpEntryNo
- 1) {
307 // Fill all PRP entries except of last one.
309 *((UINT64
*)(UINTN
)PrpListBase
+ PrpEntryIndex
) = PhysicalAddr
;
310 PhysicalAddr
+= EFI_PAGE_SIZE
;
313 // Fill last PRP entries with next PRP List pointer.
315 *((UINT64
*)(UINTN
)PrpListBase
+ PrpEntryIndex
) = PrpListPhyAddr
+ (PrpListIndex
+ 1) * EFI_PAGE_SIZE
;
320 // Fill last PRP list.
322 PrpListBase
= *(UINT64
*)PrpListHost
+ PrpListIndex
* EFI_PAGE_SIZE
;
323 for (PrpEntryIndex
= 0; PrpEntryIndex
< Remainder
; ++PrpEntryIndex
) {
324 *((UINT64
*)(UINTN
)PrpListBase
+ PrpEntryIndex
) = PhysicalAddr
;
325 PhysicalAddr
+= EFI_PAGE_SIZE
;
328 return (VOID
*)(UINTN
)PrpListPhyAddr
;
331 PciIo
->FreeBuffer (PciIo
, *PrpListNo
, *PrpListHost
);
337 Sends an NVM Express Command Packet to an NVM Express controller or namespace. This function supports
338 both blocking I/O and nonblocking I/O. The blocking I/O functionality is required, and the nonblocking
339 I/O functionality is optional.
341 @param[in] This A pointer to the NVM_EXPRESS_PASS_THRU_PROTOCOL instance.
342 @param[in] NamespaceId Is a 32 bit Namespace ID to which the Express HCI command packet will be sent.
343 A value of 0 denotes the NVM Express controller, a value of all 0FFh in the namespace
344 ID specifies that the command packet should be sent to all valid namespaces.
345 @param[in] NamespaceUuid Is a 64 bit Namespace UUID to which the Express HCI command packet will be sent.
346 A value of 0 denotes the NVM Express controller, a value of all 0FFh in the namespace
347 UUID specifies that the command packet should be sent to all valid namespaces.
348 @param[in,out] Packet A pointer to the NVM Express HCI Command Packet to send to the NVMe namespace specified
350 @param[in] Event If nonblocking I/O is not supported then Event is ignored, and blocking I/O is performed.
351 If Event is NULL, then blocking I/O is performed. If Event is not NULL and non blocking I/O
352 is supported, then nonblocking I/O is performed, and Event will be signaled when the NVM
353 Express Command Packet completes.
355 @retval EFI_SUCCESS The NVM Express Command Packet was sent by the host. TransferLength bytes were transferred
356 to, or from DataBuffer.
357 @retval EFI_BAD_BUFFER_SIZE The NVM Express Command Packet was not executed. The number of bytes that could be transferred
358 is returned in TransferLength.
359 @retval EFI_NOT_READY The NVM Express Command Packet could not be sent because the controller is not ready. The caller
360 may retry again later.
361 @retval EFI_DEVICE_ERROR A device error occurred while attempting to send the NVM Express Command Packet.
362 @retval EFI_INVALID_PARAMETER Namespace, or the contents of NVM_EXPRESS_PASS_THRU_COMMAND_PACKET are invalid. The NVM
363 Express Command Packet was not sent, so no additional status information is available.
364 @retval EFI_UNSUPPORTED The command described by the NVM Express Command Packet is not supported by the host adapter.
365 The NVM Express Command Packet was not sent, so no additional status information is available.
366 @retval EFI_TIMEOUT A timeout occurred while waiting for the NVM Express Command Packet to execute.
372 IN NVM_EXPRESS_PASS_THRU_PROTOCOL
*This
,
373 IN UINT32 NamespaceId
,
374 IN UINT64 NamespaceUuid
,
375 IN OUT NVM_EXPRESS_PASS_THRU_COMMAND_PACKET
*Packet
,
376 IN EFI_EVENT Event OPTIONAL
379 NVME_CONTROLLER_PRIVATE_DATA
*Private
;
381 EFI_PCI_IO_PROTOCOL
*PciIo
;
387 EFI_EVENT TimerEvent
;
388 EFI_PCI_IO_PROTOCOL_OPERATION Flag
;
389 EFI_PHYSICAL_ADDRESS PhyAddr
;
400 // check the data fields in Packet parameter.
402 if ((This
== NULL
) || (Packet
== NULL
)) {
403 return EFI_INVALID_PARAMETER
;
406 if ((Packet
->NvmeCmd
== NULL
) || (Packet
->NvmeResponse
== NULL
)) {
407 return EFI_INVALID_PARAMETER
;
410 if (Packet
->QueueId
!= NVME_ADMIN_QUEUE
&& Packet
->QueueId
!= NVME_IO_QUEUE
) {
411 return EFI_INVALID_PARAMETER
;
414 Private
= NVME_CONTROLLER_PRIVATE_DATA_FROM_PASS_THRU (This
);
415 PciIo
= Private
->PciIo
;
423 Status
= EFI_SUCCESS
;
425 Qid
= Packet
->QueueId
;
426 Sq
= Private
->SqBuffer
[Qid
] + Private
->SqTdbl
[Qid
].Sqt
;
427 Cq
= Private
->CqBuffer
[Qid
] + Private
->CqHdbl
[Qid
].Cqh
;
429 if (Packet
->NvmeCmd
->Nsid
!= NamespaceId
) {
430 return EFI_INVALID_PARAMETER
;
433 ZeroMem (Sq
, sizeof (NVME_SQ
));
434 Sq
->Opc
= Packet
->NvmeCmd
->Cdw0
.Opcode
;
435 Sq
->Fuse
= Packet
->NvmeCmd
->Cdw0
.FusedOperation
;
436 Sq
->Cid
= Packet
->NvmeCmd
->Cdw0
.Cid
;
437 Sq
->Nsid
= Packet
->NvmeCmd
->Nsid
;
440 // Currently we only support PRP for data transfer, SGL is NOT supported.
442 ASSERT (Sq
->Psdt
== 0);
444 DEBUG ((EFI_D_ERROR
, "NvmExpressPassThru: doesn't support SGL mechanism\n"));
445 return EFI_UNSUPPORTED
;
448 Sq
->Prp
[0] = (UINT64
)(UINTN
)Packet
->TransferBuffer
;
450 // If the NVMe cmd has data in or out, then mapping the user buffer to the PCI controller specific addresses.
451 // Note here we don't handle data buffer for CreateIOSubmitionQueue and CreateIOCompletionQueue cmds because
452 // these two cmds are special which requires their data buffer must support simultaneous access by both the
453 // processor and a PCI Bus Master. It's caller's responsbility to ensure this.
455 if (((Sq
->Opc
& (BIT0
| BIT1
)) != 0) && (Sq
->Opc
!= NVME_ADMIN_CRIOCQ_OPC
) && (Sq
->Opc
!= NVME_ADMIN_CRIOSQ_OPC
)) {
456 if ((Sq
->Opc
& BIT0
) != 0) {
457 Flag
= EfiPciIoOperationBusMasterRead
;
459 Flag
= EfiPciIoOperationBusMasterWrite
;
462 MapLength
= Packet
->TransferLength
;
463 Status
= PciIo
->Map (
466 Packet
->TransferBuffer
,
471 if (EFI_ERROR (Status
) || (Packet
->TransferLength
!= MapLength
)) {
472 return EFI_OUT_OF_RESOURCES
;
475 Sq
->Prp
[0] = PhyAddr
;
478 MapLength
= Packet
->MetadataLength
;
479 if(Packet
->MetadataBuffer
!= NULL
) {
480 MapLength
= Packet
->MetadataLength
;
481 Status
= PciIo
->Map (
484 Packet
->MetadataBuffer
,
489 if (EFI_ERROR (Status
) || (Packet
->MetadataLength
!= MapLength
)) {
495 return EFI_OUT_OF_RESOURCES
;
501 // If the buffer size spans more than two memory pages (page size as defined in CC.Mps),
502 // then build a PRP list in the second PRP submission queue entry.
504 Offset
= ((UINT16
)Sq
->Prp
[0]) & (EFI_PAGE_SIZE
- 1);
505 Bytes
= Packet
->TransferLength
;
507 if ((Offset
+ Bytes
) > (EFI_PAGE_SIZE
* 2)) {
509 // Create PrpList for remaining data buffer.
511 PhyAddr
= (Sq
->Prp
[0] + EFI_PAGE_SIZE
) & ~(EFI_PAGE_SIZE
- 1);
512 Prp
= NvmeCreatePrpList (PciIo
, PhyAddr
, EFI_SIZE_TO_PAGES(Offset
+ Bytes
) - 1, &PrpListHost
, &PrpListNo
, &MapPrpList
);
517 Sq
->Prp
[1] = (UINT64
)(UINTN
)Prp
;
518 } else if ((Offset
+ Bytes
) > EFI_PAGE_SIZE
) {
519 Sq
->Prp
[1] = (Sq
->Prp
[0] + EFI_PAGE_SIZE
) & ~(EFI_PAGE_SIZE
- 1);
522 if(Packet
->NvmeCmd
->Flags
& CDW10_VALID
) {
523 Sq
->Payload
.Raw
.Cdw10
= Packet
->NvmeCmd
->Cdw10
;
525 if(Packet
->NvmeCmd
->Flags
& CDW11_VALID
) {
526 Sq
->Payload
.Raw
.Cdw11
= Packet
->NvmeCmd
->Cdw11
;
528 if(Packet
->NvmeCmd
->Flags
& CDW12_VALID
) {
529 Sq
->Payload
.Raw
.Cdw12
= Packet
->NvmeCmd
->Cdw12
;
531 if(Packet
->NvmeCmd
->Flags
& CDW13_VALID
) {
532 Sq
->Payload
.Raw
.Cdw13
= Packet
->NvmeCmd
->Cdw13
;
534 if(Packet
->NvmeCmd
->Flags
& CDW14_VALID
) {
535 Sq
->Payload
.Raw
.Cdw14
= Packet
->NvmeCmd
->Cdw14
;
537 if(Packet
->NvmeCmd
->Flags
& CDW15_VALID
) {
538 Sq
->Payload
.Raw
.Cdw15
= Packet
->NvmeCmd
->Cdw15
;
542 // Ring the submission queue doorbell.
544 Private
->SqTdbl
[Qid
].Sqt
^= 1;
545 Data
= ReadUnaligned32 ((UINT32
*)&Private
->SqTdbl
[Qid
]);
550 NVME_SQTDBL_OFFSET(Qid
, Private
->Cap
.Dstrd
),
555 Status
= gBS
->CreateEvent (
562 if (EFI_ERROR (Status
)) {
566 Status
= gBS
->SetTimer(TimerEvent
, TimerRelative
, Packet
->CommandTimeout
);
568 if (EFI_ERROR(Status
)) {
569 Packet
->ControllerStatus
= NVM_EXPRESS_STATUS_CONTROLLER_DEVICE_ERROR
;
574 // Wait for completion queue to get filled in.
576 Status
= EFI_TIMEOUT
;
577 Packet
->ControllerStatus
= NVM_EXPRESS_STATUS_CONTROLLER_TIMEOUT_COMMAND
;
578 while (EFI_ERROR (gBS
->CheckEvent (TimerEvent
))) {
579 if (Cq
->Pt
!= Private
->Pt
[Qid
]) {
580 Status
= EFI_SUCCESS
;
581 Packet
->ControllerStatus
= NVM_EXPRESS_STATUS_CONTROLLER_READY
;
586 if ((Private
->CqHdbl
[Qid
].Cqh
^= 1) == 0) {
587 Private
->Pt
[Qid
] ^= 1;
591 // Copy the Respose Queue entry for this command to the callers response buffer
593 CopyMem(Packet
->NvmeResponse
, Cq
, sizeof(NVM_EXPRESS_RESPONSE
));
596 // Dump every completion entry status for debugging.
602 Data
= ReadUnaligned32 ((UINT32
*)&Private
->CqHdbl
[Qid
]);
607 NVME_CQHDBL_OFFSET(Qid
, Private
->Cap
.Dstrd
),
613 if (MapData
!= NULL
) {
620 if (MapMeta
!= NULL
) {
627 if (MapPrpList
!= NULL
) {
635 PciIo
->FreeBuffer (PciIo
, PrpListNo
, PrpListHost
);
638 if (TimerEvent
!= NULL
) {
639 gBS
->CloseEvent (TimerEvent
);
645 Used to retrieve the list of namespaces defined on an NVM Express controller.
647 The NVM_EXPRESS_PASS_THRU_PROTOCOL.GetNextNamespace() function retrieves a list of namespaces
648 defined on an NVM Express controller. If on input a NamespaceID is specified by all 0xFF in the
649 namespace buffer, then the first namespace defined on the NVM Express controller is returned in
650 NamespaceID, and a status of EFI_SUCCESS is returned.
652 If NamespaceId is a Namespace value that was returned on a previous call to GetNextNamespace(),
653 then the next valid NamespaceId for an NVM Express SSD namespace on the NVM Express controller
654 is returned in NamespaceId, and EFI_SUCCESS is returned.
656 If Namespace array is not a 0xFFFFFFFF and NamespaceId was not returned on a previous call to
657 GetNextNamespace(), then EFI_INVALID_PARAMETER is returned.
659 If NamespaceId is the NamespaceId of the last SSD namespace on the NVM Express controller, then
660 EFI_NOT_FOUND is returned
662 @param[in] This A pointer to the NVM_EXPRESS_PASS_THRU_PROTOCOL instance.
663 @param[in,out] NamespaceId On input, a pointer to a legal NamespaceId for an NVM Express
664 namespace present on the NVM Express controller. On output, a
665 pointer to the next NamespaceId of an NVM Express namespace on
666 an NVM Express controller. An input value of 0xFFFFFFFF retrieves
667 the first NamespaceId for an NVM Express namespace present on an
668 NVM Express controller.
669 @param[out] NamespaceUuid On output, the UUID associated with the next namespace, if a UUID
670 is defined for that NamespaceId, otherwise, zero is returned in
671 this parameter. If the caller does not require a UUID, then a NULL
672 pointer may be passed.
674 @retval EFI_SUCCESS The NamespaceId of the next Namespace was returned.
675 @retval EFI_NOT_FOUND There are no more namespaces defined on this controller.
676 @retval EFI_INVALID_PARAMETER Namespace array is not a 0xFFFFFFFF and NamespaceId was not returned
677 on a previous call to GetNextNamespace().
682 NvmExpressGetNextNamespace (
683 IN NVM_EXPRESS_PASS_THRU_PROTOCOL
*This
,
684 IN OUT UINT32
*NamespaceId
,
685 OUT UINT64
*NamespaceUuid OPTIONAL
688 NVME_CONTROLLER_PRIVATE_DATA
*Private
;
689 NVME_ADMIN_NAMESPACE_DATA
*NamespaceData
;
690 UINT32 NextNamespaceId
;
693 if ((This
== NULL
) || (NamespaceId
== NULL
)) {
694 return EFI_INVALID_PARAMETER
;
697 NamespaceData
= NULL
;
698 Status
= EFI_NOT_FOUND
;
700 Private
= NVME_CONTROLLER_PRIVATE_DATA_FROM_PASS_THRU (This
);
702 // If the NamespaceId input value is 0xFFFFFFFF, then get the first valid namespace ID
704 if (*NamespaceId
== 0xFFFFFFFF) {
706 // Start with the first namespace ID
710 // Allocate buffer for Identify Namespace data.
712 NamespaceData
= (NVME_ADMIN_NAMESPACE_DATA
*)AllocateZeroPool (sizeof (NVME_ADMIN_NAMESPACE_DATA
));
714 if (NamespaceData
== NULL
) {
715 return EFI_NOT_FOUND
;
718 Status
= NvmeIdentifyNamespace (Private
, NextNamespaceId
, NamespaceData
);
719 if (EFI_ERROR(Status
)) {
723 *NamespaceId
= NextNamespaceId
;
724 if (NamespaceUuid
!= NULL
) {
725 *NamespaceUuid
= NamespaceData
->Eui64
;
728 if (*NamespaceId
>= Private
->ControllerData
->Nn
) {
729 return EFI_INVALID_PARAMETER
;
732 NextNamespaceId
= *NamespaceId
+ 1;
734 // Allocate buffer for Identify Namespace data.
736 NamespaceData
= (NVME_ADMIN_NAMESPACE_DATA
*)AllocateZeroPool (sizeof (NVME_ADMIN_NAMESPACE_DATA
));
737 if (NamespaceData
== NULL
) {
738 return EFI_NOT_FOUND
;
741 Status
= NvmeIdentifyNamespace (Private
, NextNamespaceId
, NamespaceData
);
742 if (EFI_ERROR(Status
)) {
746 *NamespaceId
= NextNamespaceId
;
747 if (NamespaceUuid
!= NULL
) {
748 *NamespaceUuid
= NamespaceData
->Eui64
;
753 if (NamespaceData
!= NULL
) {
754 FreePool(NamespaceData
);
761 Used to translate a device path node to a Namespace ID and Namespace UUID.
763 The NVM_EXPRESS_PASS_THRU_PROTOCOL.GetNamwspace() function determines the Namespace ID and Namespace UUID
764 associated with the NVM Express SSD namespace described by DevicePath. If DevicePath is a device path node type
765 that the NVM Express Pass Thru driver supports, then the NVM Express Pass Thru driver will attempt to translate
766 the contents DevicePath into a Namespace ID and UUID. If this translation is successful, then that Namespace ID
767 and UUID are returned in NamespaceID and NamespaceUUID, and EFI_SUCCESS is returned.
769 @param[in] This A pointer to the NVM_EXPRESS_PASS_THRU_PROTOCOL instance.
770 @param[in] DevicePath A pointer to the device path node that describes an NVM Express namespace on
771 the NVM Express controller.
772 @param[out] NamespaceId The NVM Express namespace ID contained in the device path node.
773 @param[out] NamespaceUuid The NVM Express namespace contained in the device path node.
775 @retval EFI_SUCCESS DevicePath was successfully translated to NamespaceId and NamespaceUuid.
776 @retval EFI_INVALID_PARAMETER If DevicePath, NamespaceId, or NamespaceUuid are NULL, then EFI_INVALID_PARAMETER
778 @retval EFI_UNSUPPORTED If DevicePath is not a device path node type that the NVM Express Pass Thru driver
779 supports, then EFI_UNSUPPORTED is returned.
780 @retval EFI_NOT_FOUND If DevicePath is a device path node type that the Nvm Express Pass Thru driver
781 supports, but there is not a valid translation from DevicePath to a NamespaceID
782 and NamespaceUuid, then EFI_NOT_FOUND is returned.
786 NvmExpressGetNamespace (
787 IN NVM_EXPRESS_PASS_THRU_PROTOCOL
*This
,
788 IN EFI_DEVICE_PATH_PROTOCOL
*DevicePath
,
789 OUT UINT32
*NamespaceId
,
790 OUT UINT64
*NamespaceUuid
793 NVME_NAMESPACE_DEVICE_PATH
*Node
;
795 if ((This
== NULL
) || (DevicePath
== NULL
) || (NamespaceId
== NULL
) || (NamespaceUuid
== NULL
)) {
796 return EFI_INVALID_PARAMETER
;
799 if (DevicePath
->Type
!= MESSAGING_DEVICE_PATH
) {
800 return EFI_UNSUPPORTED
;
803 Node
= (NVME_NAMESPACE_DEVICE_PATH
*)DevicePath
;
805 if (DevicePath
->SubType
== MSG_NVME_NAMESPACE_DP
) {
806 if (DevicePathNodeLength(DevicePath
) != sizeof(NVME_NAMESPACE_DEVICE_PATH
)) {
807 return EFI_NOT_FOUND
;
810 *NamespaceId
= Node
->NamespaceId
;
811 *NamespaceUuid
= Node
->NamespaceUuid
;
815 return EFI_UNSUPPORTED
;
820 Used to allocate and build a device path node for an NVM Express namespace on an NVM Express controller.
822 The NVM_EXPRESS_PASS_THRU_PROTOCOL.BuildDevicePath() function allocates and builds a single device
823 path node for the NVM Express namespace specified by NamespaceId.
825 If the namespace device specified by NamespaceId is not valid , then EFI_NOT_FOUND is returned.
827 If DevicePath is NULL, then EFI_INVALID_PARAMETER is returned.
829 If there are not enough resources to allocate the device path node, then EFI_OUT_OF_RESOURCES is returned.
831 Otherwise, DevicePath is allocated with the boot service AllocatePool(), the contents of DevicePath are
832 initialized to describe the NVM Express namespace specified by NamespaceId, and EFI_SUCCESS is returned.
834 @param[in] This A pointer to the NVM_EXPRESS_PASS_THRU_PROTOCOL instance.
835 @param[in] NamespaceId The NVM Express namespace ID for which a device path node is to be
836 allocated and built. Caller must set the NamespaceId to zero if the
837 device path node will contain a valid UUID.
838 @param[in] NamespaceUuid The NVM Express namespace UUID for which a device path node is to be
839 allocated and built. UUID will only be valid of the Namespace ID is zero.
840 @param[in,out] DevicePath A pointer to a single device path node that describes the NVM Express
841 namespace specified by NamespaceId. This function is responsible for
842 allocating the buffer DevicePath with the boot service AllocatePool().
843 It is the caller's responsibility to free DevicePath when the caller
844 is finished with DevicePath.
845 @retval EFI_SUCCESS The device path node that describes the NVM Express namespace specified
846 by NamespaceId was allocated and returned in DevicePath.
847 @retval EFI_NOT_FOUND The NVM Express namespace specified by NamespaceId does not exist on the
848 NVM Express controller.
849 @retval EFI_INVALID_PARAMETER DevicePath is NULL.
850 @retval EFI_OUT_OF_RESOURCES There are not enough resources to allocate the DevicePath node.
855 NvmExpressBuildDevicePath (
856 IN NVM_EXPRESS_PASS_THRU_PROTOCOL
*This
,
857 IN UINT32 NamespaceId
,
858 IN UINT64 NamespaceUuid
,
859 IN OUT EFI_DEVICE_PATH_PROTOCOL
**DevicePath
862 NVME_NAMESPACE_DEVICE_PATH
*Node
;
865 // Validate parameters
867 if ((This
== NULL
) || (DevicePath
== NULL
)) {
868 return EFI_INVALID_PARAMETER
;
871 if (NamespaceId
== 0) {
872 return EFI_NOT_FOUND
;
875 Node
= (NVME_NAMESPACE_DEVICE_PATH
*)AllocateZeroPool (sizeof (NVME_NAMESPACE_DEVICE_PATH
));
878 return EFI_OUT_OF_RESOURCES
;
881 Node
->Header
.Type
= MESSAGING_DEVICE_PATH
;
882 Node
->Header
.SubType
= MSG_NVME_NAMESPACE_DP
;
883 SetDevicePathNodeLength (&Node
->Header
, sizeof (NVME_NAMESPACE_DEVICE_PATH
));
884 Node
->NamespaceId
= NamespaceId
;
885 Node
->NamespaceUuid
= NamespaceUuid
;
887 *DevicePath
= (EFI_DEVICE_PATH_PROTOCOL
*)Node
;