MdeModulePkg/Bus/Pci/NvmExpressDxe/NvmExpressPassthru.c

   1 /** @file
   2   NvmExpressDxe driver is used to manage non-volatile memory subsystem which follows
   3   NVM Express specification.
   4
   5   (C) Copyright 2014 Hewlett-Packard Development Company, L.P.<BR>
   6   Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>
   7   This program and the accompanying materials
   8   are licensed and made available under the terms and conditions of the BSD License
   9   which accompanies this distribution.  The full text of the license may be found at
  10   http://opensource.org/licenses/bsd-license.php.
  11
  12   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  13   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  14
  15 **/
  16
  17 #include "NvmExpress.h"
  18
  19 /**
  20   Dump the execution status from a given completion queue entry.
  21
  22   @param[in]     Cq               A pointer to the NVME_CQ item.
  23
  24 **/
  25 VOID
  26 NvmeDumpStatus (
  27   IN NVME_CQ             *Cq
  28   )
  29 {
  30   DEBUG ((EFI_D_VERBOSE, "Dump NVMe Completion Entry Status from [0x%x]:\n", Cq));
  31
  32   DEBUG ((EFI_D_VERBOSE, "  SQ Identifier : [0x%x], Phase Tag : [%d], Cmd Identifier : [0x%x]\n", Cq->Sqid, Cq->Pt, Cq->Cid));
  33
  34   DEBUG ((EFI_D_VERBOSE, "  NVMe Cmd Execution Result - "));
  35
  36   switch (Cq->Sct) {
  37     case 0x0:
  38       switch (Cq->Sc) {
  39         case 0x0:
  40           DEBUG ((EFI_D_VERBOSE, "Successful Completion\n"));
  41           break;
  42         case 0x1:
  43           DEBUG ((EFI_D_VERBOSE, "Invalid Command Opcode\n"));
  44           break;
  45         case 0x2:
  46           DEBUG ((EFI_D_VERBOSE, "Invalid Field in Command\n"));
  47           break;
  48         case 0x3:
  49           DEBUG ((EFI_D_VERBOSE, "Command ID Conflict\n"));
  50           break;
  51         case 0x4:
  52           DEBUG ((EFI_D_VERBOSE, "Data Transfer Error\n"));
  53           break;
  54         case 0x5:
  55           DEBUG ((EFI_D_VERBOSE, "Commands Aborted due to Power Loss Notification\n"));
  56           break;
  57         case 0x6:
  58           DEBUG ((EFI_D_VERBOSE, "Internal Device Error\n"));
  59           break;
  60         case 0x7:
  61           DEBUG ((EFI_D_VERBOSE, "Command Abort Requested\n"));
  62           break;
  63         case 0x8:
  64           DEBUG ((EFI_D_VERBOSE, "Command Aborted due to SQ Deletion\n"));
  65           break;
  66         case 0x9:
  67           DEBUG ((EFI_D_VERBOSE, "Command Aborted due to Failed Fused Command\n"));
  68           break;
  69         case 0xA:
  70           DEBUG ((EFI_D_VERBOSE, "Command Aborted due to Missing Fused Command\n"));
  71           break;
  72         case 0xB:
  73           DEBUG ((EFI_D_VERBOSE, "Invalid Namespace or Format\n"));
  74           break;
  75         case 0xC:
  76           DEBUG ((EFI_D_VERBOSE, "Command Sequence Error\n"));
  77           break;
  78         case 0xD:
  79           DEBUG ((EFI_D_VERBOSE, "Invalid SGL Last Segment Descriptor\n"));
  80           break;
  81         case 0xE:
  82           DEBUG ((EFI_D_VERBOSE, "Invalid Number of SGL Descriptors\n"));
  83           break;
  84         case 0xF:
  85           DEBUG ((EFI_D_VERBOSE, "Data SGL Length Invalid\n"));
  86           break;
  87         case 0x10:
  88           DEBUG ((EFI_D_VERBOSE, "Metadata SGL Length Invalid\n"));
  89           break;
  90         case 0x11:
  91           DEBUG ((EFI_D_VERBOSE, "SGL Descriptor Type Invalid\n"));
  92           break;
  93         case 0x80:
  94           DEBUG ((EFI_D_VERBOSE, "LBA Out of Range\n"));
  95           break;
  96         case 0x81:
  97           DEBUG ((EFI_D_VERBOSE, "Capacity Exceeded\n"));
  98           break;
  99         case 0x82:
 100           DEBUG ((EFI_D_VERBOSE, "Namespace Not Ready\n"));
 101           break;
 102         case 0x83:
 103           DEBUG ((EFI_D_VERBOSE, "Reservation Conflict\n"));
 104           break;
 105       }
 106       break;
 107
 108     case 0x1:
 109       switch (Cq->Sc) {
 110         case 0x0:
 111           DEBUG ((EFI_D_VERBOSE, "Completion Queue Invalid\n"));
 112           break;
 113         case 0x1:
 114           DEBUG ((EFI_D_VERBOSE, "Invalid Queue Identifier\n"));
 115           break;
 116         case 0x2:
 117           DEBUG ((EFI_D_VERBOSE, "Maximum Queue Size Exceeded\n"));
 118           break;
 119         case 0x3:
 120           DEBUG ((EFI_D_VERBOSE, "Abort Command Limit Exceeded\n"));
 121           break;
 122         case 0x5:
 123           DEBUG ((EFI_D_VERBOSE, "Asynchronous Event Request Limit Exceeded\n"));
 124           break;
 125         case 0x6:
 126           DEBUG ((EFI_D_VERBOSE, "Invalid Firmware Slot\n"));
 127           break;
 128         case 0x7:
 129           DEBUG ((EFI_D_VERBOSE, "Invalid Firmware Image\n"));
 130           break;
 131         case 0x8:
 132           DEBUG ((EFI_D_VERBOSE, "Invalid Interrupt Vector\n"));
 133           break;
 134         case 0x9:
 135           DEBUG ((EFI_D_VERBOSE, "Invalid Log Page\n"));
 136           break;
 137         case 0xA:
 138           DEBUG ((EFI_D_VERBOSE, "Invalid Format\n"));
 139           break;
 140         case 0xB:
 141           DEBUG ((EFI_D_VERBOSE, "Firmware Application Requires Conventional Reset\n"));
 142           break;
 143         case 0xC:
 144           DEBUG ((EFI_D_VERBOSE, "Invalid Queue Deletion\n"));
 145           break;
 146         case 0xD:
 147           DEBUG ((EFI_D_VERBOSE, "Feature Identifier Not Saveable\n"));
 148           break;
 149         case 0xE:
 150           DEBUG ((EFI_D_VERBOSE, "Feature Not Changeable\n"));
 151           break;
 152         case 0xF:
 153           DEBUG ((EFI_D_VERBOSE, "Feature Not Namespace Specific\n"));
 154           break;
 155         case 0x10:
 156           DEBUG ((EFI_D_VERBOSE, "Firmware Application Requires NVM Subsystem Reset\n"));
 157           break;
 158         case 0x80:
 159           DEBUG ((EFI_D_VERBOSE, "Conflicting Attributes\n"));
 160           break;
 161         case 0x81:
 162           DEBUG ((EFI_D_VERBOSE, "Invalid Protection Information\n"));
 163           break;
 164         case 0x82:
 165           DEBUG ((EFI_D_VERBOSE, "Attempted Write to Read Only Range\n"));
 166           break;
 167       }
 168       break;
 169
 170     case 0x2:
 171       switch (Cq->Sc) {
 172         case 0x80:
 173           DEBUG ((EFI_D_VERBOSE, "Write Fault\n"));
 174           break;
 175         case 0x81:
 176           DEBUG ((EFI_D_VERBOSE, "Unrecovered Read Error\n"));
 177           break;
 178         case 0x82:
 179           DEBUG ((EFI_D_VERBOSE, "End-to-end Guard Check Error\n"));
 180           break;
 181         case 0x83:
 182           DEBUG ((EFI_D_VERBOSE, "End-to-end Application Tag Check Error\n"));
 183           break;
 184         case 0x84:
 185           DEBUG ((EFI_D_VERBOSE, "End-to-end Reference Tag Check Error\n"));
 186           break;
 187         case 0x85:
 188           DEBUG ((EFI_D_VERBOSE, "Compare Failure\n"));
 189           break;
 190         case 0x86:
 191           DEBUG ((EFI_D_VERBOSE, "Access Denied\n"));
 192           break;
 193       }
 194       break;
 195
 196     default:
 197       break;
 198   }
 199 }
 200
 201 /**
 202   Create PRP lists for data transfer which is larger than 2 memory pages.
 203   Note here we calcuate the number of required PRP lists and allocate them at one time.
 204
 205   @param[in]     PciIo               A pointer to the EFI_PCI_IO_PROTOCOL instance.
 206   @param[in]     PhysicalAddr        The physical base address of data buffer.
 207   @param[in]     Pages               The number of pages to be transfered.
 208   @param[out]    PrpListHost         The host base address of PRP lists.
 209   @param[in,out] PrpListNo           The number of PRP List.
 210   @param[out]    Mapping             The mapping value returned from PciIo.Map().
 211
 212   @retval The pointer to the first PRP List of the PRP lists.
 213
 214 **/
 215 VOID*
 216 NvmeCreatePrpList (
 217   IN     EFI_PCI_IO_PROTOCOL          *PciIo,
 218   IN     EFI_PHYSICAL_ADDRESS         PhysicalAddr,
 219   IN     UINTN                        Pages,
 220      OUT VOID                         **PrpListHost,
 221   IN OUT UINTN                        *PrpListNo,
 222      OUT VOID                         **Mapping
 223   )
 224 {
 225   UINTN                       PrpEntryNo;
 226   UINT64                      PrpListBase;
 227   UINTN                       PrpListIndex;
 228   UINTN                       PrpEntryIndex;
 229   UINT64                      Remainder;
 230   EFI_PHYSICAL_ADDRESS        PrpListPhyAddr;
 231   UINTN                       Bytes;
 232   EFI_STATUS                  Status;
 233
 234   //
 235   // The number of Prp Entry in a memory page.
 236   //
 237   PrpEntryNo = EFI_PAGE_SIZE / sizeof (UINT64);
 238
 239   //
 240   // Calculate total PrpList number.
 241   //
 242   *PrpListNo = (UINTN)DivU64x64Remainder ((UINT64)Pages, (UINT64)PrpEntryNo - 1, &Remainder);
 243   if (*PrpListNo == 0) {
 244     *PrpListNo = 1;
 245   } else if ((Remainder != 0) && (Remainder != 1)) {
 246     *PrpListNo += 1;
 247   } else if (Remainder == 1) {
 248     Remainder = PrpEntryNo;
 249   } else if (Remainder == 0) {
 250     Remainder = PrpEntryNo - 1;
 251   }
 252
 253   Status = PciIo->AllocateBuffer (
 254                     PciIo,
 255                     AllocateAnyPages,
 256                     EfiBootServicesData,
 257                     *PrpListNo,
 258                     PrpListHost,
 259                     0
 260                     );
 261
 262   if (EFI_ERROR (Status)) {
 263     return NULL;
 264   }
 265
 266   Bytes = EFI_PAGES_TO_SIZE (*PrpListNo);
 267   Status = PciIo->Map (
 268                     PciIo,
 269                     EfiPciIoOperationBusMasterCommonBuffer,
 270                     *PrpListHost,
 271                     &Bytes,
 272                     &PrpListPhyAddr,
 273                     Mapping
 274                     );
 275
 276   if (EFI_ERROR (Status) || (Bytes != EFI_PAGES_TO_SIZE (*PrpListNo))) {
 277     DEBUG ((EFI_D_ERROR, "NvmeCreatePrpList: create PrpList failure!\n"));
 278     goto EXIT;
 279   }
 280   //
 281   // Fill all PRP lists except of last one.
 282   //
 283   ZeroMem (*PrpListHost, Bytes);
 284   for (PrpListIndex = 0; PrpListIndex < *PrpListNo - 1; ++PrpListIndex) {
 285     PrpListBase = *(UINT64*)PrpListHost + PrpListIndex * EFI_PAGE_SIZE;
 286
 287     for (PrpEntryIndex = 0; PrpEntryIndex < PrpEntryNo; ++PrpEntryIndex) {
 288       if (PrpEntryIndex != PrpEntryNo - 1) {
 289         //
 290         // Fill all PRP entries except of last one.
 291         //
 292         *((UINT64*)(UINTN)PrpListBase + PrpEntryIndex) = PhysicalAddr;
 293         PhysicalAddr += EFI_PAGE_SIZE;
 294       } else {
 295         //
 296         // Fill last PRP entries with next PRP List pointer.
 297         //
 298         *((UINT64*)(UINTN)PrpListBase + PrpEntryIndex) = PrpListPhyAddr + (PrpListIndex + 1) * EFI_PAGE_SIZE;
 299       }
 300     }
 301   }
 302   //
 303   // Fill last PRP list.
 304   //
 305   PrpListBase = *(UINT64*)PrpListHost + PrpListIndex * EFI_PAGE_SIZE;
 306   for (PrpEntryIndex = 0; PrpEntryIndex < Remainder; ++PrpEntryIndex) {
 307     *((UINT64*)(UINTN)PrpListBase + PrpEntryIndex) = PhysicalAddr;
 308     PhysicalAddr += EFI_PAGE_SIZE;
 309   }
 310
 311   return (VOID*)(UINTN)PrpListPhyAddr;
 312
 313 EXIT:
 314   PciIo->FreeBuffer (PciIo, *PrpListNo, *PrpListHost);
 315   return NULL;
 316 }
 317
 318
 319 /**
 320   Sends an NVM Express Command Packet to an NVM Express controller or namespace. This function supports
 321   both blocking I/O and non-blocking I/O. The blocking I/O functionality is required, and the non-blocking
 322   I/O functionality is optional.
 323
 324
 325   @param[in]     This                A pointer to the EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL instance.
 326   @param[in]     NamespaceId         A 32 bit namespace ID as defined in the NVMe specification to which the NVM Express Command
 327                                      Packet will be sent.  A value of 0 denotes the NVM Express controller, a value of all 0xFF's
 328                                      (all bytes are 0xFF) in the namespace ID specifies that the command packet should be sent to
 329                                      all valid namespaces.
 330   @param[in,out] Packet              A pointer to the NVM Express Command Packet.
 331   @param[in]     Event               If non-blocking I/O is not supported then Event is ignored, and blocking I/O is performed.
 332                                      If Event is NULL, then blocking I/O is performed. If Event is not NULL and non-blocking I/O
 333                                      is supported, then non-blocking I/O is performed, and Event will be signaled when the NVM
 334                                      Express Command Packet completes.
 335
 336   @retval EFI_SUCCESS                The NVM Express Command Packet was sent by the host. TransferLength bytes were transferred
 337                                      to, or from DataBuffer.
 338   @retval EFI_BAD_BUFFER_SIZE        The NVM Express Command Packet was not executed. The number of bytes that could be transferred
 339                                      is returned in TransferLength.
 340   @retval EFI_NOT_READY              The NVM Express Command Packet could not be sent because the controller is not ready. The caller
 341                                      may retry again later.
 342   @retval EFI_DEVICE_ERROR           A device error occurred while attempting to send the NVM Express Command Packet.
 343   @retval EFI_INVALID_PARAMETER      NamespaceId or the contents of EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET are invalid. The NVM
 344                                      Express Command Packet was not sent, so no additional status information is available.
 345   @retval EFI_UNSUPPORTED            The command described by the NVM Express Command Packet is not supported by the NVM Express
 346                                      controller. The NVM Express Command Packet was not sent so no additional status information
 347                                      is available.
 348   @retval EFI_TIMEOUT                A timeout occurred while waiting for the NVM Express Command Packet to execute.
 349
 350 **/
 351 EFI_STATUS
 352 EFIAPI
 353 NvmExpressPassThru (
 354   IN     EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL          *This,
 355   IN     UINT32                                      NamespaceId,
 356   IN OUT EFI_NVM_EXPRESS_PASS_THRU_COMMAND_PACKET    *Packet,
 357   IN     EFI_EVENT                                   Event OPTIONAL
 358   )
 359 {
 360   NVME_CONTROLLER_PRIVATE_DATA  *Private;
 361   EFI_STATUS                    Status;
 362   EFI_PCI_IO_PROTOCOL           *PciIo;
 363   NVME_SQ                       *Sq;
 364   NVME_CQ                       *Cq;
 365   UINT8                         QueueType;
 366   UINT32                        Bytes;
 367   UINT16                        Offset;
 368   EFI_EVENT                     TimerEvent;
 369   EFI_PCI_IO_PROTOCOL_OPERATION Flag;
 370   EFI_PHYSICAL_ADDRESS          PhyAddr;
 371   VOID                          *MapData;
 372   VOID                          *MapMeta;
 373   VOID                          *MapPrpList;
 374   UINTN                         MapLength;
 375   UINT64                        *Prp;
 376   VOID                          *PrpListHost;
 377   UINTN                         PrpListNo;
 378   UINT32                        Data;
 379
 380   //
 381   // check the data fields in Packet parameter.
 382   //
 383   if ((This == NULL) || (Packet == NULL)) {
 384     return EFI_INVALID_PARAMETER;
 385   }
 386
 387   if ((Packet->NvmeCmd == NULL) || (Packet->NvmeCompletion == NULL)) {
 388     return EFI_INVALID_PARAMETER;
 389   }
 390
 391   if (Packet->QueueType != NVME_ADMIN_QUEUE && Packet->QueueType != NVME_IO_QUEUE) {
 392     return EFI_INVALID_PARAMETER;
 393   }
 394
 395   Private     = NVME_CONTROLLER_PRIVATE_DATA_FROM_PASS_THRU (This);
 396   PciIo       = Private->PciIo;
 397   MapData     = NULL;
 398   MapMeta     = NULL;
 399   MapPrpList  = NULL;
 400   PrpListHost = NULL;
 401   PrpListNo   = 0;
 402   Prp         = NULL;
 403   TimerEvent  = NULL;
 404   Status      = EFI_SUCCESS;
 405
 406   QueueType = Packet->QueueType;
 407   Sq  = Private->SqBuffer[QueueType] + Private->SqTdbl[QueueType].Sqt;
 408   Cq  = Private->CqBuffer[QueueType] + Private->CqHdbl[QueueType].Cqh;
 409
 410   if (Packet->NvmeCmd->Nsid != NamespaceId) {
 411     return EFI_INVALID_PARAMETER;
 412   }
 413
 414   ZeroMem (Sq, sizeof (NVME_SQ));
 415   Sq->Opc  = (UINT8)Packet->NvmeCmd->Cdw0.Opcode;
 416   Sq->Fuse = (UINT8)Packet->NvmeCmd->Cdw0.FusedOperation;
 417   Sq->Cid  = Private->Cid[QueueType]++;
 418   Sq->Nsid = Packet->NvmeCmd->Nsid;
 419
 420   //
 421   // Currently we only support PRP for data transfer, SGL is NOT supported.
 422   //
 423   ASSERT (Sq->Psdt == 0);
 424   if (Sq->Psdt != 0) {
 425     DEBUG ((EFI_D_ERROR, "NvmExpressPassThru: doesn't support SGL mechanism\n"));
 426     return EFI_UNSUPPORTED;
 427   }
 428
 429   Sq->Prp[0] = (UINT64)(UINTN)Packet->TransferBuffer;
 430   //
 431   // If the NVMe cmd has data in or out, then mapping the user buffer to the PCI controller specific addresses.
 432   // Note here we don't handle data buffer for CreateIOSubmitionQueue and CreateIOCompletionQueue cmds because
 433   // these two cmds are special which requires their data buffer must support simultaneous access by both the
 434   // processor and a PCI Bus Master. It's caller's responsbility to ensure this.
 435   //
 436   if (((Sq->Opc & (BIT0 | BIT1)) != 0) && (Sq->Opc != NVME_ADMIN_CRIOCQ_CMD) && (Sq->Opc != NVME_ADMIN_CRIOSQ_CMD)) {
 437     if ((Sq->Opc & BIT0) != 0) {
 438       Flag = EfiPciIoOperationBusMasterRead;
 439     } else {
 440       Flag = EfiPciIoOperationBusMasterWrite;
 441     }
 442
 443     MapLength = Packet->TransferLength;
 444     Status = PciIo->Map (
 445                       PciIo,
 446                       Flag,
 447                       Packet->TransferBuffer,
 448                       &MapLength,
 449                       &PhyAddr,
 450                       &MapData
 451                       );
 452     if (EFI_ERROR (Status) || (Packet->TransferLength != MapLength)) {
 453       return EFI_OUT_OF_RESOURCES;
 454     }
 455
 456     Sq->Prp[0] = PhyAddr;
 457     Sq->Prp[1] = 0;
 458
 459     MapLength = Packet->MetadataLength;
 460     if(Packet->MetadataBuffer != NULL) {
 461       MapLength = Packet->MetadataLength;
 462       Status = PciIo->Map (
 463                         PciIo,
 464                         Flag,
 465                         Packet->MetadataBuffer,
 466                         &MapLength,
 467                         &PhyAddr,
 468                         &MapMeta
 469                         );
 470       if (EFI_ERROR (Status) || (Packet->MetadataLength != MapLength)) {
 471         PciIo->Unmap (
 472                  PciIo,
 473                  MapData
 474                  );
 475
 476         return EFI_OUT_OF_RESOURCES;
 477       }
 478       Sq->Mptr = PhyAddr;
 479     }
 480   }
 481   //
 482   // If the buffer size spans more than two memory pages (page size as defined in CC.Mps),
 483   // then build a PRP list in the second PRP submission queue entry.
 484   //
 485   Offset = ((UINT16)Sq->Prp[0]) & (EFI_PAGE_SIZE - 1);
 486   Bytes  = Packet->TransferLength;
 487
 488   if ((Offset + Bytes) > (EFI_PAGE_SIZE * 2)) {
 489     //
 490     // Create PrpList for remaining data buffer.
 491     //
 492     PhyAddr = (Sq->Prp[0] + EFI_PAGE_SIZE) & ~(EFI_PAGE_SIZE - 1);
 493     Prp = NvmeCreatePrpList (PciIo, PhyAddr, EFI_SIZE_TO_PAGES(Offset + Bytes) - 1, &PrpListHost, &PrpListNo, &MapPrpList);
 494     if (Prp == NULL) {
 495       goto EXIT;
 496     }
 497
 498     Sq->Prp[1] = (UINT64)(UINTN)Prp;
 499   } else if ((Offset + Bytes) > EFI_PAGE_SIZE) {
 500     Sq->Prp[1] = (Sq->Prp[0] + EFI_PAGE_SIZE) & ~(EFI_PAGE_SIZE - 1);
 501   }
 502
 503   if(Packet->NvmeCmd->Flags & CDW2_VALID) {
 504     Sq->Rsvd2 = (UINT64)Packet->NvmeCmd->Cdw2;
 505   }
 506   if(Packet->NvmeCmd->Flags & CDW3_VALID) {
 507     Sq->Rsvd2 |= LShiftU64 ((UINT64)Packet->NvmeCmd->Cdw3, 32);
 508   }
 509   if(Packet->NvmeCmd->Flags & CDW10_VALID) {
 510     Sq->Payload.Raw.Cdw10 = Packet->NvmeCmd->Cdw10;
 511   }
 512   if(Packet->NvmeCmd->Flags & CDW11_VALID) {
 513     Sq->Payload.Raw.Cdw11 = Packet->NvmeCmd->Cdw11;
 514   }
 515   if(Packet->NvmeCmd->Flags & CDW12_VALID) {
 516     Sq->Payload.Raw.Cdw12 = Packet->NvmeCmd->Cdw12;
 517   }
 518   if(Packet->NvmeCmd->Flags & CDW13_VALID) {
 519     Sq->Payload.Raw.Cdw13 = Packet->NvmeCmd->Cdw13;
 520   }
 521   if(Packet->NvmeCmd->Flags & CDW14_VALID) {
 522     Sq->Payload.Raw.Cdw14 = Packet->NvmeCmd->Cdw14;
 523   }
 524   if(Packet->NvmeCmd->Flags & CDW15_VALID) {
 525     Sq->Payload.Raw.Cdw15 = Packet->NvmeCmd->Cdw15;
 526   }
 527
 528   //
 529   // Ring the submission queue doorbell.
 530   //
 531   Private->SqTdbl[QueueType].Sqt ^= 1;
 532   Data = ReadUnaligned32 ((UINT32*)&Private->SqTdbl[QueueType]);
 533   PciIo->Mem.Write (
 534                PciIo,
 535                EfiPciIoWidthUint32,
 536                NVME_BAR,
 537                NVME_SQTDBL_OFFSET(QueueType, Private->Cap.Dstrd),
 538                1,
 539                &Data
 540                );
 541
 542   Status = gBS->CreateEvent (
 543                   EVT_TIMER,
 544                   TPL_CALLBACK,
 545                   NULL,
 546                   NULL,
 547                   &TimerEvent
 548                   );
 549   if (EFI_ERROR (Status)) {
 550     goto EXIT;
 551   }
 552
 553   Status = gBS->SetTimer(TimerEvent, TimerRelative, Packet->CommandTimeout);
 554
 555   if (EFI_ERROR(Status)) {
 556     goto EXIT;
 557   }
 558
 559   //
 560   // Wait for completion queue to get filled in.
 561   //
 562   Status = EFI_TIMEOUT;
 563   while (EFI_ERROR (gBS->CheckEvent (TimerEvent))) {
 564     if (Cq->Pt != Private->Pt[QueueType]) {
 565       Status = EFI_SUCCESS;
 566       break;
 567     }
 568   }
 569
 570   //
 571   // Check the NVMe cmd execution result
 572   //
 573   if (Status != EFI_TIMEOUT) {
 574     if ((Cq->Sct == 0) && (Cq->Sc == 0)) {
 575       Status = EFI_SUCCESS;
 576     } else {
 577       Status = EFI_DEVICE_ERROR;
 578       //
 579       // Copy the Respose Queue entry for this command to the callers response buffer
 580       //
 581       CopyMem(Packet->NvmeCompletion, Cq, sizeof(EFI_NVM_EXPRESS_COMPLETION));
 582
 583       //
 584       // Dump every completion entry status for debugging.
 585       //
 586       DEBUG_CODE_BEGIN();
 587         NvmeDumpStatus(Cq);
 588       DEBUG_CODE_END();
 589     }
 590   }
 591
 592   if ((Private->CqHdbl[QueueType].Cqh ^= 1) == 0) {
 593     Private->Pt[QueueType] ^= 1;
 594   }
 595
 596   Data = ReadUnaligned32 ((UINT32*)&Private->CqHdbl[QueueType]);
 597   PciIo->Mem.Write (
 598                PciIo,
 599                EfiPciIoWidthUint32,
 600                NVME_BAR,
 601                NVME_CQHDBL_OFFSET(QueueType, Private->Cap.Dstrd),
 602                1,
 603                &Data
 604                );
 605
 606 EXIT:
 607   if (MapData != NULL) {
 608     PciIo->Unmap (
 609              PciIo,
 610              MapData
 611              );
 612   }
 613
 614   if (MapMeta != NULL) {
 615     PciIo->Unmap (
 616              PciIo,
 617              MapMeta
 618              );
 619   }
 620
 621   if (MapPrpList != NULL) {
 622     PciIo->Unmap (
 623              PciIo,
 624              MapPrpList
 625              );
 626   }
 627
 628   if (Prp != NULL) {
 629     PciIo->FreeBuffer (PciIo, PrpListNo, PrpListHost);
 630   }
 631
 632   if (TimerEvent != NULL) {
 633     gBS->CloseEvent (TimerEvent);
 634   }
 635   return Status;
 636 }
 637
 638 /**
 639   Used to retrieve the next namespace ID for this NVM Express controller.
 640
 641   The EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.GetNextNamespace() function retrieves the next valid
 642   namespace ID on this NVM Express controller.
 643
 644   If on input the value pointed to by NamespaceId is 0xFFFFFFFF, then the first valid namespace
 645   ID defined on the NVM Express controller is returned in the location pointed to by NamespaceId
 646   and a status of EFI_SUCCESS is returned.
 647
 648   If on input the value pointed to by NamespaceId is an invalid namespace ID other than 0xFFFFFFFF,
 649   then EFI_INVALID_PARAMETER is returned.
 650
 651   If on input the value pointed to by NamespaceId is a valid namespace ID, then the next valid
 652   namespace ID on the NVM Express controller is returned in the location pointed to by NamespaceId,
 653   and EFI_SUCCESS is returned.
 654
 655   If the value pointed to by NamespaceId is the namespace ID of the last namespace on the NVM
 656   Express controller, then EFI_NOT_FOUND is returned.
 657
 658   @param[in]     This           A pointer to the EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL instance.
 659   @param[in,out] NamespaceId    On input, a pointer to a legal NamespaceId for an NVM Express
 660                                 namespace present on the NVM Express controller. On output, a
 661                                 pointer to the next NamespaceId of an NVM Express namespace on
 662                                 an NVM Express controller. An input value of 0xFFFFFFFF retrieves
 663                                 the first NamespaceId for an NVM Express namespace present on an
 664                                 NVM Express controller.
 665
 666   @retval EFI_SUCCESS           The Namespace ID of the next Namespace was returned.
 667   @retval EFI_NOT_FOUND         There are no more namespaces defined on this controller.
 668   @retval EFI_INVALID_PARAMETER NamespaceId is an invalid value other than 0xFFFFFFFF.
 669
 670 **/
 671 EFI_STATUS
 672 EFIAPI
 673 NvmExpressGetNextNamespace (
 674   IN     EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL          *This,
 675   IN OUT UINT32                                      *NamespaceId
 676   )
 677 {
 678   NVME_CONTROLLER_PRIVATE_DATA     *Private;
 679   NVME_ADMIN_NAMESPACE_DATA        *NamespaceData;
 680   UINT32                           NextNamespaceId;
 681   EFI_STATUS                       Status;
 682
 683   if ((This == NULL) || (NamespaceId == NULL)) {
 684     return EFI_INVALID_PARAMETER;
 685   }
 686
 687   NamespaceData = NULL;
 688   Status        = EFI_NOT_FOUND;
 689
 690   Private = NVME_CONTROLLER_PRIVATE_DATA_FROM_PASS_THRU (This);
 691   //
 692   // If the NamespaceId input value is 0xFFFFFFFF, then get the first valid namespace ID
 693   //
 694   if (*NamespaceId == 0xFFFFFFFF) {
 695     //
 696     // Start with the first namespace ID
 697     //
 698     NextNamespaceId = 1;
 699     //
 700     // Allocate buffer for Identify Namespace data.
 701     //
 702     NamespaceData = (NVME_ADMIN_NAMESPACE_DATA *)AllocateZeroPool (sizeof (NVME_ADMIN_NAMESPACE_DATA));
 703
 704     if (NamespaceData == NULL) {
 705       return EFI_NOT_FOUND;
 706     }
 707
 708     Status = NvmeIdentifyNamespace (Private, NextNamespaceId, NamespaceData);
 709     if (EFI_ERROR(Status)) {
 710       goto Done;
 711     }
 712
 713     *NamespaceId = NextNamespaceId;
 714   } else {
 715     if (*NamespaceId >= Private->ControllerData->Nn) {
 716       return EFI_INVALID_PARAMETER;
 717     }
 718
 719     NextNamespaceId = *NamespaceId + 1;
 720     //
 721     // Allocate buffer for Identify Namespace data.
 722     //
 723     NamespaceData = (NVME_ADMIN_NAMESPACE_DATA *)AllocateZeroPool (sizeof (NVME_ADMIN_NAMESPACE_DATA));
 724     if (NamespaceData == NULL) {
 725       return EFI_NOT_FOUND;
 726     }
 727
 728     Status = NvmeIdentifyNamespace (Private, NextNamespaceId, NamespaceData);
 729     if (EFI_ERROR(Status)) {
 730       goto Done;
 731     }
 732
 733     *NamespaceId = NextNamespaceId;
 734   }
 735
 736 Done:
 737   if (NamespaceData != NULL) {
 738     FreePool(NamespaceData);
 739   }
 740
 741   return Status;
 742 }
 743
 744 /**
 745   Used to translate a device path node to a namespace ID.
 746
 747   The EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.GetNamespace() function determines the namespace ID associated with the
 748   namespace described by DevicePath.
 749
 750   If DevicePath is a device path node type that the NVM Express Pass Thru driver supports, then the NVM Express
 751   Pass Thru driver will attempt to translate the contents DevicePath into a namespace ID.
 752
 753   If this translation is successful, then that namespace ID is returned in NamespaceId, and EFI_SUCCESS is returned
 754
 755   @param[in]  This                A pointer to the EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL instance.
 756   @param[in]  DevicePath          A pointer to the device path node that describes an NVM Express namespace on
 757                                   the NVM Express controller.
 758   @param[out] NamespaceId         The NVM Express namespace ID contained in the device path node.
 759
 760   @retval EFI_SUCCESS             DevicePath was successfully translated to NamespaceId.
 761   @retval EFI_INVALID_PARAMETER   If DevicePath or NamespaceId are NULL, then EFI_INVALID_PARAMETER is returned.
 762   @retval EFI_UNSUPPORTED         If DevicePath is not a device path node type that the NVM Express Pass Thru driver
 763                                   supports, then EFI_UNSUPPORTED is returned.
 764   @retval EFI_NOT_FOUND           If DevicePath is a device path node type that the NVM Express Pass Thru driver
 765                                   supports, but there is not a valid translation from DevicePath to a namespace ID,
 766                                   then EFI_NOT_FOUND is returned.
 767 **/
 768 EFI_STATUS
 769 EFIAPI
 770 NvmExpressGetNamespace (
 771   IN     EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL          *This,
 772   IN     EFI_DEVICE_PATH_PROTOCOL                    *DevicePath,
 773      OUT UINT32                                      *NamespaceId
 774   )
 775 {
 776   NVME_NAMESPACE_DEVICE_PATH       *Node;
 777
 778   if ((This == NULL) || (DevicePath == NULL) || (NamespaceId == NULL)) {
 779     return EFI_INVALID_PARAMETER;
 780   }
 781
 782   if (DevicePath->Type != MESSAGING_DEVICE_PATH) {
 783     return EFI_UNSUPPORTED;
 784   }
 785
 786   Node = (NVME_NAMESPACE_DEVICE_PATH *)DevicePath;
 787
 788   if (DevicePath->SubType == MSG_NVME_NAMESPACE_DP) {
 789     if (DevicePathNodeLength(DevicePath) != sizeof(NVME_NAMESPACE_DEVICE_PATH)) {
 790       return EFI_NOT_FOUND;
 791     }
 792
 793     *NamespaceId = Node->NamespaceId;
 794
 795     return EFI_SUCCESS;
 796   } else {
 797     return EFI_UNSUPPORTED;
 798   }
 799 }
 800
 801 /**
 802   Used to allocate and build a device path node for an NVM Express namespace on an NVM Express controller.
 803
 804   The EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL.BuildDevicePath() function allocates and builds a single device
 805   path node for the NVM Express namespace specified by NamespaceId.
 806
 807   If the NamespaceId is not valid, then EFI_NOT_FOUND is returned.
 808
 809   If DevicePath is NULL, then EFI_INVALID_PARAMETER is returned.
 810
 811   If there are not enough resources to allocate the device path node, then EFI_OUT_OF_RESOURCES is returned.
 812
 813   Otherwise, DevicePath is allocated with the boot service AllocatePool(), the contents of DevicePath are
 814   initialized to describe the NVM Express namespace specified by NamespaceId, and EFI_SUCCESS is returned.
 815
 816   @param[in]     This                A pointer to the EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL instance.
 817   @param[in]     NamespaceId         The NVM Express namespace ID  for which a device path node is to be
 818                                      allocated and built. Caller must set the NamespaceId to zero if the
 819                                      device path node will contain a valid UUID.
 820   @param[in,out] DevicePath          A pointer to a single device path node that describes the NVM Express
 821                                      namespace specified by NamespaceId. This function is responsible for
 822                                      allocating the buffer DevicePath with the boot service AllocatePool().
 823                                      It is the caller's responsibility to free DevicePath when the caller
 824                                      is finished with DevicePath.
 825   @retval EFI_SUCCESS                The device path node that describes the NVM Express namespace specified
 826                                      by NamespaceId was allocated and returned in DevicePath.
 827   @retval EFI_NOT_FOUND              The NamespaceId is not valid.
 828   @retval EFI_INVALID_PARAMETER      DevicePath is NULL.
 829   @retval EFI_OUT_OF_RESOURCES       There are not enough resources to allocate the DevicePath node.
 830
 831 **/
 832 EFI_STATUS
 833 EFIAPI
 834 NvmExpressBuildDevicePath (
 835   IN     EFI_NVM_EXPRESS_PASS_THRU_PROTOCOL          *This,
 836   IN     UINT32                                      NamespaceId,
 837   IN OUT EFI_DEVICE_PATH_PROTOCOL                    **DevicePath
 838   )
 839 {
 840   NVME_NAMESPACE_DEVICE_PATH     *Node;
 841   NVME_CONTROLLER_PRIVATE_DATA   *Private;
 842   EFI_STATUS                     Status;
 843   NVME_ADMIN_NAMESPACE_DATA      *NamespaceData;
 844
 845   //
 846   // Validate parameters
 847   //
 848   if ((This == NULL) || (DevicePath == NULL)) {
 849     return EFI_INVALID_PARAMETER;
 850   }
 851
 852   if (NamespaceId == 0) {
 853     return EFI_NOT_FOUND;
 854   }
 855
 856   Status  = EFI_SUCCESS;
 857   Private = NVME_CONTROLLER_PRIVATE_DATA_FROM_PASS_THRU (This);
 858
 859   Node = (NVME_NAMESPACE_DEVICE_PATH *)AllocateZeroPool (sizeof (NVME_NAMESPACE_DEVICE_PATH));
 860   if (Node == NULL) {
 861     return EFI_OUT_OF_RESOURCES;
 862   }
 863
 864   Node->Header.Type    = MESSAGING_DEVICE_PATH;
 865   Node->Header.SubType = MSG_NVME_NAMESPACE_DP;
 866   SetDevicePathNodeLength (&Node->Header, sizeof (NVME_NAMESPACE_DEVICE_PATH));
 867   Node->NamespaceId    = NamespaceId;
 868
 869   //
 870   // Allocate a buffer for Identify Namespace data.
 871   //
 872   NamespaceData = NULL;
 873   NamespaceData = AllocateZeroPool(sizeof (NVME_ADMIN_NAMESPACE_DATA));
 874   if(NamespaceData == NULL) {
 875     Status = EFI_OUT_OF_RESOURCES;
 876     goto Exit;
 877   }
 878
 879   //
 880   // Get UUID from specified Identify Namespace data.
 881   //
 882   Status = NvmeIdentifyNamespace (
 883              Private,
 884              NamespaceId,
 885              (VOID *)NamespaceData
 886              );
 887
 888   if (EFI_ERROR(Status)) {
 889     goto Exit;
 890   }
 891
 892   Node->NamespaceUuid = NamespaceData->Eui64;
 893
 894   *DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)Node;
 895
 896 Exit:
 897   if(NamespaceData != NULL) {
 898     FreePool (NamespaceData);
 899   }
 900
 901   if (EFI_ERROR (Status)) {
 902     FreePool (Node);
 903   }
 904
 905   return Status;
 906 }
 907