2 Internal library implementation for PCI Bus module.
4 Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 GLOBAL_REMOVE_IF_UNREFERENCED
18 CHAR16
*mBarTypeStr
[] = {
32 Retrieve the PCI Card device BAR information via PciIo interface.
34 @param PciIoDevice PCI Card device instance.
39 IN PCI_IO_DEVICE
*PciIoDevice
44 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
49 // Read PciBar information from the bar register
51 if (!gFullEnumeration
) {
53 PciIoDevice
->PciIo
.Pci
.Read (
54 &(PciIoDevice
->PciIo
),
56 PCI_CARD_MEMORY_BASE_0
,
61 (PciIoDevice
->PciBar
)[P2C_MEM_1
].BaseAddress
= (UINT64
) (Address
);
62 (PciIoDevice
->PciBar
)[P2C_MEM_1
].Length
= 0x2000000;
63 (PciIoDevice
->PciBar
)[P2C_MEM_1
].BarType
= PciBarTypeMem32
;
66 PciIoDevice
->PciIo
.Pci
.Read (
67 &(PciIoDevice
->PciIo
),
69 PCI_CARD_MEMORY_BASE_1
,
73 (PciIoDevice
->PciBar
)[P2C_MEM_2
].BaseAddress
= (UINT64
) (Address
);
74 (PciIoDevice
->PciBar
)[P2C_MEM_2
].Length
= 0x2000000;
75 (PciIoDevice
->PciBar
)[P2C_MEM_2
].BarType
= PciBarTypePMem32
;
78 PciIoDevice
->PciIo
.Pci
.Read (
79 &(PciIoDevice
->PciIo
),
81 PCI_CARD_IO_BASE_0_LOWER
,
85 (PciIoDevice
->PciBar
)[P2C_IO_1
].BaseAddress
= (UINT64
) (Address
);
86 (PciIoDevice
->PciBar
)[P2C_IO_1
].Length
= 0x100;
87 (PciIoDevice
->PciBar
)[P2C_IO_1
].BarType
= PciBarTypeIo16
;
90 PciIoDevice
->PciIo
.Pci
.Read (
91 &(PciIoDevice
->PciIo
),
93 PCI_CARD_IO_BASE_1_LOWER
,
97 (PciIoDevice
->PciBar
)[P2C_IO_2
].BaseAddress
= (UINT64
) (Address
);
98 (PciIoDevice
->PciBar
)[P2C_IO_2
].Length
= 0x100;
99 (PciIoDevice
->PciBar
)[P2C_IO_2
].BarType
= PciBarTypeIo16
;
103 if (gPciHotPlugInit
!= NULL
&& FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
104 GetResourcePaddingForHpb (PciIoDevice
);
109 Remove rejected pci device from specific root bridge
112 @param RootBridgeHandle Specific parent root bridge handle.
113 @param Bridge Bridge device instance.
117 RemoveRejectedPciDevices (
118 IN EFI_HANDLE RootBridgeHandle
,
119 IN PCI_IO_DEVICE
*Bridge
123 LIST_ENTRY
*CurrentLink
;
124 LIST_ENTRY
*LastLink
;
126 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
130 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
132 while (CurrentLink
!= NULL
&& CurrentLink
!= &Bridge
->ChildList
) {
134 Temp
= PCI_IO_DEVICE_FROM_LINK (CurrentLink
);
136 if (IS_PCI_BRIDGE (&Temp
->Pci
)) {
138 // Remove rejected devices recusively
140 RemoveRejectedPciDevices (RootBridgeHandle
, Temp
);
143 // Skip rejection for all PPBs, while detect rejection for others
145 if (IsPciDeviceRejected (Temp
)) {
148 // For P2C, remove all devices on it
150 if (!IsListEmpty (&Temp
->ChildList
)) {
151 RemoveAllPciDeviceOnBridge (RootBridgeHandle
, Temp
);
155 // Finally remove itself
157 LastLink
= CurrentLink
->BackLink
;
158 RemoveEntryList (CurrentLink
);
159 FreePciDevice (Temp
);
161 CurrentLink
= LastLink
;
165 CurrentLink
= CurrentLink
->ForwardLink
;
170 Dump the resourc map of the bridge device.
172 @param[in] BridgeResource Resource descriptor of the bridge device.
176 IN PCI_RESOURCE_NODE
*BridgeResource
180 PCI_RESOURCE_NODE
*Resource
;
183 if ((BridgeResource
!= NULL
) && (BridgeResource
->Length
!= 0)) {
185 EFI_D_INFO
, "Type = %s; Base = 0x%lx;\tLength = 0x%lx;\tAlignment = 0x%lx\n",
186 mBarTypeStr
[MIN (BridgeResource
->ResType
, PciBarTypeMaxType
)],
187 BridgeResource
->PciDev
->PciBar
[BridgeResource
->Bar
].BaseAddress
,
188 BridgeResource
->Length
, BridgeResource
->Alignment
190 for ( Link
= BridgeResource
->ChildList
.ForwardLink
191 ; Link
!= &BridgeResource
->ChildList
192 ; Link
= Link
->ForwardLink
194 Resource
= RESOURCE_NODE_FROM_LINK (Link
);
195 if (Resource
->ResourceUsage
== PciResUsageTypical
) {
196 Bar
= Resource
->Virtual
? Resource
->PciDev
->VfPciBar
: Resource
->PciDev
->PciBar
;
198 EFI_D_INFO
, " Base = 0x%lx;\tLength = 0x%lx;\tAlignment = 0x%lx;\tOwner = %s ",
199 Bar
[Resource
->Bar
].BaseAddress
, Resource
->Length
, Resource
->Alignment
,
200 IS_PCI_BRIDGE (&Resource
->PciDev
->Pci
) ? L
"PPB" :
201 IS_CARDBUS_BRIDGE (&Resource
->PciDev
->Pci
) ? L
"P2C" :
205 if ((!IS_PCI_BRIDGE (&Resource
->PciDev
->Pci
) && !IS_CARDBUS_BRIDGE (&Resource
->PciDev
->Pci
)) ||
206 (IS_PCI_BRIDGE (&Resource
->PciDev
->Pci
) && (Resource
->Bar
< PPB_IO_RANGE
)) ||
207 (IS_CARDBUS_BRIDGE (&Resource
->PciDev
->Pci
) && (Resource
->Bar
< P2C_MEM_1
))
210 // The resource requirement comes from the device itself.
213 EFI_D_INFO
, " [%02x|%02x|%02x:%02x]\n",
214 Resource
->PciDev
->BusNumber
, Resource
->PciDev
->DeviceNumber
,
215 Resource
->PciDev
->FunctionNumber
, Bar
[Resource
->Bar
].Offset
219 // The resource requirement comes from the subordinate devices.
222 EFI_D_INFO
, " [%02x|%02x|%02x:**]\n",
223 Resource
->PciDev
->BusNumber
, Resource
->PciDev
->DeviceNumber
,
224 Resource
->PciDev
->FunctionNumber
228 DEBUG ((EFI_D_INFO
, " Padding:Length = 0x%lx;\tAlignment = 0x%lx\n", Resource
->Length
, Resource
->Alignment
));
235 Find the corresponding resource node for the Device in child list of BridgeResource.
237 @param[in] Device Pointer to PCI_IO_DEVICE.
238 @param[in] BridgeResource Pointer to PCI_RESOURCE_NODE.
240 @return !NULL The corresponding resource node for the Device.
241 @return NULL No corresponding resource node for the Device.
245 IN PCI_IO_DEVICE
*Device
,
246 IN PCI_RESOURCE_NODE
*BridgeResource
250 PCI_RESOURCE_NODE
*Resource
;
252 for ( Link
= BridgeResource
->ChildList
.ForwardLink
253 ; Link
!= &BridgeResource
->ChildList
254 ; Link
= Link
->ForwardLink
256 Resource
= RESOURCE_NODE_FROM_LINK (Link
);
257 if (Resource
->PciDev
== Device
) {
266 Dump the resource map of all the devices under Bridge.
268 @param[in] Bridge Bridge device instance.
269 @param[in] IoNode IO resource descriptor for the bridge device.
270 @param[in] Mem32Node Mem32 resource descriptor for the bridge device.
271 @param[in] PMem32Node PMem32 resource descriptor for the bridge device.
272 @param[in] Mem64Node Mem64 resource descriptor for the bridge device.
273 @param[in] PMem64Node PMem64 resource descriptor for the bridge device.
277 IN PCI_IO_DEVICE
*Bridge
,
278 IN PCI_RESOURCE_NODE
*IoNode
,
279 IN PCI_RESOURCE_NODE
*Mem32Node
,
280 IN PCI_RESOURCE_NODE
*PMem32Node
,
281 IN PCI_RESOURCE_NODE
*Mem64Node
,
282 IN PCI_RESOURCE_NODE
*PMem64Node
287 PCI_IO_DEVICE
*Device
;
288 PCI_RESOURCE_NODE
*ChildIoNode
;
289 PCI_RESOURCE_NODE
*ChildMem32Node
;
290 PCI_RESOURCE_NODE
*ChildPMem32Node
;
291 PCI_RESOURCE_NODE
*ChildMem64Node
;
292 PCI_RESOURCE_NODE
*ChildPMem64Node
;
293 EFI_DEVICE_PATH_TO_TEXT_PROTOCOL
*ToText
;
296 DEBUG ((EFI_D_INFO
, "PciBus: Resource Map for "));
298 Status
= gBS
->OpenProtocol (
300 &gEfiPciRootBridgeIoProtocolGuid
,
304 EFI_OPEN_PROTOCOL_TEST_PROTOCOL
306 if (EFI_ERROR (Status
)) {
308 EFI_D_INFO
, "Bridge [%02x|%02x|%02x]\n",
309 Bridge
->BusNumber
, Bridge
->DeviceNumber
, Bridge
->FunctionNumber
312 Status
= gBS
->LocateProtocol (
313 &gEfiDevicePathToTextProtocolGuid
,
318 if (!EFI_ERROR (Status
)) {
319 Str
= ToText
->ConvertDevicePathToText (
320 DevicePathFromHandle (Bridge
->Handle
),
325 DEBUG ((EFI_D_INFO
, "Root Bridge %s\n", Str
!= NULL
? Str
: L
""));
331 DumpBridgeResource (IoNode
);
332 DumpBridgeResource (Mem32Node
);
333 DumpBridgeResource (PMem32Node
);
334 DumpBridgeResource (Mem64Node
);
335 DumpBridgeResource (PMem64Node
);
336 DEBUG ((EFI_D_INFO
, "\n"));
338 for ( Link
= Bridge
->ChildList
.ForwardLink
339 ; Link
!= &Bridge
->ChildList
340 ; Link
= Link
->ForwardLink
342 Device
= PCI_IO_DEVICE_FROM_LINK (Link
);
343 if (IS_PCI_BRIDGE (&Device
->Pci
)) {
345 ChildIoNode
= (IoNode
== NULL
? NULL
: FindResourceNode (Device
, IoNode
));
346 ChildMem32Node
= (Mem32Node
== NULL
? NULL
: FindResourceNode (Device
, Mem32Node
));
347 ChildPMem32Node
= (PMem32Node
== NULL
? NULL
: FindResourceNode (Device
, PMem32Node
));
348 ChildMem64Node
= (Mem64Node
== NULL
? NULL
: FindResourceNode (Device
, Mem64Node
));
349 ChildPMem64Node
= (PMem64Node
== NULL
? NULL
: FindResourceNode (Device
, PMem64Node
));
364 Submits the I/O and memory resource requirements for the specified PCI Host Bridge.
366 @param PciResAlloc Point to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
368 @retval EFI_SUCCESS Successfully finished resource allocation.
369 @retval EFI_NOT_FOUND Cannot get root bridge instance.
370 @retval EFI_OUT_OF_RESOURCES Platform failed to program the resources if no hot plug supported.
371 @retval other Some error occurred when allocating resources for the PCI Host Bridge.
373 @note Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
377 PciHostBridgeResourceAllocator (
378 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
381 PCI_IO_DEVICE
*RootBridgeDev
;
382 EFI_HANDLE RootBridgeHandle
;
391 UINT64 Mem32ResStatus
;
392 UINT64 PMem32ResStatus
;
393 UINT64 Mem64ResStatus
;
394 UINT64 PMem64ResStatus
;
395 UINT64 MaxOptionRomSize
;
396 PCI_RESOURCE_NODE
*IoBridge
;
397 PCI_RESOURCE_NODE
*Mem32Bridge
;
398 PCI_RESOURCE_NODE
*PMem32Bridge
;
399 PCI_RESOURCE_NODE
*Mem64Bridge
;
400 PCI_RESOURCE_NODE
*PMem64Bridge
;
401 PCI_RESOURCE_NODE IoPool
;
402 PCI_RESOURCE_NODE Mem32Pool
;
403 PCI_RESOURCE_NODE PMem32Pool
;
404 PCI_RESOURCE_NODE Mem64Pool
;
405 PCI_RESOURCE_NODE PMem64Pool
;
407 EFI_DEVICE_HANDLE_EXTENDED_DATA_PAYLOAD HandleExtendedData
;
408 EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD AllocFailExtendedData
;
416 // It may try several times if the resource allocation fails
420 // Initialize resource pool
422 InitializeResourcePool (&IoPool
, PciBarTypeIo16
);
423 InitializeResourcePool (&Mem32Pool
, PciBarTypeMem32
);
424 InitializeResourcePool (&PMem32Pool
, PciBarTypePMem32
);
425 InitializeResourcePool (&Mem64Pool
, PciBarTypeMem64
);
426 InitializeResourcePool (&PMem64Pool
, PciBarTypePMem64
);
428 RootBridgeDev
= NULL
;
429 RootBridgeHandle
= 0;
431 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
433 // Get Root Bridge Device by handle
435 RootBridgeDev
= GetRootBridgeByHandle (RootBridgeHandle
);
437 if (RootBridgeDev
== NULL
) {
438 return EFI_NOT_FOUND
;
442 // Create the entire system resource map from the information collected by
443 // enumerator. Several resource tree was created
447 // If non-stardard PCI Bridge I/O window alignment is supported,
448 // set I/O aligment to minimum possible alignment for root bridge.
450 IoBridge
= CreateResourceNode (
453 FeaturePcdGet (PcdPciBridgeIoAlignmentProbe
) ? 0x1FF: 0xFFF,
459 Mem32Bridge
= CreateResourceNode (
468 PMem32Bridge
= CreateResourceNode (
477 Mem64Bridge
= CreateResourceNode (
486 PMem64Bridge
= CreateResourceNode (
496 // Create resourcemap by going through all the devices subject to this root bridge
508 // Get the max ROM size that the root bridge can process
510 RootBridgeDev
->RomSize
= Mem32Bridge
->Length
;
513 // Skip to enlarge the resource request during realloction
517 // Get Max Option Rom size for current root bridge
519 MaxOptionRomSize
= GetMaxOptionRomSize (RootBridgeDev
);
522 // Enlarger the mem32 resource to accomdate the option rom
523 // if the mem32 resource is not enough to hold the rom
525 if (MaxOptionRomSize
> Mem32Bridge
->Length
) {
527 Mem32Bridge
->Length
= MaxOptionRomSize
;
528 RootBridgeDev
->RomSize
= MaxOptionRomSize
;
531 // Alignment should be adjusted as well
533 if (Mem32Bridge
->Alignment
< MaxOptionRomSize
- 1) {
534 Mem32Bridge
->Alignment
= MaxOptionRomSize
- 1;
540 // Based on the all the resource tree, contruct ACPI resource node to
541 // submit the resource aperture to pci host bridge protocol
543 Status
= ConstructAcpiResourceRequestor (
554 // Insert these resource nodes into the database
556 InsertResourceNode (&IoPool
, IoBridge
);
557 InsertResourceNode (&Mem32Pool
, Mem32Bridge
);
558 InsertResourceNode (&PMem32Pool
, PMem32Bridge
);
559 InsertResourceNode (&Mem64Pool
, Mem64Bridge
);
560 InsertResourceNode (&PMem64Pool
, PMem64Bridge
);
562 if (Status
== EFI_SUCCESS
) {
564 // Submit the resource requirement
566 Status
= PciResAlloc
->SubmitResources (
568 RootBridgeDev
->Handle
,
574 // Free acpi resource node
576 if (AcpiConfig
!= NULL
) {
577 FreePool (AcpiConfig
);
580 if (EFI_ERROR (Status
)) {
582 // Destroy all the resource tree
584 DestroyResourceTree (&IoPool
);
585 DestroyResourceTree (&Mem32Pool
);
586 DestroyResourceTree (&PMem32Pool
);
587 DestroyResourceTree (&Mem64Pool
);
588 DestroyResourceTree (&PMem64Pool
);
593 // End while, at least one Root Bridge should be found.
595 ASSERT (RootBridgeDev
!= NULL
);
598 // Notify platform to start to program the resource
600 Status
= NotifyPhase (PciResAlloc
, EfiPciHostBridgeAllocateResources
);
601 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
603 // If Hot Plug is not supported
605 if (EFI_ERROR (Status
)) {
607 // Allocation failed, then return
609 return EFI_OUT_OF_RESOURCES
;
612 // Allocation succeed.
613 // Get host bridge handle for status report, and then skip the main while
615 HandleExtendedData
.Handle
= RootBridgeDev
->PciRootBridgeIo
->ParentHandle
;
621 // If Hot Plug is supported
623 if (!EFI_ERROR (Status
)) {
625 // Allocation succeed, then continue the following
631 // If the resource allocation is unsuccessful, free resources on bridge
634 RootBridgeDev
= NULL
;
635 RootBridgeHandle
= 0;
637 IoResStatus
= EFI_RESOURCE_SATISFIED
;
638 Mem32ResStatus
= EFI_RESOURCE_SATISFIED
;
639 PMem32ResStatus
= EFI_RESOURCE_SATISFIED
;
640 Mem64ResStatus
= EFI_RESOURCE_SATISFIED
;
641 PMem64ResStatus
= EFI_RESOURCE_SATISFIED
;
643 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
645 // Get RootBridg Device by handle
647 RootBridgeDev
= GetRootBridgeByHandle (RootBridgeHandle
);
648 if (RootBridgeDev
== NULL
) {
649 return EFI_NOT_FOUND
;
653 // Get host bridge handle for status report
655 HandleExtendedData
.Handle
= RootBridgeDev
->PciRootBridgeIo
->ParentHandle
;
658 // Get acpi resource node for all the resource types
662 Status
= PciResAlloc
->GetProposedResources (
664 RootBridgeDev
->Handle
,
668 if (EFI_ERROR (Status
)) {
672 if (AcpiConfig
!= NULL
) {
674 // Adjust resource allocation policy for each RB
676 GetResourceAllocationStatus (
684 FreePool (AcpiConfig
);
692 // Raise the EFI_IOB_EC_RESOURCE_CONFLICT status code
695 // It is very difficult to follow the spec here
696 // Device path , Bar index can not be get here
698 ZeroMem (&AllocFailExtendedData
, sizeof (AllocFailExtendedData
));
700 REPORT_STATUS_CODE_WITH_EXTENDED_DATA (
702 EFI_IO_BUS_PCI
| EFI_IOB_EC_RESOURCE_CONFLICT
,
703 (VOID
*) &AllocFailExtendedData
,
704 sizeof (AllocFailExtendedData
)
707 Status
= PciHostBridgeAdjustAllocation (
721 // Destroy all the resource tree
723 DestroyResourceTree (&IoPool
);
724 DestroyResourceTree (&Mem32Pool
);
725 DestroyResourceTree (&PMem32Pool
);
726 DestroyResourceTree (&Mem64Pool
);
727 DestroyResourceTree (&PMem64Pool
);
729 NotifyPhase (PciResAlloc
, EfiPciHostBridgeFreeResources
);
731 if (EFI_ERROR (Status
)) {
743 // Raise the EFI_IOB_PCI_RES_ALLOC status code
745 REPORT_STATUS_CODE_WITH_EXTENDED_DATA (
747 EFI_IO_BUS_PCI
| EFI_IOB_PCI_RES_ALLOC
,
748 (VOID
*) &HandleExtendedData
,
749 sizeof (HandleExtendedData
)
753 // Notify pci bus driver starts to program the resource
755 NotifyPhase (PciResAlloc
, EfiPciHostBridgeSetResources
);
757 RootBridgeDev
= NULL
;
759 RootBridgeHandle
= 0;
761 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
763 // Get RootBridg Device by handle
765 RootBridgeDev
= GetRootBridgeByHandle (RootBridgeHandle
);
767 if (RootBridgeDev
== NULL
) {
768 return EFI_NOT_FOUND
;
772 // Get acpi resource node for all the resource types
775 Status
= PciResAlloc
->GetProposedResources (
777 RootBridgeDev
->Handle
,
781 if (EFI_ERROR (Status
)) {
786 // Get the resource base by interpreting acpi resource node
799 // Process option rom for this root bridge
801 ProcessOptionRom (RootBridgeDev
, Mem32Base
, RootBridgeDev
->RomSize
);
804 // Create the entire system resource map from the information collected by
805 // enumerator. Several resource tree was created
807 IoBridge
= FindResourceNode (RootBridgeDev
, &IoPool
);
808 Mem32Bridge
= FindResourceNode (RootBridgeDev
, &Mem32Pool
);
809 PMem32Bridge
= FindResourceNode (RootBridgeDev
, &PMem32Pool
);
810 Mem64Bridge
= FindResourceNode (RootBridgeDev
, &Mem64Pool
);
811 PMem64Bridge
= FindResourceNode (RootBridgeDev
, &PMem64Pool
);
813 ASSERT (IoBridge
!= NULL
);
814 ASSERT (Mem32Bridge
!= NULL
);
815 ASSERT (PMem32Bridge
!= NULL
);
816 ASSERT (Mem64Bridge
!= NULL
);
817 ASSERT (PMem64Bridge
!= NULL
);
820 // Program IO resources
828 // Program Mem32 resources
836 // Program PMem32 resources
844 // Program Mem64 resources
852 // Program PMem64 resources
859 IoBridge
->PciDev
->PciBar
[IoBridge
->Bar
].BaseAddress
= IoBase
;
860 Mem32Bridge
->PciDev
->PciBar
[Mem32Bridge
->Bar
].BaseAddress
= Mem32Base
;
861 PMem32Bridge
->PciDev
->PciBar
[PMem32Bridge
->Bar
].BaseAddress
= PMem32Base
;
862 Mem64Bridge
->PciDev
->PciBar
[Mem64Bridge
->Bar
].BaseAddress
= Mem64Base
;
863 PMem64Bridge
->PciDev
->PciBar
[PMem64Bridge
->Bar
].BaseAddress
= PMem64Base
;
866 // Dump the resource map for current root bridge
879 FreePool (AcpiConfig
);
883 // Destroy all the resource tree
885 DestroyResourceTree (&IoPool
);
886 DestroyResourceTree (&Mem32Pool
);
887 DestroyResourceTree (&PMem32Pool
);
888 DestroyResourceTree (&Mem64Pool
);
889 DestroyResourceTree (&PMem64Pool
);
892 // Notify the resource allocation phase is to end
894 NotifyPhase (PciResAlloc
, EfiPciHostBridgeEndResourceAllocation
);
900 Allocate NumberOfBuses buses and return the next available PCI bus number.
902 @param Bridge Bridge device instance.
903 @param StartBusNumber Current available PCI bus number.
904 @param NumberOfBuses Number of buses enumerated below the StartBusNumber.
905 @param NextBusNumber Next available PCI bus number.
907 @retval EFI_SUCCESS Available bus number resource is enough. Next available PCI bus number
908 is returned in NextBusNumber.
909 @retval EFI_OUT_OF_RESOURCES Available bus number resource is not enough for allocation.
913 PciAllocateBusNumber (
914 IN PCI_IO_DEVICE
*Bridge
,
915 IN UINT8 StartBusNumber
,
916 IN UINT8 NumberOfBuses
,
917 OUT UINT8
*NextBusNumber
920 PCI_IO_DEVICE
*RootBridge
;
921 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*BusNumberRanges
;
923 UINT64 MaxNumberInRange
;
926 // Get PCI Root Bridge device
929 while (RootBridge
->Parent
!= NULL
) {
930 RootBridge
= RootBridge
->Parent
;
934 // Get next available PCI bus number
936 BusNumberRanges
= RootBridge
->BusNumberRanges
;
937 while (BusNumberRanges
->Desc
!= ACPI_END_TAG_DESCRIPTOR
) {
938 MaxNumberInRange
= BusNumberRanges
->AddrRangeMin
+ BusNumberRanges
->AddrLen
- 1;
939 if (StartBusNumber
>= BusNumberRanges
->AddrRangeMin
&& StartBusNumber
<= MaxNumberInRange
) {
940 NextNumber
= (UINT8
)(StartBusNumber
+ NumberOfBuses
);
941 while (NextNumber
> MaxNumberInRange
) {
943 if (BusNumberRanges
->Desc
== ACPI_END_TAG_DESCRIPTOR
) {
944 return EFI_OUT_OF_RESOURCES
;
946 NextNumber
= (UINT8
)(NextNumber
+ (BusNumberRanges
->AddrRangeMin
- (MaxNumberInRange
+ 1)));
947 MaxNumberInRange
= BusNumberRanges
->AddrRangeMin
+ BusNumberRanges
->AddrLen
- 1;
949 *NextBusNumber
= NextNumber
;
954 return EFI_OUT_OF_RESOURCES
;
958 Scan pci bus and assign bus number to the given PCI bus system.
960 @param Bridge Bridge device instance.
961 @param StartBusNumber start point.
962 @param SubBusNumber Point to sub bus number.
963 @param PaddedBusRange Customized bus number.
965 @retval EFI_SUCCESS Successfully scanned and assigned bus number.
966 @retval other Some error occurred when scanning pci bus.
968 @note Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.
973 IN PCI_IO_DEVICE
*Bridge
,
974 IN UINT8 StartBusNumber
,
975 OUT UINT8
*SubBusNumber
,
976 OUT UINT8
*PaddedBusRange
987 PCI_IO_DEVICE
*PciDevice
;
991 EFI_HPC_PADDING_ATTRIBUTES Attributes
;
992 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Descriptors
;
994 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
996 UINT32 TempReservedBusNum
;
998 PciRootBridgeIo
= Bridge
->PciRootBridgeIo
;
1002 Attributes
= (EFI_HPC_PADDING_ATTRIBUTES
) 0;
1008 for (Device
= 0; Device
<= PCI_MAX_DEVICE
; Device
++) {
1009 TempReservedBusNum
= 0;
1010 for (Func
= 0; Func
<= PCI_MAX_FUNC
; Func
++) {
1013 // Check to see whether a pci device is present
1015 Status
= PciDevicePresent (
1023 if (EFI_ERROR (Status
)) {
1028 // Get the PCI device information
1030 Status
= PciSearchDevice (
1039 ASSERT (!EFI_ERROR (Status
));
1041 PciAddress
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, 0);
1043 if (!IS_PCI_BRIDGE (&Pci
)) {
1045 // PCI bridges will be called later
1046 // Here just need for PCI device or PCI to cardbus controller
1047 // EfiPciBeforeChildBusEnumeration for PCI Device Node
1049 PreprocessController (
1051 PciDevice
->BusNumber
,
1052 PciDevice
->DeviceNumber
,
1053 PciDevice
->FunctionNumber
,
1054 EfiPciBeforeChildBusEnumeration
1058 if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1060 // For Pci Hotplug controller devcie only
1062 if (gPciHotPlugInit
!= NULL
) {
1064 // Check if it is a Hotplug PCI controller
1066 if (IsRootPciHotPlugController (PciDevice
->DevicePath
, &HpIndex
)) {
1067 gPciRootHpcData
[HpIndex
].Found
= TRUE
;
1069 if (!gPciRootHpcData
[HpIndex
].Initialized
) {
1071 Status
= CreateEventForHpc (HpIndex
, &Event
);
1073 ASSERT (!EFI_ERROR (Status
));
1075 Status
= gPciHotPlugInit
->InitializeRootHpc (
1077 gPciRootHpcPool
[HpIndex
].HpcDevicePath
,
1083 PreprocessController (
1085 PciDevice
->BusNumber
,
1086 PciDevice
->DeviceNumber
,
1087 PciDevice
->FunctionNumber
,
1088 EfiPciBeforeChildBusEnumeration
1095 if (IS_PCI_BRIDGE (&Pci
) || IS_CARDBUS_BRIDGE (&Pci
)) {
1099 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1101 // If Hot Plug is not supported,
1102 // get the bridge information
1104 Status
= PciSearchDevice (
1113 if (EFI_ERROR (Status
)) {
1118 // If Hot Plug is supported,
1119 // Get the bridge information
1122 if (gPciHotPlugInit
!= NULL
) {
1124 if (IsRootPciHotPlugBus (PciDevice
->DevicePath
, &HpIndex
)) {
1127 // If it is initialized, get the padded bus range
1129 Status
= gPciHotPlugInit
->GetResourcePadding (
1131 gPciRootHpcPool
[HpIndex
].HpbDevicePath
,
1134 (VOID
**) &Descriptors
,
1138 if (EFI_ERROR (Status
)) {
1143 Status
= PciGetBusRange (
1150 FreePool (Descriptors
);
1152 if (EFI_ERROR (Status
)) {
1161 Status
= PciAllocateBusNumber (Bridge
, *SubBusNumber
, 1, SubBusNumber
);
1162 if (EFI_ERROR (Status
)) {
1165 SecondBus
= *SubBusNumber
;
1167 Register
= (UINT16
) ((SecondBus
<< 8) | (UINT16
) StartBusNumber
);
1168 Address
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, PCI_BRIDGE_PRIMARY_BUS_REGISTER_OFFSET
);
1170 Status
= PciRootBridgeIo
->Pci
.Write (
1180 // If it is PPB, resursively search down this bridge
1182 if (IS_PCI_BRIDGE (&Pci
)) {
1185 // Temporarily initialize SubBusNumber to maximum bus number to ensure the
1186 // PCI configuration transaction to go through any PPB
1189 Address
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, PCI_BRIDGE_SUBORDINATE_BUS_REGISTER_OFFSET
);
1190 Status
= PciRootBridgeIo
->Pci
.Write (
1199 // Nofify EfiPciBeforeChildBusEnumeration for PCI Brige
1201 PreprocessController (
1203 PciDevice
->BusNumber
,
1204 PciDevice
->DeviceNumber
,
1205 PciDevice
->FunctionNumber
,
1206 EfiPciBeforeChildBusEnumeration
1209 Status
= PciScanBus (
1211 (UINT8
) (SecondBus
),
1215 if (EFI_ERROR (Status
)) {
1220 if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport
) && BusPadding
) {
1222 // Ensure the device is enabled and initialized
1224 if ((Attributes
== EfiPaddingPciRootBridge
) &&
1225 (State
& EFI_HPC_STATE_ENABLED
) != 0 &&
1226 (State
& EFI_HPC_STATE_INITIALIZED
) != 0) {
1227 *PaddedBusRange
= (UINT8
) ((UINT8
) (BusRange
) +*PaddedBusRange
);
1229 Status
= PciAllocateBusNumber (PciDevice
, *SubBusNumber
, (UINT8
) (BusRange
), SubBusNumber
);
1230 if (EFI_ERROR (Status
)) {
1237 // Set the current maximum bus number under the PPB
1239 Address
= EFI_PCI_ADDRESS (StartBusNumber
, Device
, Func
, PCI_BRIDGE_SUBORDINATE_BUS_REGISTER_OFFSET
);
1241 Status
= PciRootBridgeIo
->Pci
.Write (
1250 // It is device. Check PCI IOV for Bus reservation
1251 // Go through each function, just reserve the MAX ReservedBusNum for one device
1253 if (PcdGetBool (PcdSrIovSupport
) && PciDevice
->SrIovCapabilityOffset
!= 0) {
1254 if (TempReservedBusNum
< PciDevice
->ReservedBusNum
) {
1256 Status
= PciAllocateBusNumber (PciDevice
, *SubBusNumber
, (UINT8
) (PciDevice
->ReservedBusNum
- TempReservedBusNum
), SubBusNumber
);
1257 if (EFI_ERROR (Status
)) {
1260 TempReservedBusNum
= PciDevice
->ReservedBusNum
;
1263 DEBUG ((EFI_D_INFO
, "PCI-IOV ScanBus - SubBusNumber - 0x%x\n", *SubBusNumber
));
1265 DEBUG ((EFI_D_INFO
, "PCI-IOV ScanBus - SubBusNumber - 0x%x (Update)\n", *SubBusNumber
));
1271 if (Func
== 0 && !IS_PCI_MULTI_FUNC (&Pci
)) {
1274 // Skip sub functions, this is not a multi function device
1277 Func
= PCI_MAX_FUNC
;
1286 Process Option Rom on the specified root bridge.
1288 @param Bridge Pci root bridge device instance.
1290 @retval EFI_SUCCESS Success process.
1291 @retval other Some error occurred when processing Option Rom on the root bridge.
1295 PciRootBridgeP2CProcess (
1296 IN PCI_IO_DEVICE
*Bridge
1299 LIST_ENTRY
*CurrentLink
;
1300 PCI_IO_DEVICE
*Temp
;
1301 EFI_HPC_STATE State
;
1305 CurrentLink
= Bridge
->ChildList
.ForwardLink
;
1307 while (CurrentLink
!= NULL
&& CurrentLink
!= &Bridge
->ChildList
) {
1309 Temp
= PCI_IO_DEVICE_FROM_LINK (CurrentLink
);
1311 if (IS_CARDBUS_BRIDGE (&Temp
->Pci
)) {
1313 if (gPciHotPlugInit
!= NULL
&& Temp
->Allocated
&& FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1316 // Raise the EFI_IOB_PCI_HPC_INIT status code
1318 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
1320 EFI_IO_BUS_PCI
| EFI_IOB_PCI_HPC_INIT
,
1324 PciAddress
= EFI_PCI_ADDRESS (Temp
->BusNumber
, Temp
->DeviceNumber
, Temp
->FunctionNumber
, 0);
1325 Status
= gPciHotPlugInit
->InitializeRootHpc (
1333 if (!EFI_ERROR (Status
)) {
1334 Status
= PciBridgeEnumerator (Temp
);
1336 if (EFI_ERROR (Status
)) {
1341 CurrentLink
= CurrentLink
->ForwardLink
;
1347 if (!IsListEmpty (&Temp
->ChildList
)) {
1348 Status
= PciRootBridgeP2CProcess (Temp
);
1351 CurrentLink
= CurrentLink
->ForwardLink
;
1358 Process Option Rom on the specified host bridge.
1360 @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
1362 @retval EFI_SUCCESS Success process.
1363 @retval EFI_NOT_FOUND Can not find the root bridge instance.
1364 @retval other Some error occurred when processing Option Rom on the host bridge.
1368 PciHostBridgeP2CProcess (
1369 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
1372 EFI_HANDLE RootBridgeHandle
;
1373 PCI_IO_DEVICE
*RootBridgeDev
;
1376 if (!FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1380 RootBridgeHandle
= NULL
;
1382 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
1385 // Get RootBridg Device by handle
1387 RootBridgeDev
= GetRootBridgeByHandle (RootBridgeHandle
);
1389 if (RootBridgeDev
== NULL
) {
1390 return EFI_NOT_FOUND
;
1393 Status
= PciRootBridgeP2CProcess (RootBridgeDev
);
1394 if (EFI_ERROR (Status
)) {
1404 This function is used to enumerate the entire host bridge
1405 in a given platform.
1407 @param PciResAlloc A pointer to the PCI Host Resource Allocation protocol.
1409 @retval EFI_SUCCESS Successfully enumerated the host bridge.
1410 @retval EFI_OUT_OF_RESOURCES No enough memory available.
1411 @retval other Some error occurred when enumerating the host bridge.
1415 PciHostBridgeEnumerator (
1416 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
*PciResAlloc
1419 EFI_HANDLE RootBridgeHandle
;
1420 PCI_IO_DEVICE
*RootBridgeDev
;
1422 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
*PciRootBridgeIo
;
1424 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Descriptors
;
1425 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR
*Configuration
;
1426 UINT8 StartBusNumber
;
1427 LIST_ENTRY RootBridgeList
;
1430 if (FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1431 InitializeHotPlugSupport ();
1434 InitializeListHead (&RootBridgeList
);
1437 // Notify the bus allocation phase is about to start
1439 NotifyPhase (PciResAlloc
, EfiPciHostBridgeBeginBusAllocation
);
1441 DEBUG((EFI_D_INFO
, "PCI Bus First Scanning\n"));
1442 RootBridgeHandle
= NULL
;
1443 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
1446 // if a root bridge instance is found, create root bridge device for it
1449 RootBridgeDev
= CreateRootBridge (RootBridgeHandle
);
1451 if (RootBridgeDev
== NULL
) {
1452 return EFI_OUT_OF_RESOURCES
;
1456 // Enumerate all the buses under this root bridge
1458 Status
= PciRootBridgeEnumerator (
1463 if (gPciHotPlugInit
!= NULL
&& FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1464 InsertTailList (&RootBridgeList
, &(RootBridgeDev
->Link
));
1466 DestroyRootBridge (RootBridgeDev
);
1468 if (EFI_ERROR (Status
)) {
1474 // Notify the bus allocation phase is finished for the first time
1476 NotifyPhase (PciResAlloc
, EfiPciHostBridgeEndBusAllocation
);
1478 if (gPciHotPlugInit
!= NULL
&& FeaturePcdGet (PcdPciBusHotplugDeviceSupport
)) {
1480 // Reset all assigned PCI bus number in all PPB
1482 RootBridgeHandle
= NULL
;
1483 Link
= GetFirstNode (&RootBridgeList
);
1484 while ((PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) &&
1485 (!IsNull (&RootBridgeList
, Link
))) {
1486 RootBridgeDev
= PCI_IO_DEVICE_FROM_LINK (Link
);
1488 // Get the Bus information
1490 Status
= PciResAlloc
->StartBusEnumeration (
1493 (VOID
**) &Configuration
1495 if (EFI_ERROR (Status
)) {
1500 // Get the bus number to start with
1502 StartBusNumber
= (UINT8
) (Configuration
->AddrRangeMin
);
1504 ResetAllPpbBusNumber (
1509 FreePool (Configuration
);
1510 Link
= RemoveEntryList (Link
);
1511 DestroyRootBridge (RootBridgeDev
);
1515 // Wait for all HPC initialized
1517 Status
= AllRootHPCInitialized (STALL_1_SECOND
* 15);
1519 if (EFI_ERROR (Status
)) {
1520 DEBUG ((EFI_D_ERROR
, "Some root HPC failed to initialize\n"));
1525 // Notify the bus allocation phase is about to start for the 2nd time
1527 NotifyPhase (PciResAlloc
, EfiPciHostBridgeBeginBusAllocation
);
1529 DEBUG((EFI_D_INFO
, "PCI Bus Second Scanning\n"));
1530 RootBridgeHandle
= NULL
;
1531 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
1534 // if a root bridge instance is found, create root bridge device for it
1536 RootBridgeDev
= CreateRootBridge (RootBridgeHandle
);
1538 if (RootBridgeDev
== NULL
) {
1539 return EFI_OUT_OF_RESOURCES
;
1543 // Enumerate all the buses under this root bridge
1545 Status
= PciRootBridgeEnumerator (
1550 DestroyRootBridge (RootBridgeDev
);
1551 if (EFI_ERROR (Status
)) {
1557 // Notify the bus allocation phase is to end for the 2nd time
1559 NotifyPhase (PciResAlloc
, EfiPciHostBridgeEndBusAllocation
);
1563 // Notify the resource allocation phase is to start
1565 NotifyPhase (PciResAlloc
, EfiPciHostBridgeBeginResourceAllocation
);
1567 RootBridgeHandle
= NULL
;
1568 while (PciResAlloc
->GetNextRootBridge (PciResAlloc
, &RootBridgeHandle
) == EFI_SUCCESS
) {
1571 // if a root bridge instance is found, create root bridge device for it
1573 RootBridgeDev
= CreateRootBridge (RootBridgeHandle
);
1575 if (RootBridgeDev
== NULL
) {
1576 return EFI_OUT_OF_RESOURCES
;
1579 Status
= StartManagingRootBridge (RootBridgeDev
);
1581 if (EFI_ERROR (Status
)) {
1585 PciRootBridgeIo
= RootBridgeDev
->PciRootBridgeIo
;
1586 Status
= PciRootBridgeIo
->Configuration (PciRootBridgeIo
, (VOID
**) &Descriptors
);
1588 if (EFI_ERROR (Status
)) {
1592 Status
= PciGetBusRange (&Descriptors
, &MinBus
, NULL
, NULL
);
1594 if (EFI_ERROR (Status
)) {
1599 // Determine root bridge attribute by calling interface of Pcihostbridge
1602 DetermineRootBridgeAttributes (
1608 // Collect all the resource information under this root bridge
1609 // A database that records all the information about pci device subject to this
1610 // root bridge will then be created
1612 Status
= PciPciDeviceInfoCollector (
1617 if (EFI_ERROR (Status
)) {
1621 InsertRootBridge (RootBridgeDev
);
1624 // Record the hostbridge handle
1626 AddHostBridgeEnumerator (RootBridgeDev
->PciRootBridgeIo
->ParentHandle
);