]> git.proxmox.com Git - mirror_edk2.git/blob - MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c
projects / mirror_edk2.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
MdeModulePkg: Clean up source files
[mirror_edk2.git] / MdeModulePkg / Bus / Pci / XhciDxe / Xhci.c
1 /** @file
2 The XHCI controller driver.
3
4 Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #include "Xhci.h"
16
17 //
18 // Two arrays used to translate the XHCI port state (change)
19 // to the UEFI protocol's port state (change).
20 //
21 USB_PORT_STATE_MAP mUsbPortStateMap[] = {
22 {XHC_PORTSC_CCS, USB_PORT_STAT_CONNECTION},
23 {XHC_PORTSC_PED, USB_PORT_STAT_ENABLE},
24 {XHC_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT},
25 {XHC_PORTSC_RESET, USB_PORT_STAT_RESET}
26 };
27
28 USB_PORT_STATE_MAP mUsbPortChangeMap[] = {
29 {XHC_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION},
30 {XHC_PORTSC_PEC, USB_PORT_STAT_C_ENABLE},
31 {XHC_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT},
32 {XHC_PORTSC_PRC, USB_PORT_STAT_C_RESET}
33 };
34
35 USB_CLEAR_PORT_MAP mUsbClearPortChangeMap[] = {
36 {XHC_PORTSC_CSC, EfiUsbPortConnectChange},
37 {XHC_PORTSC_PEC, EfiUsbPortEnableChange},
38 {XHC_PORTSC_OCC, EfiUsbPortOverCurrentChange},
39 {XHC_PORTSC_PRC, EfiUsbPortResetChange}
40 };
41
42 USB_PORT_STATE_MAP mUsbHubPortStateMap[] = {
43 {XHC_HUB_PORTSC_CCS, USB_PORT_STAT_CONNECTION},
44 {XHC_HUB_PORTSC_PED, USB_PORT_STAT_ENABLE},
45 {XHC_HUB_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT},
46 {XHC_HUB_PORTSC_RESET, USB_PORT_STAT_RESET}
47 };
48
49 USB_PORT_STATE_MAP mUsbHubPortChangeMap[] = {
50 {XHC_HUB_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION},
51 {XHC_HUB_PORTSC_PEC, USB_PORT_STAT_C_ENABLE},
52 {XHC_HUB_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT},
53 {XHC_HUB_PORTSC_PRC, USB_PORT_STAT_C_RESET}
54 };
55
56 USB_CLEAR_PORT_MAP mUsbHubClearPortChangeMap[] = {
57 {XHC_HUB_PORTSC_CSC, EfiUsbPortConnectChange},
58 {XHC_HUB_PORTSC_PEC, EfiUsbPortEnableChange},
59 {XHC_HUB_PORTSC_OCC, EfiUsbPortOverCurrentChange},
60 {XHC_HUB_PORTSC_PRC, EfiUsbPortResetChange},
61 {XHC_HUB_PORTSC_BHRC, Usb3PortBHPortResetChange}
62 };
63
64 EFI_DRIVER_BINDING_PROTOCOL gXhciDriverBinding = {
65 XhcDriverBindingSupported,
66 XhcDriverBindingStart,
67 XhcDriverBindingStop,
68 0x30,
69 NULL,
70 NULL
71 };
72
73 //
74 // Template for Xhci's Usb2 Host Controller Protocol Instance.
75 //
76 EFI_USB2_HC_PROTOCOL gXhciUsb2HcTemplate = {
77 XhcGetCapability,
78 XhcReset,
79 XhcGetState,
80 XhcSetState,
81 XhcControlTransfer,
82 XhcBulkTransfer,
83 XhcAsyncInterruptTransfer,
84 XhcSyncInterruptTransfer,
85 XhcIsochronousTransfer,
86 XhcAsyncIsochronousTransfer,
87 XhcGetRootHubPortStatus,
88 XhcSetRootHubPortFeature,
89 XhcClearRootHubPortFeature,
90 0x3,
91 0x0
92 };
93
94 /**
95 Retrieves the capability of root hub ports.
96
97 @param This The EFI_USB2_HC_PROTOCOL instance.
98 @param MaxSpeed Max speed supported by the controller.
99 @param PortNumber Number of the root hub ports.
100 @param Is64BitCapable Whether the controller supports 64-bit memory
101 addressing.
102
103 @retval EFI_SUCCESS Host controller capability were retrieved successfully.
104 @retval EFI_INVALID_PARAMETER Either of the three capability pointer is NULL.
105
106 **/
107 EFI_STATUS
108 EFIAPI
109 XhcGetCapability (
110 IN EFI_USB2_HC_PROTOCOL *This,
111 OUT UINT8 *MaxSpeed,
112 OUT UINT8 *PortNumber,
113 OUT UINT8 *Is64BitCapable
114 )
115 {
116 USB_XHCI_INSTANCE *Xhc;
117 EFI_TPL OldTpl;
118
119 if ((MaxSpeed == NULL) || (PortNumber == NULL) || (Is64BitCapable == NULL)) {
120 return EFI_INVALID_PARAMETER;
121 }
122
123 OldTpl = gBS->RaiseTPL (XHC_TPL);
124
125 Xhc = XHC_FROM_THIS (This);
126 *MaxSpeed = EFI_USB_SPEED_SUPER;
127 *PortNumber = (UINT8) (Xhc->HcSParams1.Data.MaxPorts);
128 *Is64BitCapable = (UINT8) Xhc->Support64BitDma;
129 DEBUG ((EFI_D_INFO, "XhcGetCapability: %d ports, 64 bit %d\n", *PortNumber, *Is64BitCapable));
130
131 gBS->RestoreTPL (OldTpl);
132
133 return EFI_SUCCESS;
134 }
135
136
137 /**
138 Provides software reset for the USB host controller.
139
140 @param This This EFI_USB2_HC_PROTOCOL instance.
141 @param Attributes A bit mask of the reset operation to perform.
142
143 @retval EFI_SUCCESS The reset operation succeeded.
144 @retval EFI_INVALID_PARAMETER Attributes is not valid.
145 @retval EFI_UNSUPPOURTED The type of reset specified by Attributes is
146 not currently supported by the host controller.
147 @retval EFI_DEVICE_ERROR Host controller isn't halted to reset.
148
149 **/
150 EFI_STATUS
151 EFIAPI
152 XhcReset (
153 IN EFI_USB2_HC_PROTOCOL *This,
154 IN UINT16 Attributes
155 )
156 {
157 USB_XHCI_INSTANCE *Xhc;
158 EFI_STATUS Status;
159 EFI_TPL OldTpl;
160
161 Xhc = XHC_FROM_THIS (This);
162
163 if (Xhc->DevicePath != NULL) {
164 //
165 // Report Status Code to indicate reset happens
166 //
167 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
168 EFI_PROGRESS_CODE,
169 (EFI_IO_BUS_USB | EFI_IOB_PC_RESET),
170 Xhc->DevicePath
171 );
172 }
173
174 OldTpl = gBS->RaiseTPL (XHC_TPL);
175
176 switch (Attributes) {
177 case EFI_USB_HC_RESET_GLOBAL:
178 //
179 // Flow through, same behavior as Host Controller Reset
180 //
181 case EFI_USB_HC_RESET_HOST_CONTROLLER:
182 if ((Xhc->DebugCapSupOffset != 0xFFFFFFFF) && ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset) & 0xFF) == XHC_CAP_USB_DEBUG) &&
183 ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset + XHC_DC_DCCTRL) & BIT0) != 0)) {
184 Status = EFI_SUCCESS;
185 goto ON_EXIT;
186 }
187 //
188 // Host Controller must be Halt when Reset it
189 //
190 if (!XhcIsHalt (Xhc)) {
191 Status = XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
192
193 if (EFI_ERROR (Status)) {
194 Status = EFI_DEVICE_ERROR;
195 goto ON_EXIT;
196 }
197 }
198
199 Status = XhcResetHC (Xhc, XHC_RESET_TIMEOUT);
200 ASSERT (!(XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_CNR)));
201
202 if (EFI_ERROR (Status)) {
203 goto ON_EXIT;
204 }
205 //
206 // Clean up the asynchronous transfers, currently only
207 // interrupt supports asynchronous operation.
208 //
209 XhciDelAllAsyncIntTransfers (Xhc);
210 XhcFreeSched (Xhc);
211
212 XhcInitSched (Xhc);
213 break;
214
215 case EFI_USB_HC_RESET_GLOBAL_WITH_DEBUG:
216 case EFI_USB_HC_RESET_HOST_WITH_DEBUG:
217 Status = EFI_UNSUPPORTED;
218 break;
219
220 default:
221 Status = EFI_INVALID_PARAMETER;
222 }
223
224 ON_EXIT:
225 DEBUG ((EFI_D_INFO, "XhcReset: status %r\n", Status));
226 gBS->RestoreTPL (OldTpl);
227
228 return Status;
229 }
230
231
232 /**
233 Retrieve the current state of the USB host controller.
234
235 @param This This EFI_USB2_HC_PROTOCOL instance.
236 @param State Variable to return the current host controller
237 state.
238
239 @retval EFI_SUCCESS Host controller state was returned in State.
240 @retval EFI_INVALID_PARAMETER State is NULL.
241 @retval EFI_DEVICE_ERROR An error was encountered while attempting to
242 retrieve the host controller's current state.
243
244 **/
245 EFI_STATUS
246 EFIAPI
247 XhcGetState (
248 IN EFI_USB2_HC_PROTOCOL *This,
249 OUT EFI_USB_HC_STATE *State
250 )
251 {
252 USB_XHCI_INSTANCE *Xhc;
253 EFI_TPL OldTpl;
254
255 if (State == NULL) {
256 return EFI_INVALID_PARAMETER;
257 }
258
259 OldTpl = gBS->RaiseTPL (XHC_TPL);
260
261 Xhc = XHC_FROM_THIS (This);
262
263 if (XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT)) {
264 *State = EfiUsbHcStateHalt;
265 } else {
266 *State = EfiUsbHcStateOperational;
267 }
268
269 DEBUG ((EFI_D_INFO, "XhcGetState: current state %d\n", *State));
270 gBS->RestoreTPL (OldTpl);
271
272 return EFI_SUCCESS;
273 }
274
275 /**
276 Sets the USB host controller to a specific state.
277
278 @param This This EFI_USB2_HC_PROTOCOL instance.
279 @param State The state of the host controller that will be set.
280
281 @retval EFI_SUCCESS The USB host controller was successfully placed
282 in the state specified by State.
283 @retval EFI_INVALID_PARAMETER State is invalid.
284 @retval EFI_DEVICE_ERROR Failed to set the state due to device error.
285
286 **/
287 EFI_STATUS
288 EFIAPI
289 XhcSetState (
290 IN EFI_USB2_HC_PROTOCOL *This,
291 IN EFI_USB_HC_STATE State
292 )
293 {
294 USB_XHCI_INSTANCE *Xhc;
295 EFI_STATUS Status;
296 EFI_USB_HC_STATE CurState;
297 EFI_TPL OldTpl;
298
299 Status = XhcGetState (This, &CurState);
300
301 if (EFI_ERROR (Status)) {
302 return EFI_DEVICE_ERROR;
303 }
304
305 if (CurState == State) {
306 return EFI_SUCCESS;
307 }
308
309 OldTpl = gBS->RaiseTPL (XHC_TPL);
310
311 Xhc = XHC_FROM_THIS (This);
312
313 switch (State) {
314 case EfiUsbHcStateHalt:
315 Status = XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
316 break;
317
318 case EfiUsbHcStateOperational:
319 if (XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HSE)) {
320 Status = EFI_DEVICE_ERROR;
321 break;
322 }
323
324 //
325 // Software must not write a one to this field unless the host controller
326 // is in the Halted state. Doing so will yield undefined results.
327 // refers to Spec[XHCI1.0-2.3.1]
328 //
329 if (!XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT)) {
330 Status = EFI_DEVICE_ERROR;
331 break;
332 }
333
334 Status = XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
335 break;
336
337 case EfiUsbHcStateSuspend:
338 Status = EFI_UNSUPPORTED;
339 break;
340
341 default:
342 Status = EFI_INVALID_PARAMETER;
343 }
344
345 DEBUG ((EFI_D_INFO, "XhcSetState: status %r\n", Status));
346 gBS->RestoreTPL (OldTpl);
347
348 return Status;
349 }
350
351 /**
352 Retrieves the current status of a USB root hub port.
353
354 @param This This EFI_USB2_HC_PROTOCOL instance.
355 @param PortNumber The root hub port to retrieve the state from.
356 This value is zero-based.
357 @param PortStatus Variable to receive the port state.
358
359 @retval EFI_SUCCESS The status of the USB root hub port specified.
360 by PortNumber was returned in PortStatus.
361 @retval EFI_INVALID_PARAMETER PortNumber is invalid.
362 @retval EFI_DEVICE_ERROR Can't read register.
363
364 **/
365 EFI_STATUS
366 EFIAPI
367 XhcGetRootHubPortStatus (
368 IN EFI_USB2_HC_PROTOCOL *This,
369 IN UINT8 PortNumber,
370 OUT EFI_USB_PORT_STATUS *PortStatus
371 )
372 {
373 USB_XHCI_INSTANCE *Xhc;
374 UINT32 Offset;
375 UINT32 State;
376 UINT32 TotalPort;
377 UINTN Index;
378 UINTN MapSize;
379 EFI_STATUS Status;
380 USB_DEV_ROUTE ParentRouteChart;
381 EFI_TPL OldTpl;
382
383 if (PortStatus == NULL) {
384 return EFI_INVALID_PARAMETER;
385 }
386
387 OldTpl = gBS->RaiseTPL (XHC_TPL);
388
389 Xhc = XHC_FROM_THIS (This);
390 Status = EFI_SUCCESS;
391
392 TotalPort = Xhc->HcSParams1.Data.MaxPorts;
393
394 if (PortNumber >= TotalPort) {
395 Status = EFI_INVALID_PARAMETER;
396 goto ON_EXIT;
397 }
398
399 Offset = (UINT32) (XHC_PORTSC_OFFSET + (0x10 * PortNumber));
400 PortStatus->PortStatus = 0;
401 PortStatus->PortChangeStatus = 0;
402
403 State = XhcReadOpReg (Xhc, Offset);
404
405 //
406 // According to XHCI 1.0 spec, bit 10~13 of the root port status register identifies the speed of the attached device.
407 //
408 switch ((State & XHC_PORTSC_PS) >> 10) {
409 case 2:
410 PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;
411 break;
412
413 case 3:
414 PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;
415 break;
416
417 case 4:
418 PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED;
419 break;
420
421 default:
422 break;
423 }
424
425 //
426 // Convert the XHCI port/port change state to UEFI status
427 //
428 MapSize = sizeof (mUsbPortStateMap) / sizeof (USB_PORT_STATE_MAP);
429
430 for (Index = 0; Index < MapSize; Index++) {
431 if (XHC_BIT_IS_SET (State, mUsbPortStateMap[Index].HwState)) {
432 PortStatus->PortStatus = (UINT16) (PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
433 }
434 }
435 //
436 // Bit5~8 reflects its current link state.
437 //
438 if ((State & XHC_PORTSC_PLS) >> 5 == 3) {
439 PortStatus->PortStatus |= USB_PORT_STAT_SUSPEND;
440 }
441
442 MapSize = sizeof (mUsbPortChangeMap) / sizeof (USB_PORT_STATE_MAP);
443
444 for (Index = 0; Index < MapSize; Index++) {
445 if (XHC_BIT_IS_SET (State, mUsbPortChangeMap[Index].HwState)) {
446 PortStatus->PortChangeStatus = (UINT16) (PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
447 }
448 }
449
450 MapSize = sizeof (mUsbClearPortChangeMap) / sizeof (USB_CLEAR_PORT_MAP);
451
452 for (Index = 0; Index < MapSize; Index++) {
453 if (XHC_BIT_IS_SET (State, mUsbClearPortChangeMap[Index].HwState)) {
454 XhcClearRootHubPortFeature (This, PortNumber, (EFI_USB_PORT_FEATURE)mUsbClearPortChangeMap[Index].Selector);
455 }
456 }
457
458 //
459 // Poll the root port status register to enable/disable corresponding device slot if there is a device attached/detached.
460 // For those devices behind hub, we get its attach/detach event by hooking Get_Port_Status request at control transfer for those hub.
461 //
462 ParentRouteChart.Dword = 0;
463 XhcPollPortStatusChange (Xhc, ParentRouteChart, PortNumber, PortStatus);
464
465 ON_EXIT:
466 gBS->RestoreTPL (OldTpl);
467 return Status;
468 }
469
470
471 /**
472 Sets a feature for the specified root hub port.
473
474 @param This This EFI_USB2_HC_PROTOCOL instance.
475 @param PortNumber Root hub port to set.
476 @param PortFeature Feature to set.
477
478 @retval EFI_SUCCESS The feature specified by PortFeature was set.
479 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
480 @retval EFI_DEVICE_ERROR Can't read register.
481
482 **/
483 EFI_STATUS
484 EFIAPI
485 XhcSetRootHubPortFeature (
486 IN EFI_USB2_HC_PROTOCOL *This,
487 IN UINT8 PortNumber,
488 IN EFI_USB_PORT_FEATURE PortFeature
489 )
490 {
491 USB_XHCI_INSTANCE *Xhc;
492 UINT32 Offset;
493 UINT32 State;
494 UINT32 TotalPort;
495 EFI_STATUS Status;
496 EFI_TPL OldTpl;
497
498 OldTpl = gBS->RaiseTPL (XHC_TPL);
499
500 Xhc = XHC_FROM_THIS (This);
501 Status = EFI_SUCCESS;
502
503 TotalPort = (Xhc->HcSParams1.Data.MaxPorts);
504
505 if (PortNumber >= TotalPort) {
506 Status = EFI_INVALID_PARAMETER;
507 goto ON_EXIT;
508 }
509
510 Offset = (UINT32) (XHC_PORTSC_OFFSET + (0x10 * PortNumber));
511 State = XhcReadOpReg (Xhc, Offset);
512
513 //
514 // Mask off the port status change bits, these bits are
515 // write clean bit
516 //
517 State &= ~ (BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
518
519 switch (PortFeature) {
520 case EfiUsbPortEnable:
521 //
522 // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
523 // A port may be disabled by software writing a '1' to this flag.
524 //
525 Status = EFI_SUCCESS;
526 break;
527
528 case EfiUsbPortSuspend:
529 State |= XHC_PORTSC_LWS;
530 XhcWriteOpReg (Xhc, Offset, State);
531 State &= ~XHC_PORTSC_PLS;
532 State |= (3 << 5) ;
533 XhcWriteOpReg (Xhc, Offset, State);
534 break;
535
536 case EfiUsbPortReset:
537 DEBUG ((EFI_D_INFO, "XhcUsbPortReset!\n"));
538 //
539 // Make sure Host Controller not halt before reset it
540 //
541 if (XhcIsHalt (Xhc)) {
542 Status = XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
543
544 if (EFI_ERROR (Status)) {
545 DEBUG ((EFI_D_INFO, "XhcSetRootHubPortFeature :failed to start HC - %r\n", Status));
546 break;
547 }
548 }
549
550 //
551 // 4.3.1 Resetting a Root Hub Port
552 // 1) Write the PORTSC register with the Port Reset (PR) bit set to '1'.
553 //
554 State |= XHC_PORTSC_RESET;
555 XhcWriteOpReg (Xhc, Offset, State);
556 XhcWaitOpRegBit(Xhc, Offset, XHC_PORTSC_PRC, TRUE, XHC_GENERIC_TIMEOUT);
557 break;
558
559 case EfiUsbPortPower:
560 //
561 // Not supported, ignore the operation
562 //
563 Status = EFI_SUCCESS;
564 break;
565
566 case EfiUsbPortOwner:
567 //
568 // XHCI root hub port don't has the owner bit, ignore the operation
569 //
570 Status = EFI_SUCCESS;
571 break;
572
573 default:
574 Status = EFI_INVALID_PARAMETER;
575 }
576
577 ON_EXIT:
578 DEBUG ((EFI_D_INFO, "XhcSetRootHubPortFeature: status %r\n", Status));
579 gBS->RestoreTPL (OldTpl);
580
581 return Status;
582 }
583
584
585 /**
586 Clears a feature for the specified root hub port.
587
588 @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
589 @param PortNumber Specifies the root hub port whose feature is
590 requested to be cleared.
591 @param PortFeature Indicates the feature selector associated with the
592 feature clear request.
593
594 @retval EFI_SUCCESS The feature specified by PortFeature was cleared
595 for the USB root hub port specified by PortNumber.
596 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
597 @retval EFI_DEVICE_ERROR Can't read register.
598
599 **/
600 EFI_STATUS
601 EFIAPI
602 XhcClearRootHubPortFeature (
603 IN EFI_USB2_HC_PROTOCOL *This,
604 IN UINT8 PortNumber,
605 IN EFI_USB_PORT_FEATURE PortFeature
606 )
607 {
608 USB_XHCI_INSTANCE *Xhc;
609 UINT32 Offset;
610 UINT32 State;
611 UINT32 TotalPort;
612 EFI_STATUS Status;
613 EFI_TPL OldTpl;
614
615 OldTpl = gBS->RaiseTPL (XHC_TPL);
616
617 Xhc = XHC_FROM_THIS (This);
618 Status = EFI_SUCCESS;
619
620 TotalPort = (Xhc->HcSParams1.Data.MaxPorts);
621
622 if (PortNumber >= TotalPort) {
623 Status = EFI_INVALID_PARAMETER;
624 goto ON_EXIT;
625 }
626
627 Offset = XHC_PORTSC_OFFSET + (0x10 * PortNumber);
628
629 //
630 // Mask off the port status change bits, these bits are
631 // write clean bit
632 //
633 State = XhcReadOpReg (Xhc, Offset);
634 State &= ~ (BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
635
636 switch (PortFeature) {
637 case EfiUsbPortEnable:
638 //
639 // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
640 // A port may be disabled by software writing a '1' to this flag.
641 //
642 State |= XHC_PORTSC_PED;
643 State &= ~XHC_PORTSC_RESET;
644 XhcWriteOpReg (Xhc, Offset, State);
645 break;
646
647 case EfiUsbPortSuspend:
648 State |= XHC_PORTSC_LWS;
649 XhcWriteOpReg (Xhc, Offset, State);
650 State &= ~XHC_PORTSC_PLS;
651 XhcWriteOpReg (Xhc, Offset, State);
652 break;
653
654 case EfiUsbPortReset:
655 //
656 // PORTSC_RESET BIT(4) bit is RW1S attribute, which means Write-1-to-set status:
657 // Register bits indicate status when read, a clear bit may be set by
658 // writing a '1'. Writing a '0' to RW1S bits has no effect.
659 //
660 break;
661
662 case EfiUsbPortOwner:
663 //
664 // XHCI root hub port don't has the owner bit, ignore the operation
665 //
666 break;
667
668 case EfiUsbPortConnectChange:
669 //
670 // Clear connect status change
671 //
672 State |= XHC_PORTSC_CSC;
673 XhcWriteOpReg (Xhc, Offset, State);
674 break;
675
676 case EfiUsbPortEnableChange:
677 //
678 // Clear enable status change
679 //
680 State |= XHC_PORTSC_PEC;
681 XhcWriteOpReg (Xhc, Offset, State);
682 break;
683
684 case EfiUsbPortOverCurrentChange:
685 //
686 // Clear PortOverCurrent change
687 //
688 State |= XHC_PORTSC_OCC;
689 XhcWriteOpReg (Xhc, Offset, State);
690 break;
691
692 case EfiUsbPortResetChange:
693 //
694 // Clear Port Reset change
695 //
696 State |= XHC_PORTSC_PRC;
697 XhcWriteOpReg (Xhc, Offset, State);
698 break;
699
700 case EfiUsbPortPower:
701 case EfiUsbPortSuspendChange:
702 //
703 // Not supported or not related operation
704 //
705 break;
706
707 default:
708 Status = EFI_INVALID_PARAMETER;
709 break;
710 }
711
712 ON_EXIT:
713 DEBUG ((EFI_D_INFO, "XhcClearRootHubPortFeature: status %r\n", Status));
714 gBS->RestoreTPL (OldTpl);
715
716 return Status;
717 }
718
719 /**
720 Submits a new transaction to a target USB device.
721
722 @param Xhc The XHCI Instance.
723 @param DeviceAddress The target device address.
724 @param EndPointAddress Endpoint number and its direction encoded in bit 7
725 @param DeviceSpeed Target device speed.
726 @param MaximumPacketLength Maximum packet size the default control transfer
727 endpoint is capable of sending or receiving.
728 @param Type The transaction type.
729 @param Request USB device request to send.
730 @param Data Data buffer to be transmitted or received from USB
731 device.
732 @param DataLength The size (in bytes) of the data buffer.
733 @param Timeout Indicates the maximum timeout, in millisecond.
734 @param TransferResult Return the result of this control transfer.
735
736 @retval EFI_SUCCESS Transfer was completed successfully.
737 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resources.
738 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
739 @retval EFI_TIMEOUT Transfer failed due to timeout.
740 @retval EFI_DEVICE_ERROR Transfer failed due to host controller or device error.
741 **/
742 EFI_STATUS
743 XhcTransfer (
744 IN USB_XHCI_INSTANCE *Xhc,
745 IN UINT8 DeviceAddress,
746 IN UINT8 EndPointAddress,
747 IN UINT8 DeviceSpeed,
748 IN UINTN MaximumPacketLength,
749 IN UINTN Type,
750 IN EFI_USB_DEVICE_REQUEST *Request,
751 IN OUT VOID *Data,
752 IN OUT UINTN *DataLength,
753 IN UINTN Timeout,
754 OUT UINT32 *TransferResult
755 )
756 {
757 EFI_STATUS Status;
758 EFI_STATUS RecoveryStatus;
759 URB *Urb;
760
761 ASSERT ((Type == XHC_CTRL_TRANSFER) || (Type == XHC_BULK_TRANSFER) || (Type == XHC_INT_TRANSFER_SYNC));
762 Urb = XhcCreateUrb (
763 Xhc,
764 DeviceAddress,
765 EndPointAddress,
766 DeviceSpeed,
767 MaximumPacketLength,
768 Type,
769 Request,
770 Data,
771 *DataLength,
772 NULL,
773 NULL
774 );
775
776 if (Urb == NULL) {
777 DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: failed to create URB!\n", Type));
778 return EFI_OUT_OF_RESOURCES;
779 }
780
781 Status = XhcExecTransfer (Xhc, FALSE, Urb, Timeout);
782
783 if (Status == EFI_TIMEOUT) {
784 //
785 // The transfer timed out. Abort the transfer by dequeueing of the TD.
786 //
787 RecoveryStatus = XhcDequeueTrbFromEndpoint(Xhc, Urb);
788 if (RecoveryStatus == EFI_ALREADY_STARTED) {
789 //
790 // The URB is finished just before stopping endpoint.
791 // Change returning status from EFI_TIMEOUT to EFI_SUCCESS.
792 //
793 ASSERT (Urb->Result == EFI_USB_NOERROR);
794 Status = EFI_SUCCESS;
795 DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: pending URB is finished, Length = %d.\n", Type, Urb->Completed));
796 } else if (EFI_ERROR(RecoveryStatus)) {
797 DEBUG((DEBUG_ERROR, "XhcTransfer[Type=%d]: XhcDequeueTrbFromEndpoint failed!\n", Type));
798 }
799 }
800
801 *TransferResult = Urb->Result;
802 *DataLength = Urb->Completed;
803
804 if ((*TransferResult == EFI_USB_ERR_STALL) || (*TransferResult == EFI_USB_ERR_BABBLE)) {
805 ASSERT (Status == EFI_DEVICE_ERROR);
806 RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);
807 if (EFI_ERROR (RecoveryStatus)) {
808 DEBUG ((DEBUG_ERROR, "XhcTransfer[Type=%d]: XhcRecoverHaltedEndpoint failed!\n", Type));
809 }
810 }
811
812 Xhc->PciIo->Flush (Xhc->PciIo);
813 XhcFreeUrb (Xhc, Urb);
814 return Status;
815 }
816
817 /**
818 Submits control transfer to a target USB device.
819
820 @param This This EFI_USB2_HC_PROTOCOL instance.
821 @param DeviceAddress The target device address.
822 @param DeviceSpeed Target device speed.
823 @param MaximumPacketLength Maximum packet size the default control transfer
824 endpoint is capable of sending or receiving.
825 @param Request USB device request to send.
826 @param TransferDirection Specifies the data direction for the data stage
827 @param Data Data buffer to be transmitted or received from USB
828 device.
829 @param DataLength The size (in bytes) of the data buffer.
830 @param Timeout Indicates the maximum timeout, in millisecond.
831 @param Translator Transaction translator to be used by this device.
832 @param TransferResult Return the result of this control transfer.
833
834 @retval EFI_SUCCESS Transfer was completed successfully.
835 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resources.
836 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
837 @retval EFI_TIMEOUT Transfer failed due to timeout.
838 @retval EFI_DEVICE_ERROR Transfer failed due to host controller or device error.
839
840 **/
841 EFI_STATUS
842 EFIAPI
843 XhcControlTransfer (
844 IN EFI_USB2_HC_PROTOCOL *This,
845 IN UINT8 DeviceAddress,
846 IN UINT8 DeviceSpeed,
847 IN UINTN MaximumPacketLength,
848 IN EFI_USB_DEVICE_REQUEST *Request,
849 IN EFI_USB_DATA_DIRECTION TransferDirection,
850 IN OUT VOID *Data,
851 IN OUT UINTN *DataLength,
852 IN UINTN Timeout,
853 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
854 OUT UINT32 *TransferResult
855 )
856 {
857 USB_XHCI_INSTANCE *Xhc;
858 UINT8 Endpoint;
859 UINT8 Index;
860 UINT8 DescriptorType;
861 UINT8 SlotId;
862 UINT8 TTT;
863 UINT8 MTT;
864 UINT32 MaxPacket0;
865 EFI_USB_HUB_DESCRIPTOR *HubDesc;
866 EFI_TPL OldTpl;
867 EFI_STATUS Status;
868 UINTN MapSize;
869 EFI_USB_PORT_STATUS PortStatus;
870 UINT32 State;
871 EFI_USB_DEVICE_REQUEST ClearPortRequest;
872 UINTN Len;
873
874 //
875 // Validate parameters
876 //
877 if ((Request == NULL) || (TransferResult == NULL)) {
878 return EFI_INVALID_PARAMETER;
879 }
880
881 if ((TransferDirection != EfiUsbDataIn) &&
882 (TransferDirection != EfiUsbDataOut) &&
883 (TransferDirection != EfiUsbNoData)) {
884 return EFI_INVALID_PARAMETER;
885 }
886
887 if ((TransferDirection == EfiUsbNoData) &&
888 ((Data != NULL) || (*DataLength != 0))) {
889 return EFI_INVALID_PARAMETER;
890 }
891
892 if ((TransferDirection != EfiUsbNoData) &&
893 ((Data == NULL) || (*DataLength == 0))) {
894 return EFI_INVALID_PARAMETER;
895 }
896
897 if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) &&
898 (MaximumPacketLength != 32) && (MaximumPacketLength != 64) &&
899 (MaximumPacketLength != 512)
900 ) {
901 return EFI_INVALID_PARAMETER;
902 }
903
904 if ((DeviceSpeed == EFI_USB_SPEED_LOW) && (MaximumPacketLength != 8)) {
905 return EFI_INVALID_PARAMETER;
906 }
907
908 if ((DeviceSpeed == EFI_USB_SPEED_SUPER) && (MaximumPacketLength != 512)) {
909 return EFI_INVALID_PARAMETER;
910 }
911
912 OldTpl = gBS->RaiseTPL (XHC_TPL);
913
914 Xhc = XHC_FROM_THIS (This);
915
916 Status = EFI_DEVICE_ERROR;
917 *TransferResult = EFI_USB_ERR_SYSTEM;
918 Len = 0;
919
920 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
921 DEBUG ((EFI_D_ERROR, "XhcControlTransfer: HC halted at entrance\n"));
922 goto ON_EXIT;
923 }
924
925 //
926 // Check if the device is still enabled before every transaction.
927 //
928 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
929 if (SlotId == 0) {
930 goto ON_EXIT;
931 }
932
933 //
934 // Hook the Set_Address request from UsbBus.
935 // According to XHCI 1.0 spec, the Set_Address request is replaced by XHCI's Address_Device cmd.
936 //
937 if ((Request->Request == USB_REQ_SET_ADDRESS) &&
938 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE))) {
939 //
940 // Reset the BusDevAddr field of all disabled entries in UsbDevContext array firstly.
941 // This way is used to clean the history to avoid using wrong device address by XhcAsyncInterruptTransfer().
942 //
943 for (Index = 0; Index < 255; Index++) {
944 if (!Xhc->UsbDevContext[Index + 1].Enabled &&
945 (Xhc->UsbDevContext[Index + 1].SlotId == 0) &&
946 (Xhc->UsbDevContext[Index + 1].BusDevAddr == (UINT8)Request->Value)) {
947 Xhc->UsbDevContext[Index + 1].BusDevAddr = 0;
948 }
949 }
950
951 if (Xhc->UsbDevContext[SlotId].XhciDevAddr == 0) {
952 Status = EFI_DEVICE_ERROR;
953 goto ON_EXIT;
954 }
955 //
956 // The actual device address has been assigned by XHCI during initializing the device slot.
957 // So we just need establish the mapping relationship between the device address requested from UsbBus
958 // and the actual device address assigned by XHCI. The the following invocations through EFI_USB2_HC_PROTOCOL interface
959 // can find out the actual device address by it.
960 //
961 Xhc->UsbDevContext[SlotId].BusDevAddr = (UINT8)Request->Value;
962 Status = EFI_SUCCESS;
963 goto ON_EXIT;
964 }
965
966 //
967 // Create a new URB, insert it into the asynchronous
968 // schedule list, then poll the execution status.
969 // Note that we encode the direction in address although default control
970 // endpoint is bidirectional. XhcCreateUrb expects this
971 // combination of Ep addr and its direction.
972 //
973 Endpoint = (UINT8) (0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
974 Status = XhcTransfer (
975 Xhc,
976 DeviceAddress,
977 Endpoint,
978 DeviceSpeed,
979 MaximumPacketLength,
980 XHC_CTRL_TRANSFER,
981 Request,
982 Data,
983 DataLength,
984 Timeout,
985 TransferResult
986 );
987
988 if (EFI_ERROR (Status)) {
989 goto ON_EXIT;
990 }
991
992 //
993 // Hook Get_Descriptor request from UsbBus as we need evaluate context and configure endpoint.
994 // Hook Get_Status request form UsbBus as we need trace device attach/detach event happened at hub.
995 // Hook Set_Config request from UsbBus as we need configure device endpoint.
996 //
997 if ((Request->Request == USB_REQ_GET_DESCRIPTOR) &&
998 ((Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE)) ||
999 ((Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_DEVICE))))) {
1000 DescriptorType = (UINT8)(Request->Value >> 8);
1001 if ((DescriptorType == USB_DESC_TYPE_DEVICE) && ((*DataLength == sizeof (EFI_USB_DEVICE_DESCRIPTOR)) || ((DeviceSpeed == EFI_USB_SPEED_FULL) && (*DataLength == 8)))) {
1002 ASSERT (Data != NULL);
1003 //
1004 // Store a copy of device scriptor as hub device need this info to configure endpoint.
1005 //
1006 CopyMem (&Xhc->UsbDevContext[SlotId].DevDesc, Data, *DataLength);
1007 if (Xhc->UsbDevContext[SlotId].DevDesc.BcdUSB >= 0x0300) {
1008 //
1009 // If it's a usb3.0 device, then its max packet size is a 2^n.
1010 //
1011 MaxPacket0 = 1 << Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
1012 } else {
1013 MaxPacket0 = Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
1014 }
1015 Xhc->UsbDevContext[SlotId].ConfDesc = AllocateZeroPool (Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations * sizeof (EFI_USB_CONFIG_DESCRIPTOR *));
1016 if (Xhc->HcCParams.Data.Csz == 0) {
1017 Status = XhcEvaluateContext (Xhc, SlotId, MaxPacket0);
1018 } else {
1019 Status = XhcEvaluateContext64 (Xhc, SlotId, MaxPacket0);
1020 }
1021 } else if (DescriptorType == USB_DESC_TYPE_CONFIG) {
1022 ASSERT (Data != NULL);
1023 if (*DataLength == ((UINT16 *)Data)[1]) {
1024 //
1025 // Get configuration value from request, Store the configuration descriptor for Configure_Endpoint cmd.
1026 //
1027 Index = (UINT8)Request->Value;
1028 ASSERT (Index < Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations);
1029 Xhc->UsbDevContext[SlotId].ConfDesc[Index] = AllocateZeroPool(*DataLength);
1030 CopyMem (Xhc->UsbDevContext[SlotId].ConfDesc[Index], Data, *DataLength);
1031 //
1032 // Default to use AlternateSetting 0 for all interfaces.
1033 //
1034 Xhc->UsbDevContext[SlotId].ActiveAlternateSetting = AllocateZeroPool (Xhc->UsbDevContext[SlotId].ConfDesc[Index]->NumInterfaces * sizeof (UINT8));
1035 }
1036 } else if (((DescriptorType == USB_DESC_TYPE_HUB) ||
1037 (DescriptorType == USB_DESC_TYPE_HUB_SUPER_SPEED)) && (*DataLength > 2)) {
1038 ASSERT (Data != NULL);
1039 HubDesc = (EFI_USB_HUB_DESCRIPTOR *)Data;
1040 ASSERT (HubDesc->NumPorts <= 15);
1041 //
1042 // The bit 5,6 of HubCharacter field of Hub Descriptor is TTT.
1043 //
1044 TTT = (UINT8)((HubDesc->HubCharacter & (BIT5 | BIT6)) >> 5);
1045 if (Xhc->UsbDevContext[SlotId].DevDesc.DeviceProtocol == 2) {
1046 //
1047 // Don't support multi-TT feature for super speed hub now.
1048 //
1049 MTT = 0;
1050 DEBUG ((EFI_D_ERROR, "XHCI: Don't support multi-TT feature for Hub now. (force to disable MTT)\n"));
1051 } else {
1052 MTT = 0;
1053 }
1054
1055 if (Xhc->HcCParams.Data.Csz == 0) {
1056 Status = XhcConfigHubContext (Xhc, SlotId, HubDesc->NumPorts, TTT, MTT);
1057 } else {
1058 Status = XhcConfigHubContext64 (Xhc, SlotId, HubDesc->NumPorts, TTT, MTT);
1059 }
1060 }
1061 } else if ((Request->Request == USB_REQ_SET_CONFIG) &&
1062 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE))) {
1063 //
1064 // Hook Set_Config request from UsbBus as we need configure device endpoint.
1065 //
1066 for (Index = 0; Index < Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations; Index++) {
1067 if (Xhc->UsbDevContext[SlotId].ConfDesc[Index]->ConfigurationValue == (UINT8)Request->Value) {
1068 if (Xhc->HcCParams.Data.Csz == 0) {
1069 Status = XhcSetConfigCmd (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Index]);
1070 } else {
1071 Status = XhcSetConfigCmd64 (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Index]);
1072 }
1073 break;
1074 }
1075 }
1076 } else if ((Request->Request == USB_REQ_SET_INTERFACE) &&
1077 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_INTERFACE))) {
1078 //
1079 // Hook Set_Interface request from UsbBus as we need configure interface setting.
1080 // Request->Value indicates AlterlateSetting to set
1081 // Request->Index indicates Interface to set
1082 //
1083 if (Xhc->UsbDevContext[SlotId].ActiveAlternateSetting[(UINT8) Request->Index] != (UINT8) Request->Value) {
1084 if (Xhc->HcCParams.Data.Csz == 0) {
1085 Status = XhcSetInterface (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Xhc->UsbDevContext[SlotId].ActiveConfiguration - 1], Request);
1086 } else {
1087 Status = XhcSetInterface64 (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Xhc->UsbDevContext[SlotId].ActiveConfiguration - 1], Request);
1088 }
1089 }
1090 } else if ((Request->Request == USB_REQ_GET_STATUS) &&
1091 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER))) {
1092 ASSERT (Data != NULL);
1093 //
1094 // Hook Get_Status request from UsbBus to keep track of the port status change.
1095 //
1096 State = *(UINT32 *)Data;
1097 PortStatus.PortStatus = 0;
1098 PortStatus.PortChangeStatus = 0;
1099
1100 if (DeviceSpeed == EFI_USB_SPEED_SUPER) {
1101 //
1102 // For super speed hub, its bit10~12 presents the attached device speed.
1103 //
1104 if ((State & XHC_PORTSC_PS) >> 10 == 0) {
1105 PortStatus.PortStatus |= USB_PORT_STAT_SUPER_SPEED;
1106 }
1107 } else {
1108 //
1109 // For high or full/low speed hub, its bit9~10 presents the attached device speed.
1110 //
1111 if (XHC_BIT_IS_SET (State, BIT9)) {
1112 PortStatus.PortStatus |= USB_PORT_STAT_LOW_SPEED;
1113 } else if (XHC_BIT_IS_SET (State, BIT10)) {
1114 PortStatus.PortStatus |= USB_PORT_STAT_HIGH_SPEED;
1115 }
1116 }
1117
1118 //
1119 // Convert the XHCI port/port change state to UEFI status
1120 //
1121 MapSize = sizeof (mUsbHubPortStateMap) / sizeof (USB_PORT_STATE_MAP);
1122 for (Index = 0; Index < MapSize; Index++) {
1123 if (XHC_BIT_IS_SET (State, mUsbHubPortStateMap[Index].HwState)) {
1124 PortStatus.PortStatus = (UINT16) (PortStatus.PortStatus | mUsbHubPortStateMap[Index].UefiState);
1125 }
1126 }
1127
1128 MapSize = sizeof (mUsbHubPortChangeMap) / sizeof (USB_PORT_STATE_MAP);
1129 for (Index = 0; Index < MapSize; Index++) {
1130 if (XHC_BIT_IS_SET (State, mUsbHubPortChangeMap[Index].HwState)) {
1131 PortStatus.PortChangeStatus = (UINT16) (PortStatus.PortChangeStatus | mUsbHubPortChangeMap[Index].UefiState);
1132 }
1133 }
1134
1135 MapSize = sizeof (mUsbHubClearPortChangeMap) / sizeof (USB_CLEAR_PORT_MAP);
1136
1137 for (Index = 0; Index < MapSize; Index++) {
1138 if (XHC_BIT_IS_SET (State, mUsbHubClearPortChangeMap[Index].HwState)) {
1139 ZeroMem (&ClearPortRequest, sizeof (EFI_USB_DEVICE_REQUEST));
1140 ClearPortRequest.RequestType = USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER);
1141 ClearPortRequest.Request = (UINT8) USB_REQ_CLEAR_FEATURE;
1142 ClearPortRequest.Value = mUsbHubClearPortChangeMap[Index].Selector;
1143 ClearPortRequest.Index = Request->Index;
1144 ClearPortRequest.Length = 0;
1145
1146 XhcControlTransfer (
1147 This,
1148 DeviceAddress,
1149 DeviceSpeed,
1150 MaximumPacketLength,
1151 &ClearPortRequest,
1152 EfiUsbNoData,
1153 NULL,
1154 &Len,
1155 Timeout,
1156 Translator,
1157 TransferResult
1158 );
1159 }
1160 }
1161
1162 XhcPollPortStatusChange (Xhc, Xhc->UsbDevContext[SlotId].RouteString, (UINT8)Request->Index, &PortStatus);
1163
1164 *(UINT32 *)Data = *(UINT32*)&PortStatus;
1165 }
1166
1167 ON_EXIT:
1168 if (EFI_ERROR (Status)) {
1169 DEBUG ((EFI_D_ERROR, "XhcControlTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1170 }
1171
1172 gBS->RestoreTPL (OldTpl);
1173
1174 return Status;
1175 }
1176
1177
1178 /**
1179 Submits bulk transfer to a bulk endpoint of a USB device.
1180
1181 @param This This EFI_USB2_HC_PROTOCOL instance.
1182 @param DeviceAddress Target device address.
1183 @param EndPointAddress Endpoint number and its direction in bit 7.
1184 @param DeviceSpeed Device speed, Low speed device doesn't support bulk
1185 transfer.
1186 @param MaximumPacketLength Maximum packet size the endpoint is capable of
1187 sending or receiving.
1188 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1189 @param Data Array of pointers to the buffers of data to transmit
1190 from or receive into.
1191 @param DataLength The lenght of the data buffer.
1192 @param DataToggle On input, the initial data toggle for the transfer;
1193 On output, it is updated to to next data toggle to
1194 use of the subsequent bulk transfer.
1195 @param Timeout Indicates the maximum time, in millisecond, which
1196 the transfer is allowed to complete.
1197 @param Translator A pointr to the transaction translator data.
1198 @param TransferResult A pointer to the detailed result information of the
1199 bulk transfer.
1200
1201 @retval EFI_SUCCESS The transfer was completed successfully.
1202 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resource.
1203 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
1204 @retval EFI_TIMEOUT The transfer failed due to timeout.
1205 @retval EFI_DEVICE_ERROR The transfer failed due to host controller error.
1206
1207 **/
1208 EFI_STATUS
1209 EFIAPI
1210 XhcBulkTransfer (
1211 IN EFI_USB2_HC_PROTOCOL *This,
1212 IN UINT8 DeviceAddress,
1213 IN UINT8 EndPointAddress,
1214 IN UINT8 DeviceSpeed,
1215 IN UINTN MaximumPacketLength,
1216 IN UINT8 DataBuffersNumber,
1217 IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],
1218 IN OUT UINTN *DataLength,
1219 IN OUT UINT8 *DataToggle,
1220 IN UINTN Timeout,
1221 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1222 OUT UINT32 *TransferResult
1223 )
1224 {
1225 USB_XHCI_INSTANCE *Xhc;
1226 UINT8 SlotId;
1227 EFI_STATUS Status;
1228 EFI_TPL OldTpl;
1229
1230 //
1231 // Validate the parameters
1232 //
1233 if ((DataLength == NULL) || (*DataLength == 0) ||
1234 (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL)) {
1235 return EFI_INVALID_PARAMETER;
1236 }
1237
1238 if ((*DataToggle != 0) && (*DataToggle != 1)) {
1239 return EFI_INVALID_PARAMETER;
1240 }
1241
1242 if ((DeviceSpeed == EFI_USB_SPEED_LOW) ||
1243 ((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
1244 ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512)) ||
1245 ((EFI_USB_SPEED_SUPER == DeviceSpeed) && (MaximumPacketLength > 1024))) {
1246 return EFI_INVALID_PARAMETER;
1247 }
1248
1249 OldTpl = gBS->RaiseTPL (XHC_TPL);
1250
1251 Xhc = XHC_FROM_THIS (This);
1252
1253 *TransferResult = EFI_USB_ERR_SYSTEM;
1254 Status = EFI_DEVICE_ERROR;
1255
1256 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1257 DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: HC is halted\n"));
1258 goto ON_EXIT;
1259 }
1260
1261 //
1262 // Check if the device is still enabled before every transaction.
1263 //
1264 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1265 if (SlotId == 0) {
1266 goto ON_EXIT;
1267 }
1268
1269 //
1270 // Create a new URB, insert it into the asynchronous
1271 // schedule list, then poll the execution status.
1272 //
1273 Status = XhcTransfer (
1274 Xhc,
1275 DeviceAddress,
1276 EndPointAddress,
1277 DeviceSpeed,
1278 MaximumPacketLength,
1279 XHC_BULK_TRANSFER,
1280 NULL,
1281 Data[0],
1282 DataLength,
1283 Timeout,
1284 TransferResult
1285 );
1286
1287 ON_EXIT:
1288 if (EFI_ERROR (Status)) {
1289 DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1290 }
1291 gBS->RestoreTPL (OldTpl);
1292
1293 return Status;
1294 }
1295
1296 /**
1297 Submits an asynchronous interrupt transfer to an
1298 interrupt endpoint of a USB device.
1299
1300 @param This This EFI_USB2_HC_PROTOCOL instance.
1301 @param DeviceAddress Target device address.
1302 @param EndPointAddress Endpoint number and its direction encoded in bit 7
1303 @param DeviceSpeed Indicates device speed.
1304 @param MaximumPacketLength Maximum packet size the target endpoint is capable
1305 @param IsNewTransfer If TRUE, to submit an new asynchronous interrupt
1306 transfer If FALSE, to remove the specified
1307 asynchronous interrupt.
1308 @param DataToggle On input, the initial data toggle to use; on output,
1309 it is updated to indicate the next data toggle.
1310 @param PollingInterval The he interval, in milliseconds, that the transfer
1311 is polled.
1312 @param DataLength The length of data to receive at the rate specified
1313 by PollingInterval.
1314 @param Translator Transaction translator to use.
1315 @param CallBackFunction Function to call at the rate specified by
1316 PollingInterval.
1317 @param Context Context to CallBackFunction.
1318
1319 @retval EFI_SUCCESS The request has been successfully submitted or canceled.
1320 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
1321 @retval EFI_OUT_OF_RESOURCES The request failed due to a lack of resources.
1322 @retval EFI_DEVICE_ERROR The transfer failed due to host controller error.
1323
1324 **/
1325 EFI_STATUS
1326 EFIAPI
1327 XhcAsyncInterruptTransfer (
1328 IN EFI_USB2_HC_PROTOCOL *This,
1329 IN UINT8 DeviceAddress,
1330 IN UINT8 EndPointAddress,
1331 IN UINT8 DeviceSpeed,
1332 IN UINTN MaximumPacketLength,
1333 IN BOOLEAN IsNewTransfer,
1334 IN OUT UINT8 *DataToggle,
1335 IN UINTN PollingInterval,
1336 IN UINTN DataLength,
1337 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1338 IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,
1339 IN VOID *Context OPTIONAL
1340 )
1341 {
1342 USB_XHCI_INSTANCE *Xhc;
1343 URB *Urb;
1344 EFI_STATUS Status;
1345 UINT8 SlotId;
1346 UINT8 Index;
1347 UINT8 *Data;
1348 EFI_TPL OldTpl;
1349
1350 //
1351 // Validate parameters
1352 //
1353 if (!XHCI_IS_DATAIN (EndPointAddress)) {
1354 return EFI_INVALID_PARAMETER;
1355 }
1356
1357 if (IsNewTransfer) {
1358 if (DataLength == 0) {
1359 return EFI_INVALID_PARAMETER;
1360 }
1361
1362 if ((*DataToggle != 1) && (*DataToggle != 0)) {
1363 return EFI_INVALID_PARAMETER;
1364 }
1365
1366 if ((PollingInterval > 255) || (PollingInterval < 1)) {
1367 return EFI_INVALID_PARAMETER;
1368 }
1369 }
1370
1371 OldTpl = gBS->RaiseTPL (XHC_TPL);
1372
1373 Xhc = XHC_FROM_THIS (This);
1374
1375 //
1376 // Delete Async interrupt transfer request.
1377 //
1378 if (!IsNewTransfer) {
1379 //
1380 // The delete request may happen after device is detached.
1381 //
1382 for (Index = 0; Index < 255; Index++) {
1383 if (Xhc->UsbDevContext[Index + 1].BusDevAddr == DeviceAddress) {
1384 break;
1385 }
1386 }
1387
1388 if (Index == 255) {
1389 Status = EFI_INVALID_PARAMETER;
1390 goto ON_EXIT;
1391 }
1392
1393 Status = XhciDelAsyncIntTransfer (Xhc, DeviceAddress, EndPointAddress);
1394 DEBUG ((EFI_D_INFO, "XhcAsyncInterruptTransfer: remove old transfer for addr %d, Status = %r\n", DeviceAddress, Status));
1395 goto ON_EXIT;
1396 }
1397
1398 Status = EFI_SUCCESS;
1399
1400 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1401 DEBUG ((EFI_D_ERROR, "XhcAsyncInterruptTransfer: HC is halt\n"));
1402 Status = EFI_DEVICE_ERROR;
1403 goto ON_EXIT;
1404 }
1405
1406 //
1407 // Check if the device is still enabled before every transaction.
1408 //
1409 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1410 if (SlotId == 0) {
1411 goto ON_EXIT;
1412 }
1413
1414 Data = AllocateZeroPool (DataLength);
1415
1416 if (Data == NULL) {
1417 DEBUG ((EFI_D_ERROR, "XhcAsyncInterruptTransfer: failed to allocate buffer\n"));
1418 Status = EFI_OUT_OF_RESOURCES;
1419 goto ON_EXIT;
1420 }
1421
1422 Urb = XhcCreateUrb (
1423 Xhc,
1424 DeviceAddress,
1425 EndPointAddress,
1426 DeviceSpeed,
1427 MaximumPacketLength,
1428 XHC_INT_TRANSFER_ASYNC,
1429 NULL,
1430 Data,
1431 DataLength,
1432 CallBackFunction,
1433 Context
1434 );
1435
1436 if (Urb == NULL) {
1437 DEBUG ((EFI_D_ERROR, "XhcAsyncInterruptTransfer: failed to create URB\n"));
1438 FreePool (Data);
1439 Status = EFI_OUT_OF_RESOURCES;
1440 goto ON_EXIT;
1441 }
1442
1443 InsertHeadList (&Xhc->AsyncIntTransfers, &Urb->UrbList);
1444 //
1445 // Ring the doorbell
1446 //
1447 Status = RingIntTransferDoorBell (Xhc, Urb);
1448
1449 ON_EXIT:
1450 Xhc->PciIo->Flush (Xhc->PciIo);
1451 gBS->RestoreTPL (OldTpl);
1452
1453 return Status;
1454 }
1455
1456
1457 /**
1458 Submits synchronous interrupt transfer to an interrupt endpoint
1459 of a USB device.
1460
1461 @param This This EFI_USB2_HC_PROTOCOL instance.
1462 @param DeviceAddress Target device address.
1463 @param EndPointAddress Endpoint number and its direction encoded in bit 7
1464 @param DeviceSpeed Indicates device speed.
1465 @param MaximumPacketLength Maximum packet size the target endpoint is capable
1466 of sending or receiving.
1467 @param Data Buffer of data that will be transmitted to USB
1468 device or received from USB device.
1469 @param DataLength On input, the size, in bytes, of the data buffer; On
1470 output, the number of bytes transferred.
1471 @param DataToggle On input, the initial data toggle to use; on output,
1472 it is updated to indicate the next data toggle.
1473 @param Timeout Maximum time, in second, to complete.
1474 @param Translator Transaction translator to use.
1475 @param TransferResult Variable to receive the transfer result.
1476
1477 @return EFI_SUCCESS The transfer was completed successfully.
1478 @return EFI_OUT_OF_RESOURCES The transfer failed due to lack of resource.
1479 @return EFI_INVALID_PARAMETER Some parameters are invalid.
1480 @return EFI_TIMEOUT The transfer failed due to timeout.
1481 @return EFI_DEVICE_ERROR The failed due to host controller or device error
1482
1483 **/
1484 EFI_STATUS
1485 EFIAPI
1486 XhcSyncInterruptTransfer (
1487 IN EFI_USB2_HC_PROTOCOL *This,
1488 IN UINT8 DeviceAddress,
1489 IN UINT8 EndPointAddress,
1490 IN UINT8 DeviceSpeed,
1491 IN UINTN MaximumPacketLength,
1492 IN OUT VOID *Data,
1493 IN OUT UINTN *DataLength,
1494 IN OUT UINT8 *DataToggle,
1495 IN UINTN Timeout,
1496 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1497 OUT UINT32 *TransferResult
1498 )
1499 {
1500 USB_XHCI_INSTANCE *Xhc;
1501 UINT8 SlotId;
1502 EFI_STATUS Status;
1503 EFI_TPL OldTpl;
1504
1505 //
1506 // Validates parameters
1507 //
1508 if ((DataLength == NULL) || (*DataLength == 0) ||
1509 (Data == NULL) || (TransferResult == NULL)) {
1510 return EFI_INVALID_PARAMETER;
1511 }
1512
1513 if ((*DataToggle != 1) && (*DataToggle != 0)) {
1514 return EFI_INVALID_PARAMETER;
1515 }
1516
1517 if (((DeviceSpeed == EFI_USB_SPEED_LOW) && (MaximumPacketLength != 8)) ||
1518 ((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
1519 ((DeviceSpeed == EFI_USB_SPEED_HIGH) && (MaximumPacketLength > 3072))) {
1520 return EFI_INVALID_PARAMETER;
1521 }
1522
1523 OldTpl = gBS->RaiseTPL (XHC_TPL);
1524
1525 Xhc = XHC_FROM_THIS (This);
1526
1527 *TransferResult = EFI_USB_ERR_SYSTEM;
1528 Status = EFI_DEVICE_ERROR;
1529
1530 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1531 DEBUG ((EFI_D_ERROR, "EhcSyncInterruptTransfer: HC is halt\n"));
1532 goto ON_EXIT;
1533 }
1534
1535 //
1536 // Check if the device is still enabled before every transaction.
1537 //
1538 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1539 if (SlotId == 0) {
1540 goto ON_EXIT;
1541 }
1542
1543 Status = XhcTransfer (
1544 Xhc,
1545 DeviceAddress,
1546 EndPointAddress,
1547 DeviceSpeed,
1548 MaximumPacketLength,
1549 XHC_INT_TRANSFER_SYNC,
1550 NULL,
1551 Data,
1552 DataLength,
1553 Timeout,
1554 TransferResult
1555 );
1556
1557 ON_EXIT:
1558 if (EFI_ERROR (Status)) {
1559 DEBUG ((EFI_D_ERROR, "XhcSyncInterruptTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1560 }
1561 gBS->RestoreTPL (OldTpl);
1562
1563 return Status;
1564 }
1565
1566
1567 /**
1568 Submits isochronous transfer to a target USB device.
1569
1570 @param This This EFI_USB2_HC_PROTOCOL instance.
1571 @param DeviceAddress Target device address.
1572 @param EndPointAddress End point address with its direction.
1573 @param DeviceSpeed Device speed, Low speed device doesn't support this
1574 type.
1575 @param MaximumPacketLength Maximum packet size that the endpoint is capable of
1576 sending or receiving.
1577 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1578 @param Data Array of pointers to the buffers of data that will
1579 be transmitted to USB device or received from USB
1580 device.
1581 @param DataLength The size, in bytes, of the data buffer.
1582 @param Translator Transaction translator to use.
1583 @param TransferResult Variable to receive the transfer result.
1584
1585 @return EFI_UNSUPPORTED Isochronous transfer is unsupported.
1586
1587 **/
1588 EFI_STATUS
1589 EFIAPI
1590 XhcIsochronousTransfer (
1591 IN EFI_USB2_HC_PROTOCOL *This,
1592 IN UINT8 DeviceAddress,
1593 IN UINT8 EndPointAddress,
1594 IN UINT8 DeviceSpeed,
1595 IN UINTN MaximumPacketLength,
1596 IN UINT8 DataBuffersNumber,
1597 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
1598 IN UINTN DataLength,
1599 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1600 OUT UINT32 *TransferResult
1601 )
1602 {
1603 return EFI_UNSUPPORTED;
1604 }
1605
1606
1607 /**
1608 Submits Async isochronous transfer to a target USB device.
1609
1610 @param This This EFI_USB2_HC_PROTOCOL instance.
1611 @param DeviceAddress Target device address.
1612 @param EndPointAddress End point address with its direction.
1613 @param DeviceSpeed Device speed, Low speed device doesn't support this
1614 type.
1615 @param MaximumPacketLength Maximum packet size that the endpoint is capable of
1616 sending or receiving.
1617 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1618 @param Data Array of pointers to the buffers of data that will
1619 be transmitted to USB device or received from USB
1620 device.
1621 @param DataLength The size, in bytes, of the data buffer.
1622 @param Translator Transaction translator to use.
1623 @param IsochronousCallBack Function to be called when the transfer complete.
1624 @param Context Context passed to the call back function as
1625 parameter.
1626
1627 @return EFI_UNSUPPORTED Isochronous transfer isn't supported.
1628
1629 **/
1630 EFI_STATUS
1631 EFIAPI
1632 XhcAsyncIsochronousTransfer (
1633 IN EFI_USB2_HC_PROTOCOL *This,
1634 IN UINT8 DeviceAddress,
1635 IN UINT8 EndPointAddress,
1636 IN UINT8 DeviceSpeed,
1637 IN UINTN MaximumPacketLength,
1638 IN UINT8 DataBuffersNumber,
1639 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
1640 IN UINTN DataLength,
1641 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1642 IN EFI_ASYNC_USB_TRANSFER_CALLBACK IsochronousCallBack,
1643 IN VOID *Context
1644 )
1645 {
1646 return EFI_UNSUPPORTED;
1647 }
1648
1649 /**
1650 Entry point for EFI drivers.
1651
1652 @param ImageHandle EFI_HANDLE.
1653 @param SystemTable EFI_SYSTEM_TABLE.
1654
1655 @retval EFI_SUCCESS Success.
1656 @retval Others Fail.
1657
1658 **/
1659 EFI_STATUS
1660 EFIAPI
1661 XhcDriverEntryPoint (
1662 IN EFI_HANDLE ImageHandle,
1663 IN EFI_SYSTEM_TABLE *SystemTable
1664 )
1665 {
1666 return EfiLibInstallDriverBindingComponentName2 (
1667 ImageHandle,
1668 SystemTable,
1669 &gXhciDriverBinding,
1670 ImageHandle,
1671 &gXhciComponentName,
1672 &gXhciComponentName2
1673 );
1674 }
1675
1676
1677 /**
1678 Test to see if this driver supports ControllerHandle. Any
1679 ControllerHandle that has Usb2HcProtocol installed will
1680 be supported.
1681
1682 @param This Protocol instance pointer.
1683 @param Controller Handle of device to test.
1684 @param RemainingDevicePath Not used.
1685
1686 @return EFI_SUCCESS This driver supports this device.
1687 @return EFI_UNSUPPORTED This driver does not support this device.
1688
1689 **/
1690 EFI_STATUS
1691 EFIAPI
1692 XhcDriverBindingSupported (
1693 IN EFI_DRIVER_BINDING_PROTOCOL *This,
1694 IN EFI_HANDLE Controller,
1695 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
1696 )
1697 {
1698 EFI_STATUS Status;
1699 EFI_PCI_IO_PROTOCOL *PciIo;
1700 USB_CLASSC UsbClassCReg;
1701
1702 //
1703 // Test whether there is PCI IO Protocol attached on the controller handle.
1704 //
1705 Status = gBS->OpenProtocol (
1706 Controller,
1707 &gEfiPciIoProtocolGuid,
1708 (VOID **) &PciIo,
1709 This->DriverBindingHandle,
1710 Controller,
1711 EFI_OPEN_PROTOCOL_BY_DRIVER
1712 );
1713
1714 if (EFI_ERROR (Status)) {
1715 return EFI_UNSUPPORTED;
1716 }
1717
1718 Status = PciIo->Pci.Read (
1719 PciIo,
1720 EfiPciIoWidthUint8,
1721 PCI_CLASSCODE_OFFSET,
1722 sizeof (USB_CLASSC) / sizeof (UINT8),
1723 &UsbClassCReg
1724 );
1725
1726 if (EFI_ERROR (Status)) {
1727 Status = EFI_UNSUPPORTED;
1728 goto ON_EXIT;
1729 }
1730
1731 //
1732 // Test whether the controller belongs to Xhci type
1733 //
1734 if ((UsbClassCReg.BaseCode != PCI_CLASS_SERIAL) ||
1735 (UsbClassCReg.SubClassCode != PCI_CLASS_SERIAL_USB) ||
1736 (UsbClassCReg.ProgInterface != PCI_IF_XHCI)) {
1737 Status = EFI_UNSUPPORTED;
1738 }
1739
1740 ON_EXIT:
1741 gBS->CloseProtocol (
1742 Controller,
1743 &gEfiPciIoProtocolGuid,
1744 This->DriverBindingHandle,
1745 Controller
1746 );
1747
1748 return Status;
1749 }
1750
1751 /**
1752 Create and initialize a USB_XHCI_INSTANCE structure.
1753
1754 @param PciIo The PciIo on this device.
1755 @param DevicePath The device path of host controller.
1756 @param OriginalPciAttributes Original PCI attributes.
1757
1758 @return The allocated and initialized USB_XHCI_INSTANCE structure if created,
1759 otherwise NULL.
1760
1761 **/
1762 USB_XHCI_INSTANCE*
1763 XhcCreateUsbHc (
1764 IN EFI_PCI_IO_PROTOCOL *PciIo,
1765 IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
1766 IN UINT64 OriginalPciAttributes
1767 )
1768 {
1769 USB_XHCI_INSTANCE *Xhc;
1770 EFI_STATUS Status;
1771 UINT32 PageSize;
1772 UINT16 ExtCapReg;
1773
1774 Xhc = AllocateZeroPool (sizeof (USB_XHCI_INSTANCE));
1775
1776 if (Xhc == NULL) {
1777 return NULL;
1778 }
1779
1780 //
1781 // Initialize private data structure
1782 //
1783 Xhc->Signature = XHCI_INSTANCE_SIG;
1784 Xhc->PciIo = PciIo;
1785 Xhc->DevicePath = DevicePath;
1786 Xhc->OriginalPciAttributes = OriginalPciAttributes;
1787 CopyMem (&Xhc->Usb2Hc, &gXhciUsb2HcTemplate, sizeof (EFI_USB2_HC_PROTOCOL));
1788
1789 InitializeListHead (&Xhc->AsyncIntTransfers);
1790
1791 //
1792 // Be caution that the Offset passed to XhcReadCapReg() should be Dword align
1793 //
1794 Xhc->CapLength = XhcReadCapReg8 (Xhc, XHC_CAPLENGTH_OFFSET);
1795 Xhc->HcSParams1.Dword = XhcReadCapReg (Xhc, XHC_HCSPARAMS1_OFFSET);
1796 Xhc->HcSParams2.Dword = XhcReadCapReg (Xhc, XHC_HCSPARAMS2_OFFSET);
1797 Xhc->HcCParams.Dword = XhcReadCapReg (Xhc, XHC_HCCPARAMS_OFFSET);
1798 Xhc->DBOff = XhcReadCapReg (Xhc, XHC_DBOFF_OFFSET);
1799 Xhc->RTSOff = XhcReadCapReg (Xhc, XHC_RTSOFF_OFFSET);
1800
1801 //
1802 // This PageSize field defines the page size supported by the xHC implementation.
1803 // This xHC supports a page size of 2^(n+12) if bit n is Set. For example,
1804 // if bit 0 is Set, the xHC supports 4k byte page sizes.
1805 //
1806 PageSize = XhcReadOpReg(Xhc, XHC_PAGESIZE_OFFSET) & XHC_PAGESIZE_MASK;
1807 Xhc->PageSize = 1 << (HighBitSet32(PageSize) + 12);
1808
1809 ExtCapReg = (UINT16) (Xhc->HcCParams.Data.ExtCapReg);
1810 Xhc->ExtCapRegBase = ExtCapReg << 2;
1811 Xhc->UsbLegSupOffset = XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_LEGACY);
1812 Xhc->DebugCapSupOffset = XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_DEBUG);
1813
1814 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: Capability length 0x%x\n", Xhc->CapLength));
1815 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: HcSParams1 0x%x\n", Xhc->HcSParams1));
1816 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: HcSParams2 0x%x\n", Xhc->HcSParams2));
1817 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: HcCParams 0x%x\n", Xhc->HcCParams));
1818 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: DBOff 0x%x\n", Xhc->DBOff));
1819 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: RTSOff 0x%x\n", Xhc->RTSOff));
1820 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: UsbLegSupOffset 0x%x\n", Xhc->UsbLegSupOffset));
1821 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: DebugCapSupOffset 0x%x\n", Xhc->DebugCapSupOffset));
1822
1823 //
1824 // Create AsyncRequest Polling Timer
1825 //
1826 Status = gBS->CreateEvent (
1827 EVT_TIMER | EVT_NOTIFY_SIGNAL,
1828 TPL_NOTIFY,
1829 XhcMonitorAsyncRequests,
1830 Xhc,
1831 &Xhc->PollTimer
1832 );
1833
1834 if (EFI_ERROR (Status)) {
1835 goto ON_ERROR;
1836 }
1837
1838 return Xhc;
1839
1840 ON_ERROR:
1841 FreePool (Xhc);
1842 return NULL;
1843 }
1844
1845 /**
1846 One notified function to stop the Host Controller when gBS->ExitBootServices() called.
1847
1848 @param Event Pointer to this event
1849 @param Context Event handler private data
1850
1851 **/
1852 VOID
1853 EFIAPI
1854 XhcExitBootService (
1855 EFI_EVENT Event,
1856 VOID *Context
1857 )
1858
1859 {
1860 USB_XHCI_INSTANCE *Xhc;
1861 EFI_PCI_IO_PROTOCOL *PciIo;
1862
1863 Xhc = (USB_XHCI_INSTANCE*) Context;
1864 PciIo = Xhc->PciIo;
1865
1866 //
1867 // Stop AsyncRequest Polling timer then stop the XHCI driver
1868 // and uninstall the XHCI protocl.
1869 //
1870 gBS->SetTimer (Xhc->PollTimer, TimerCancel, 0);
1871 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
1872
1873 if (Xhc->PollTimer != NULL) {
1874 gBS->CloseEvent (Xhc->PollTimer);
1875 }
1876
1877 XhcClearBiosOwnership (Xhc);
1878
1879 //
1880 // Restore original PCI attributes
1881 //
1882 PciIo->Attributes (
1883 PciIo,
1884 EfiPciIoAttributeOperationSet,
1885 Xhc->OriginalPciAttributes,
1886 NULL
1887 );
1888 }
1889
1890 /**
1891 Starting the Usb XHCI Driver.
1892
1893 @param This Protocol instance pointer.
1894 @param Controller Handle of device to test.
1895 @param RemainingDevicePath Not used.
1896
1897 @return EFI_SUCCESS supports this device.
1898 @return EFI_UNSUPPORTED do not support this device.
1899 @return EFI_DEVICE_ERROR cannot be started due to device Error.
1900 @return EFI_OUT_OF_RESOURCES cannot allocate resources.
1901
1902 **/
1903 EFI_STATUS
1904 EFIAPI
1905 XhcDriverBindingStart (
1906 IN EFI_DRIVER_BINDING_PROTOCOL *This,
1907 IN EFI_HANDLE Controller,
1908 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
1909 )
1910 {
1911 EFI_STATUS Status;
1912 EFI_PCI_IO_PROTOCOL *PciIo;
1913 UINT64 Supports;
1914 UINT64 OriginalPciAttributes;
1915 BOOLEAN PciAttributesSaved;
1916 USB_XHCI_INSTANCE *Xhc;
1917 EFI_DEVICE_PATH_PROTOCOL *HcDevicePath;
1918
1919 //
1920 // Open the PciIo Protocol, then enable the USB host controller
1921 //
1922 Status = gBS->OpenProtocol (
1923 Controller,
1924 &gEfiPciIoProtocolGuid,
1925 (VOID **) &PciIo,
1926 This->DriverBindingHandle,
1927 Controller,
1928 EFI_OPEN_PROTOCOL_BY_DRIVER
1929 );
1930
1931 if (EFI_ERROR (Status)) {
1932 return Status;
1933 }
1934
1935 //
1936 // Open Device Path Protocol for on USB host controller
1937 //
1938 HcDevicePath = NULL;
1939 Status = gBS->OpenProtocol (
1940 Controller,
1941 &gEfiDevicePathProtocolGuid,
1942 (VOID **) &HcDevicePath,
1943 This->DriverBindingHandle,
1944 Controller,
1945 EFI_OPEN_PROTOCOL_GET_PROTOCOL
1946 );
1947
1948 PciAttributesSaved = FALSE;
1949 //
1950 // Save original PCI attributes
1951 //
1952 Status = PciIo->Attributes (
1953 PciIo,
1954 EfiPciIoAttributeOperationGet,
1955 0,
1956 &OriginalPciAttributes
1957 );
1958
1959 if (EFI_ERROR (Status)) {
1960 goto CLOSE_PCIIO;
1961 }
1962 PciAttributesSaved = TRUE;
1963
1964 Status = PciIo->Attributes (
1965 PciIo,
1966 EfiPciIoAttributeOperationSupported,
1967 0,
1968 &Supports
1969 );
1970 if (!EFI_ERROR (Status)) {
1971 Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;
1972 Status = PciIo->Attributes (
1973 PciIo,
1974 EfiPciIoAttributeOperationEnable,
1975 Supports,
1976 NULL
1977 );
1978 }
1979
1980 if (EFI_ERROR (Status)) {
1981 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to enable controller\n"));
1982 goto CLOSE_PCIIO;
1983 }
1984
1985 //
1986 // Create then install USB2_HC_PROTOCOL
1987 //
1988 Xhc = XhcCreateUsbHc (PciIo, HcDevicePath, OriginalPciAttributes);
1989
1990 if (Xhc == NULL) {
1991 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to create USB2_HC\n"));
1992 return EFI_OUT_OF_RESOURCES;
1993 }
1994
1995 //
1996 // Enable 64-bit DMA support in the PCI layer if this controller
1997 // supports it.
1998 //
1999 if (Xhc->HcCParams.Data.Ac64 != 0) {
2000 Status = PciIo->Attributes (
2001 PciIo,
2002 EfiPciIoAttributeOperationEnable,
2003 EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE,
2004 NULL
2005 );
2006 if (!EFI_ERROR (Status)) {
2007 Xhc->Support64BitDma = TRUE;
2008 } else {
2009 DEBUG ((EFI_D_WARN,
2010 "%a: failed to enable 64-bit DMA on 64-bit capable controller @ %p (%r)\n",
2011 __FUNCTION__, Controller, Status));
2012 }
2013 }
2014
2015 XhcSetBiosOwnership (Xhc);
2016
2017 XhcResetHC (Xhc, XHC_RESET_TIMEOUT);
2018 ASSERT (XhcIsHalt (Xhc));
2019
2020 //
2021 // After Chip Hardware Reset wait until the Controller Not Ready (CNR) flag
2022 // in the USBSTS is '0' before writing any xHC Operational or Runtime registers.
2023 //
2024 ASSERT (!(XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_CNR)));
2025
2026 //
2027 // Initialize the schedule
2028 //
2029 XhcInitSched (Xhc);
2030
2031 //
2032 // Start the Host Controller
2033 //
2034 XhcRunHC(Xhc, XHC_GENERIC_TIMEOUT);
2035
2036 //
2037 // Start the asynchronous interrupt monitor
2038 //
2039 Status = gBS->SetTimer (Xhc->PollTimer, TimerPeriodic, XHC_ASYNC_TIMER_INTERVAL);
2040 if (EFI_ERROR (Status)) {
2041 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to start async interrupt monitor\n"));
2042 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
2043 goto FREE_POOL;
2044 }
2045
2046 //
2047 // Create event to stop the HC when exit boot service.
2048 //
2049 Status = gBS->CreateEventEx (
2050 EVT_NOTIFY_SIGNAL,
2051 TPL_NOTIFY,
2052 XhcExitBootService,
2053 Xhc,
2054 &gEfiEventExitBootServicesGuid,
2055 &Xhc->ExitBootServiceEvent
2056 );
2057 if (EFI_ERROR (Status)) {
2058 goto FREE_POOL;
2059 }
2060
2061 //
2062 // Install the component name protocol, don't fail the start
2063 // because of something for display.
2064 //
2065 AddUnicodeString2 (
2066 "eng",
2067 gXhciComponentName.SupportedLanguages,
2068 &Xhc->ControllerNameTable,
2069 L"eXtensible Host Controller (USB 3.0)",
2070 TRUE
2071 );
2072 AddUnicodeString2 (
2073 "en",
2074 gXhciComponentName2.SupportedLanguages,
2075 &Xhc->ControllerNameTable,
2076 L"eXtensible Host Controller (USB 3.0)",
2077 FALSE
2078 );
2079
2080 Status = gBS->InstallProtocolInterface (
2081 &Controller,
2082 &gEfiUsb2HcProtocolGuid,
2083 EFI_NATIVE_INTERFACE,
2084 &Xhc->Usb2Hc
2085 );
2086 if (EFI_ERROR (Status)) {
2087 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to install USB2_HC Protocol\n"));
2088 goto FREE_POOL;
2089 }
2090
2091 DEBUG ((EFI_D_INFO, "XhcDriverBindingStart: XHCI started for controller @ %x\n", Controller));
2092 return EFI_SUCCESS;
2093
2094 FREE_POOL:
2095 gBS->CloseEvent (Xhc->PollTimer);
2096 XhcFreeSched (Xhc);
2097 FreePool (Xhc);
2098
2099 CLOSE_PCIIO:
2100 if (PciAttributesSaved) {
2101 //
2102 // Restore original PCI attributes
2103 //
2104 PciIo->Attributes (
2105 PciIo,
2106 EfiPciIoAttributeOperationSet,
2107 OriginalPciAttributes,
2108 NULL
2109 );
2110 }
2111
2112 gBS->CloseProtocol (
2113 Controller,
2114 &gEfiPciIoProtocolGuid,
2115 This->DriverBindingHandle,
2116 Controller
2117 );
2118
2119 return Status;
2120 }
2121
2122
2123 /**
2124 Stop this driver on ControllerHandle. Support stopping any child handles
2125 created by this driver.
2126
2127 @param This Protocol instance pointer.
2128 @param Controller Handle of device to stop driver on.
2129 @param NumberOfChildren Number of Children in the ChildHandleBuffer.
2130 @param ChildHandleBuffer List of handles for the children we need to stop.
2131
2132 @return EFI_SUCCESS Success.
2133 @return EFI_DEVICE_ERROR Fail.
2134
2135 **/
2136 EFI_STATUS
2137 EFIAPI
2138 XhcDriverBindingStop (
2139 IN EFI_DRIVER_BINDING_PROTOCOL *This,
2140 IN EFI_HANDLE Controller,
2141 IN UINTN NumberOfChildren,
2142 IN EFI_HANDLE *ChildHandleBuffer
2143 )
2144 {
2145 EFI_STATUS Status;
2146 EFI_USB2_HC_PROTOCOL *Usb2Hc;
2147 EFI_PCI_IO_PROTOCOL *PciIo;
2148 USB_XHCI_INSTANCE *Xhc;
2149 UINT8 Index;
2150
2151 //
2152 // Test whether the Controller handler passed in is a valid
2153 // Usb controller handle that should be supported, if not,
2154 // return the error status directly
2155 //
2156 Status = gBS->OpenProtocol (
2157 Controller,
2158 &gEfiUsb2HcProtocolGuid,
2159 (VOID **) &Usb2Hc,
2160 This->DriverBindingHandle,
2161 Controller,
2162 EFI_OPEN_PROTOCOL_GET_PROTOCOL
2163 );
2164
2165 if (EFI_ERROR (Status)) {
2166 return Status;
2167 }
2168
2169 Status = gBS->UninstallProtocolInterface (
2170 Controller,
2171 &gEfiUsb2HcProtocolGuid,
2172 Usb2Hc
2173 );
2174
2175 if (EFI_ERROR (Status)) {
2176 return Status;
2177 }
2178
2179 Xhc = XHC_FROM_THIS (Usb2Hc);
2180 PciIo = Xhc->PciIo;
2181
2182 //
2183 // Stop AsyncRequest Polling timer then stop the XHCI driver
2184 // and uninstall the XHCI protocl.
2185 //
2186 gBS->SetTimer (Xhc->PollTimer, TimerCancel, 0);
2187
2188 //
2189 // Disable the device slots occupied by these devices on its downstream ports.
2190 // Entry 0 is reserved.
2191 //
2192 for (Index = 0; Index < 255; Index++) {
2193 if (!Xhc->UsbDevContext[Index + 1].Enabled ||
2194 (Xhc->UsbDevContext[Index + 1].SlotId == 0)) {
2195 continue;
2196 }
2197 if (Xhc->HcCParams.Data.Csz == 0) {
2198 XhcDisableSlotCmd (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
2199 } else {
2200 XhcDisableSlotCmd64 (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
2201 }
2202 }
2203
2204 if (Xhc->PollTimer != NULL) {
2205 gBS->CloseEvent (Xhc->PollTimer);
2206 }
2207
2208 if (Xhc->ExitBootServiceEvent != NULL) {
2209 gBS->CloseEvent (Xhc->ExitBootServiceEvent);
2210 }
2211
2212 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
2213 XhcClearBiosOwnership (Xhc);
2214 XhciDelAllAsyncIntTransfers (Xhc);
2215 XhcFreeSched (Xhc);
2216
2217 if (Xhc->ControllerNameTable) {
2218 FreeUnicodeStringTable (Xhc->ControllerNameTable);
2219 }
2220
2221 //
2222 // Restore original PCI attributes
2223 //
2224 PciIo->Attributes (
2225 PciIo,
2226 EfiPciIoAttributeOperationSet,
2227 Xhc->OriginalPciAttributes,
2228 NULL
2229 );
2230
2231 gBS->CloseProtocol (
2232 Controller,
2233 &gEfiPciIoProtocolGuid,
2234 This->DriverBindingHandle,
2235 Controller
2236 );
2237
2238 FreePool (Xhc);
2239
2240 return EFI_SUCCESS;
2241 }
2242
EFI Development Kit II mirror for PVE