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[mirror_edk2.git] / MdeModulePkg / Bus / Pci / XhciDxe / Xhci.c
1 /** @file
2 The XHCI controller driver.
3
4 Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #include "Xhci.h"
16
17 //
18 // Two arrays used to translate the XHCI port state (change)
19 // to the UEFI protocol's port state (change).
20 //
21 USB_PORT_STATE_MAP mUsbPortStateMap[] = {
22 {XHC_PORTSC_CCS, USB_PORT_STAT_CONNECTION},
23 {XHC_PORTSC_PED, USB_PORT_STAT_ENABLE},
24 {XHC_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT},
25 {XHC_PORTSC_RESET, USB_PORT_STAT_RESET}
26 };
27
28 USB_PORT_STATE_MAP mUsbPortChangeMap[] = {
29 {XHC_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION},
30 {XHC_PORTSC_PEC, USB_PORT_STAT_C_ENABLE},
31 {XHC_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT},
32 {XHC_PORTSC_PRC, USB_PORT_STAT_C_RESET}
33 };
34
35 USB_CLEAR_PORT_MAP mUsbClearPortChangeMap[] = {
36 {XHC_PORTSC_CSC, EfiUsbPortConnectChange},
37 {XHC_PORTSC_PEC, EfiUsbPortEnableChange},
38 {XHC_PORTSC_OCC, EfiUsbPortOverCurrentChange},
39 {XHC_PORTSC_PRC, EfiUsbPortResetChange}
40 };
41
42 USB_PORT_STATE_MAP mUsbHubPortStateMap[] = {
43 {XHC_HUB_PORTSC_CCS, USB_PORT_STAT_CONNECTION},
44 {XHC_HUB_PORTSC_PED, USB_PORT_STAT_ENABLE},
45 {XHC_HUB_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT},
46 {XHC_HUB_PORTSC_RESET, USB_PORT_STAT_RESET}
47 };
48
49 USB_PORT_STATE_MAP mUsbHubPortChangeMap[] = {
50 {XHC_HUB_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION},
51 {XHC_HUB_PORTSC_PEC, USB_PORT_STAT_C_ENABLE},
52 {XHC_HUB_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT},
53 {XHC_HUB_PORTSC_PRC, USB_PORT_STAT_C_RESET}
54 };
55
56 USB_CLEAR_PORT_MAP mUsbHubClearPortChangeMap[] = {
57 {XHC_HUB_PORTSC_CSC, EfiUsbPortConnectChange},
58 {XHC_HUB_PORTSC_PEC, EfiUsbPortEnableChange},
59 {XHC_HUB_PORTSC_OCC, EfiUsbPortOverCurrentChange},
60 {XHC_HUB_PORTSC_PRC, EfiUsbPortResetChange},
61 {XHC_HUB_PORTSC_BHRC, Usb3PortBHPortResetChange}
62 };
63
64 EFI_DRIVER_BINDING_PROTOCOL gXhciDriverBinding = {
65 XhcDriverBindingSupported,
66 XhcDriverBindingStart,
67 XhcDriverBindingStop,
68 0x30,
69 NULL,
70 NULL
71 };
72
73 //
74 // Template for Xhci's Usb2 Host Controller Protocol Instance.
75 //
76 EFI_USB2_HC_PROTOCOL gXhciUsb2HcTemplate = {
77 XhcGetCapability,
78 XhcReset,
79 XhcGetState,
80 XhcSetState,
81 XhcControlTransfer,
82 XhcBulkTransfer,
83 XhcAsyncInterruptTransfer,
84 XhcSyncInterruptTransfer,
85 XhcIsochronousTransfer,
86 XhcAsyncIsochronousTransfer,
87 XhcGetRootHubPortStatus,
88 XhcSetRootHubPortFeature,
89 XhcClearRootHubPortFeature,
90 0x3,
91 0x0
92 };
93
94 /**
95 Retrieves the capability of root hub ports.
96
97 @param This The EFI_USB2_HC_PROTOCOL instance.
98 @param MaxSpeed Max speed supported by the controller.
99 @param PortNumber Number of the root hub ports.
100 @param Is64BitCapable Whether the controller supports 64-bit memory
101 addressing.
102
103 @retval EFI_SUCCESS Host controller capability were retrieved successfully.
104 @retval EFI_INVALID_PARAMETER Either of the three capability pointer is NULL.
105
106 **/
107 EFI_STATUS
108 EFIAPI
109 XhcGetCapability (
110 IN EFI_USB2_HC_PROTOCOL *This,
111 OUT UINT8 *MaxSpeed,
112 OUT UINT8 *PortNumber,
113 OUT UINT8 *Is64BitCapable
114 )
115 {
116 USB_XHCI_INSTANCE *Xhc;
117 EFI_TPL OldTpl;
118
119 if ((MaxSpeed == NULL) || (PortNumber == NULL) || (Is64BitCapable == NULL)) {
120 return EFI_INVALID_PARAMETER;
121 }
122
123 OldTpl = gBS->RaiseTPL (XHC_TPL);
124
125 Xhc = XHC_FROM_THIS (This);
126 *MaxSpeed = EFI_USB_SPEED_SUPER;
127 *PortNumber = (UINT8) (Xhc->HcSParams1.Data.MaxPorts);
128 *Is64BitCapable = (UINT8) (Xhc->HcCParams.Data.Ac64);
129 DEBUG ((EFI_D_INFO, "XhcGetCapability: %d ports, 64 bit %d\n", *PortNumber, *Is64BitCapable));
130
131 gBS->RestoreTPL (OldTpl);
132
133 return EFI_SUCCESS;
134 }
135
136
137 /**
138 Provides software reset for the USB host controller.
139
140 @param This This EFI_USB2_HC_PROTOCOL instance.
141 @param Attributes A bit mask of the reset operation to perform.
142
143 @retval EFI_SUCCESS The reset operation succeeded.
144 @retval EFI_INVALID_PARAMETER Attributes is not valid.
145 @retval EFI_UNSUPPOURTED The type of reset specified by Attributes is
146 not currently supported by the host controller.
147 @retval EFI_DEVICE_ERROR Host controller isn't halted to reset.
148
149 **/
150 EFI_STATUS
151 EFIAPI
152 XhcReset (
153 IN EFI_USB2_HC_PROTOCOL *This,
154 IN UINT16 Attributes
155 )
156 {
157 USB_XHCI_INSTANCE *Xhc;
158 EFI_STATUS Status;
159 EFI_TPL OldTpl;
160
161 Xhc = XHC_FROM_THIS (This);
162
163 if (Xhc->DevicePath != NULL) {
164 //
165 // Report Status Code to indicate reset happens
166 //
167 REPORT_STATUS_CODE_WITH_DEVICE_PATH (
168 EFI_PROGRESS_CODE,
169 (EFI_IO_BUS_USB | EFI_IOB_PC_RESET),
170 Xhc->DevicePath
171 );
172 }
173
174 OldTpl = gBS->RaiseTPL (XHC_TPL);
175
176 switch (Attributes) {
177 case EFI_USB_HC_RESET_GLOBAL:
178 //
179 // Flow through, same behavior as Host Controller Reset
180 //
181 case EFI_USB_HC_RESET_HOST_CONTROLLER:
182 if ((Xhc->DebugCapSupOffset != 0xFFFFFFFF) && ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset) & 0xFF) == XHC_CAP_USB_DEBUG) &&
183 ((XhcReadExtCapReg (Xhc, Xhc->DebugCapSupOffset + XHC_DC_DCCTRL) & BIT0) != 0)) {
184 Status = EFI_SUCCESS;
185 goto ON_EXIT;
186 }
187 //
188 // Host Controller must be Halt when Reset it
189 //
190 if (!XhcIsHalt (Xhc)) {
191 Status = XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
192
193 if (EFI_ERROR (Status)) {
194 Status = EFI_DEVICE_ERROR;
195 goto ON_EXIT;
196 }
197 }
198
199 Status = XhcResetHC (Xhc, XHC_RESET_TIMEOUT);
200 ASSERT (!(XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_CNR)));
201
202 if (EFI_ERROR (Status)) {
203 goto ON_EXIT;
204 }
205 //
206 // Clean up the asynchronous transfers, currently only
207 // interrupt supports asynchronous operation.
208 //
209 XhciDelAllAsyncIntTransfers (Xhc);
210 XhcFreeSched (Xhc);
211
212 XhcInitSched (Xhc);
213 break;
214
215 case EFI_USB_HC_RESET_GLOBAL_WITH_DEBUG:
216 case EFI_USB_HC_RESET_HOST_WITH_DEBUG:
217 Status = EFI_UNSUPPORTED;
218 break;
219
220 default:
221 Status = EFI_INVALID_PARAMETER;
222 }
223
224 ON_EXIT:
225 DEBUG ((EFI_D_INFO, "XhcReset: status %r\n", Status));
226 gBS->RestoreTPL (OldTpl);
227
228 return Status;
229 }
230
231
232 /**
233 Retrieve the current state of the USB host controller.
234
235 @param This This EFI_USB2_HC_PROTOCOL instance.
236 @param State Variable to return the current host controller
237 state.
238
239 @retval EFI_SUCCESS Host controller state was returned in State.
240 @retval EFI_INVALID_PARAMETER State is NULL.
241 @retval EFI_DEVICE_ERROR An error was encountered while attempting to
242 retrieve the host controller's current state.
243
244 **/
245 EFI_STATUS
246 EFIAPI
247 XhcGetState (
248 IN EFI_USB2_HC_PROTOCOL *This,
249 OUT EFI_USB_HC_STATE *State
250 )
251 {
252 USB_XHCI_INSTANCE *Xhc;
253 EFI_TPL OldTpl;
254
255 if (State == NULL) {
256 return EFI_INVALID_PARAMETER;
257 }
258
259 OldTpl = gBS->RaiseTPL (XHC_TPL);
260
261 Xhc = XHC_FROM_THIS (This);
262
263 if (XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT)) {
264 *State = EfiUsbHcStateHalt;
265 } else {
266 *State = EfiUsbHcStateOperational;
267 }
268
269 DEBUG ((EFI_D_INFO, "XhcGetState: current state %d\n", *State));
270 gBS->RestoreTPL (OldTpl);
271
272 return EFI_SUCCESS;
273 }
274
275 /**
276 Sets the USB host controller to a specific state.
277
278 @param This This EFI_USB2_HC_PROTOCOL instance.
279 @param State The state of the host controller that will be set.
280
281 @retval EFI_SUCCESS The USB host controller was successfully placed
282 in the state specified by State.
283 @retval EFI_INVALID_PARAMETER State is invalid.
284 @retval EFI_DEVICE_ERROR Failed to set the state due to device error.
285
286 **/
287 EFI_STATUS
288 EFIAPI
289 XhcSetState (
290 IN EFI_USB2_HC_PROTOCOL *This,
291 IN EFI_USB_HC_STATE State
292 )
293 {
294 USB_XHCI_INSTANCE *Xhc;
295 EFI_STATUS Status;
296 EFI_USB_HC_STATE CurState;
297 EFI_TPL OldTpl;
298
299 Status = XhcGetState (This, &CurState);
300
301 if (EFI_ERROR (Status)) {
302 return EFI_DEVICE_ERROR;
303 }
304
305 if (CurState == State) {
306 return EFI_SUCCESS;
307 }
308
309 OldTpl = gBS->RaiseTPL (XHC_TPL);
310
311 Xhc = XHC_FROM_THIS (This);
312
313 switch (State) {
314 case EfiUsbHcStateHalt:
315 Status = XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
316 break;
317
318 case EfiUsbHcStateOperational:
319 if (XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HSE)) {
320 Status = EFI_DEVICE_ERROR;
321 break;
322 }
323
324 //
325 // Software must not write a one to this field unless the host controller
326 // is in the Halted state. Doing so will yield undefined results.
327 // refers to Spec[XHCI1.0-2.3.1]
328 //
329 if (!XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT)) {
330 Status = EFI_DEVICE_ERROR;
331 break;
332 }
333
334 Status = XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
335 break;
336
337 case EfiUsbHcStateSuspend:
338 Status = EFI_UNSUPPORTED;
339 break;
340
341 default:
342 Status = EFI_INVALID_PARAMETER;
343 }
344
345 DEBUG ((EFI_D_INFO, "XhcSetState: status %r\n", Status));
346 gBS->RestoreTPL (OldTpl);
347
348 return Status;
349 }
350
351 /**
352 Retrieves the current status of a USB root hub port.
353
354 @param This This EFI_USB2_HC_PROTOCOL instance.
355 @param PortNumber The root hub port to retrieve the state from.
356 This value is zero-based.
357 @param PortStatus Variable to receive the port state.
358
359 @retval EFI_SUCCESS The status of the USB root hub port specified.
360 by PortNumber was returned in PortStatus.
361 @retval EFI_INVALID_PARAMETER PortNumber is invalid.
362 @retval EFI_DEVICE_ERROR Can't read register.
363
364 **/
365 EFI_STATUS
366 EFIAPI
367 XhcGetRootHubPortStatus (
368 IN EFI_USB2_HC_PROTOCOL *This,
369 IN UINT8 PortNumber,
370 OUT EFI_USB_PORT_STATUS *PortStatus
371 )
372 {
373 USB_XHCI_INSTANCE *Xhc;
374 UINT32 Offset;
375 UINT32 State;
376 UINT32 TotalPort;
377 UINTN Index;
378 UINTN MapSize;
379 EFI_STATUS Status;
380 USB_DEV_ROUTE ParentRouteChart;
381 EFI_TPL OldTpl;
382
383 if (PortStatus == NULL) {
384 return EFI_INVALID_PARAMETER;
385 }
386
387 OldTpl = gBS->RaiseTPL (XHC_TPL);
388
389 Xhc = XHC_FROM_THIS (This);
390 Status = EFI_SUCCESS;
391
392 TotalPort = Xhc->HcSParams1.Data.MaxPorts;
393
394 if (PortNumber >= TotalPort) {
395 Status = EFI_INVALID_PARAMETER;
396 goto ON_EXIT;
397 }
398
399 Offset = (UINT32) (XHC_PORTSC_OFFSET + (0x10 * PortNumber));
400 PortStatus->PortStatus = 0;
401 PortStatus->PortChangeStatus = 0;
402
403 State = XhcReadOpReg (Xhc, Offset);
404
405 //
406 // According to XHCI 1.0 spec, bit 10~13 of the root port status register identifies the speed of the attached device.
407 //
408 switch ((State & XHC_PORTSC_PS) >> 10) {
409 case 2:
410 PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;
411 break;
412
413 case 3:
414 PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;
415 break;
416
417 case 4:
418 PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED;
419 break;
420
421 default:
422 break;
423 }
424
425 //
426 // Convert the XHCI port/port change state to UEFI status
427 //
428 MapSize = sizeof (mUsbPortStateMap) / sizeof (USB_PORT_STATE_MAP);
429
430 for (Index = 0; Index < MapSize; Index++) {
431 if (XHC_BIT_IS_SET (State, mUsbPortStateMap[Index].HwState)) {
432 PortStatus->PortStatus = (UINT16) (PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
433 }
434 }
435 //
436 // Bit5~8 reflects its current link state.
437 //
438 if ((State & XHC_PORTSC_PLS) >> 5 == 3) {
439 PortStatus->PortStatus |= USB_PORT_STAT_SUSPEND;
440 }
441
442 MapSize = sizeof (mUsbPortChangeMap) / sizeof (USB_PORT_STATE_MAP);
443
444 for (Index = 0; Index < MapSize; Index++) {
445 if (XHC_BIT_IS_SET (State, mUsbPortChangeMap[Index].HwState)) {
446 PortStatus->PortChangeStatus = (UINT16) (PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
447 }
448 }
449
450 MapSize = sizeof (mUsbClearPortChangeMap) / sizeof (USB_CLEAR_PORT_MAP);
451
452 for (Index = 0; Index < MapSize; Index++) {
453 if (XHC_BIT_IS_SET (State, mUsbClearPortChangeMap[Index].HwState)) {
454 XhcClearRootHubPortFeature (This, PortNumber, (EFI_USB_PORT_FEATURE)mUsbClearPortChangeMap[Index].Selector);
455 }
456 }
457
458 //
459 // Poll the root port status register to enable/disable corresponding device slot if there is a device attached/detached.
460 // For those devices behind hub, we get its attach/detach event by hooking Get_Port_Status request at control transfer for those hub.
461 //
462 ParentRouteChart.Dword = 0;
463 XhcPollPortStatusChange (Xhc, ParentRouteChart, PortNumber, PortStatus);
464
465 ON_EXIT:
466 gBS->RestoreTPL (OldTpl);
467 return Status;
468 }
469
470
471 /**
472 Sets a feature for the specified root hub port.
473
474 @param This This EFI_USB2_HC_PROTOCOL instance.
475 @param PortNumber Root hub port to set.
476 @param PortFeature Feature to set.
477
478 @retval EFI_SUCCESS The feature specified by PortFeature was set.
479 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
480 @retval EFI_DEVICE_ERROR Can't read register.
481
482 **/
483 EFI_STATUS
484 EFIAPI
485 XhcSetRootHubPortFeature (
486 IN EFI_USB2_HC_PROTOCOL *This,
487 IN UINT8 PortNumber,
488 IN EFI_USB_PORT_FEATURE PortFeature
489 )
490 {
491 USB_XHCI_INSTANCE *Xhc;
492 UINT32 Offset;
493 UINT32 State;
494 UINT32 TotalPort;
495 EFI_STATUS Status;
496 EFI_TPL OldTpl;
497
498 OldTpl = gBS->RaiseTPL (XHC_TPL);
499
500 Xhc = XHC_FROM_THIS (This);
501 Status = EFI_SUCCESS;
502
503 TotalPort = (Xhc->HcSParams1.Data.MaxPorts);
504
505 if (PortNumber >= TotalPort) {
506 Status = EFI_INVALID_PARAMETER;
507 goto ON_EXIT;
508 }
509
510 Offset = (UINT32) (XHC_PORTSC_OFFSET + (0x10 * PortNumber));
511 State = XhcReadOpReg (Xhc, Offset);
512
513 //
514 // Mask off the port status change bits, these bits are
515 // write clean bit
516 //
517 State &= ~ (BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
518
519 switch (PortFeature) {
520 case EfiUsbPortEnable:
521 //
522 // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
523 // A port may be disabled by software writing a '1' to this flag.
524 //
525 Status = EFI_SUCCESS;
526 break;
527
528 case EfiUsbPortSuspend:
529 State |= XHC_PORTSC_LWS;
530 XhcWriteOpReg (Xhc, Offset, State);
531 State &= ~XHC_PORTSC_PLS;
532 State |= (3 << 5) ;
533 XhcWriteOpReg (Xhc, Offset, State);
534 break;
535
536 case EfiUsbPortReset:
537 DEBUG ((EFI_D_INFO, "XhcUsbPortReset!\n"));
538 //
539 // Make sure Host Controller not halt before reset it
540 //
541 if (XhcIsHalt (Xhc)) {
542 Status = XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
543
544 if (EFI_ERROR (Status)) {
545 DEBUG ((EFI_D_INFO, "XhcSetRootHubPortFeature :failed to start HC - %r\n", Status));
546 break;
547 }
548 }
549
550 //
551 // 4.3.1 Resetting a Root Hub Port
552 // 1) Write the PORTSC register with the Port Reset (PR) bit set to '1'.
553 //
554 State |= XHC_PORTSC_RESET;
555 XhcWriteOpReg (Xhc, Offset, State);
556 XhcWaitOpRegBit(Xhc, Offset, XHC_PORTSC_PRC, TRUE, XHC_GENERIC_TIMEOUT);
557 break;
558
559 case EfiUsbPortPower:
560 //
561 // Not supported, ignore the operation
562 //
563 Status = EFI_SUCCESS;
564 break;
565
566 case EfiUsbPortOwner:
567 //
568 // XHCI root hub port don't has the owner bit, ignore the operation
569 //
570 Status = EFI_SUCCESS;
571 break;
572
573 default:
574 Status = EFI_INVALID_PARAMETER;
575 }
576
577 ON_EXIT:
578 DEBUG ((EFI_D_INFO, "XhcSetRootHubPortFeature: status %r\n", Status));
579 gBS->RestoreTPL (OldTpl);
580
581 return Status;
582 }
583
584
585 /**
586 Clears a feature for the specified root hub port.
587
588 @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
589 @param PortNumber Specifies the root hub port whose feature is
590 requested to be cleared.
591 @param PortFeature Indicates the feature selector associated with the
592 feature clear request.
593
594 @retval EFI_SUCCESS The feature specified by PortFeature was cleared
595 for the USB root hub port specified by PortNumber.
596 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
597 @retval EFI_DEVICE_ERROR Can't read register.
598
599 **/
600 EFI_STATUS
601 EFIAPI
602 XhcClearRootHubPortFeature (
603 IN EFI_USB2_HC_PROTOCOL *This,
604 IN UINT8 PortNumber,
605 IN EFI_USB_PORT_FEATURE PortFeature
606 )
607 {
608 USB_XHCI_INSTANCE *Xhc;
609 UINT32 Offset;
610 UINT32 State;
611 UINT32 TotalPort;
612 EFI_STATUS Status;
613 EFI_TPL OldTpl;
614
615 OldTpl = gBS->RaiseTPL (XHC_TPL);
616
617 Xhc = XHC_FROM_THIS (This);
618 Status = EFI_SUCCESS;
619
620 TotalPort = (Xhc->HcSParams1.Data.MaxPorts);
621
622 if (PortNumber >= TotalPort) {
623 Status = EFI_INVALID_PARAMETER;
624 goto ON_EXIT;
625 }
626
627 Offset = XHC_PORTSC_OFFSET + (0x10 * PortNumber);
628
629 //
630 // Mask off the port status change bits, these bits are
631 // write clean bit
632 //
633 State = XhcReadOpReg (Xhc, Offset);
634 State &= ~ (BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
635
636 switch (PortFeature) {
637 case EfiUsbPortEnable:
638 //
639 // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
640 // A port may be disabled by software writing a '1' to this flag.
641 //
642 State |= XHC_PORTSC_PED;
643 State &= ~XHC_PORTSC_RESET;
644 XhcWriteOpReg (Xhc, Offset, State);
645 break;
646
647 case EfiUsbPortSuspend:
648 State |= XHC_PORTSC_LWS;
649 XhcWriteOpReg (Xhc, Offset, State);
650 State &= ~XHC_PORTSC_PLS;
651 XhcWriteOpReg (Xhc, Offset, State);
652 break;
653
654 case EfiUsbPortReset:
655 //
656 // PORTSC_RESET BIT(4) bit is RW1S attribute, which means Write-1-to-set status:
657 // Register bits indicate status when read, a clear bit may be set by
658 // writing a '1'. Writing a '0' to RW1S bits has no effect.
659 //
660 break;
661
662 case EfiUsbPortOwner:
663 //
664 // XHCI root hub port don't has the owner bit, ignore the operation
665 //
666 break;
667
668 case EfiUsbPortConnectChange:
669 //
670 // Clear connect status change
671 //
672 State |= XHC_PORTSC_CSC;
673 XhcWriteOpReg (Xhc, Offset, State);
674 break;
675
676 case EfiUsbPortEnableChange:
677 //
678 // Clear enable status change
679 //
680 State |= XHC_PORTSC_PEC;
681 XhcWriteOpReg (Xhc, Offset, State);
682 break;
683
684 case EfiUsbPortOverCurrentChange:
685 //
686 // Clear PortOverCurrent change
687 //
688 State |= XHC_PORTSC_OCC;
689 XhcWriteOpReg (Xhc, Offset, State);
690 break;
691
692 case EfiUsbPortResetChange:
693 //
694 // Clear Port Reset change
695 //
696 State |= XHC_PORTSC_PRC;
697 XhcWriteOpReg (Xhc, Offset, State);
698 break;
699
700 case EfiUsbPortPower:
701 case EfiUsbPortSuspendChange:
702 //
703 // Not supported or not related operation
704 //
705 break;
706
707 default:
708 Status = EFI_INVALID_PARAMETER;
709 break;
710 }
711
712 ON_EXIT:
713 DEBUG ((EFI_D_INFO, "XhcClearRootHubPortFeature: status %r\n", Status));
714 gBS->RestoreTPL (OldTpl);
715
716 return Status;
717 }
718
719
720 /**
721 Submits control transfer to a target USB device.
722
723 @param This This EFI_USB2_HC_PROTOCOL instance.
724 @param DeviceAddress The target device address.
725 @param DeviceSpeed Target device speed.
726 @param MaximumPacketLength Maximum packet size the default control transfer
727 endpoint is capable of sending or receiving.
728 @param Request USB device request to send.
729 @param TransferDirection Specifies the data direction for the data stage
730 @param Data Data buffer to be transmitted or received from USB
731 device.
732 @param DataLength The size (in bytes) of the data buffer.
733 @param Timeout Indicates the maximum timeout, in millisecond.
734 @param Translator Transaction translator to be used by this device.
735 @param TransferResult Return the result of this control transfer.
736
737 @retval EFI_SUCCESS Transfer was completed successfully.
738 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resources.
739 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
740 @retval EFI_TIMEOUT Transfer failed due to timeout.
741 @retval EFI_DEVICE_ERROR Transfer failed due to host controller or device error.
742
743 **/
744 EFI_STATUS
745 EFIAPI
746 XhcControlTransfer (
747 IN EFI_USB2_HC_PROTOCOL *This,
748 IN UINT8 DeviceAddress,
749 IN UINT8 DeviceSpeed,
750 IN UINTN MaximumPacketLength,
751 IN EFI_USB_DEVICE_REQUEST *Request,
752 IN EFI_USB_DATA_DIRECTION TransferDirection,
753 IN OUT VOID *Data,
754 IN OUT UINTN *DataLength,
755 IN UINTN Timeout,
756 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
757 OUT UINT32 *TransferResult
758 )
759 {
760 USB_XHCI_INSTANCE *Xhc;
761 URB *Urb;
762 UINT8 Endpoint;
763 UINT8 Index;
764 UINT8 DescriptorType;
765 UINT8 SlotId;
766 UINT8 TTT;
767 UINT8 MTT;
768 UINT32 MaxPacket0;
769 EFI_USB_HUB_DESCRIPTOR *HubDesc;
770 EFI_TPL OldTpl;
771 EFI_STATUS Status;
772 EFI_STATUS RecoveryStatus;
773 UINTN MapSize;
774 EFI_USB_PORT_STATUS PortStatus;
775 UINT32 State;
776 EFI_USB_DEVICE_REQUEST ClearPortRequest;
777 UINTN Len;
778
779 //
780 // Validate parameters
781 //
782 if ((Request == NULL) || (TransferResult == NULL)) {
783 return EFI_INVALID_PARAMETER;
784 }
785
786 if ((TransferDirection != EfiUsbDataIn) &&
787 (TransferDirection != EfiUsbDataOut) &&
788 (TransferDirection != EfiUsbNoData)) {
789 return EFI_INVALID_PARAMETER;
790 }
791
792 if ((TransferDirection == EfiUsbNoData) &&
793 ((Data != NULL) || (*DataLength != 0))) {
794 return EFI_INVALID_PARAMETER;
795 }
796
797 if ((TransferDirection != EfiUsbNoData) &&
798 ((Data == NULL) || (*DataLength == 0))) {
799 return EFI_INVALID_PARAMETER;
800 }
801
802 if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) &&
803 (MaximumPacketLength != 32) && (MaximumPacketLength != 64) &&
804 (MaximumPacketLength != 512)
805 ) {
806 return EFI_INVALID_PARAMETER;
807 }
808
809 if ((DeviceSpeed == EFI_USB_SPEED_LOW) && (MaximumPacketLength != 8)) {
810 return EFI_INVALID_PARAMETER;
811 }
812
813 if ((DeviceSpeed == EFI_USB_SPEED_SUPER) && (MaximumPacketLength != 512)) {
814 return EFI_INVALID_PARAMETER;
815 }
816
817 OldTpl = gBS->RaiseTPL (XHC_TPL);
818
819 Xhc = XHC_FROM_THIS (This);
820
821 Status = EFI_DEVICE_ERROR;
822 *TransferResult = EFI_USB_ERR_SYSTEM;
823 Len = 0;
824
825 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
826 DEBUG ((EFI_D_ERROR, "XhcControlTransfer: HC halted at entrance\n"));
827 goto ON_EXIT;
828 }
829
830 //
831 // Check if the device is still enabled before every transaction.
832 //
833 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
834 if (SlotId == 0) {
835 goto ON_EXIT;
836 }
837
838 //
839 // Hook the Set_Address request from UsbBus.
840 // According to XHCI 1.0 spec, the Set_Address request is replaced by XHCI's Address_Device cmd.
841 //
842 if ((Request->Request == USB_REQ_SET_ADDRESS) &&
843 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE))) {
844 //
845 // Reset the BusDevAddr field of all disabled entries in UsbDevContext array firstly.
846 // This way is used to clean the history to avoid using wrong device address by XhcAsyncInterruptTransfer().
847 //
848 for (Index = 0; Index < 255; Index++) {
849 if (!Xhc->UsbDevContext[Index + 1].Enabled &&
850 (Xhc->UsbDevContext[Index + 1].SlotId == 0) &&
851 (Xhc->UsbDevContext[Index + 1].BusDevAddr == (UINT8)Request->Value)) {
852 Xhc->UsbDevContext[Index + 1].BusDevAddr = 0;
853 }
854 }
855
856 if (Xhc->UsbDevContext[SlotId].XhciDevAddr == 0) {
857 Status = EFI_DEVICE_ERROR;
858 goto ON_EXIT;
859 }
860 //
861 // The actual device address has been assigned by XHCI during initializing the device slot.
862 // So we just need establish the mapping relationship between the device address requested from UsbBus
863 // and the actual device address assigned by XHCI. The the following invocations through EFI_USB2_HC_PROTOCOL interface
864 // can find out the actual device address by it.
865 //
866 Xhc->UsbDevContext[SlotId].BusDevAddr = (UINT8)Request->Value;
867 Status = EFI_SUCCESS;
868 goto ON_EXIT;
869 }
870
871 //
872 // Create a new URB, insert it into the asynchronous
873 // schedule list, then poll the execution status.
874 // Note that we encode the direction in address although default control
875 // endpoint is bidirectional. XhcCreateUrb expects this
876 // combination of Ep addr and its direction.
877 //
878 Endpoint = (UINT8) (0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
879 Urb = XhcCreateUrb (
880 Xhc,
881 DeviceAddress,
882 Endpoint,
883 DeviceSpeed,
884 MaximumPacketLength,
885 XHC_CTRL_TRANSFER,
886 Request,
887 Data,
888 *DataLength,
889 NULL,
890 NULL
891 );
892
893 if (Urb == NULL) {
894 DEBUG ((EFI_D_ERROR, "XhcControlTransfer: failed to create URB"));
895 Status = EFI_OUT_OF_RESOURCES;
896 goto ON_EXIT;
897 }
898
899 Status = XhcExecTransfer (Xhc, FALSE, Urb, Timeout);
900
901 //
902 // Get the status from URB. The result is updated in XhcCheckUrbResult
903 // which is called by XhcExecTransfer
904 //
905 *TransferResult = Urb->Result;
906 *DataLength = Urb->Completed;
907
908 if (*TransferResult == EFI_USB_NOERROR) {
909 Status = EFI_SUCCESS;
910 } else if (*TransferResult == EFI_USB_ERR_STALL) {
911 RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);
912 if (EFI_ERROR (RecoveryStatus)) {
913 DEBUG ((EFI_D_ERROR, "XhcControlTransfer: XhcRecoverHaltedEndpoint failed\n"));
914 }
915 Status = EFI_DEVICE_ERROR;
916 goto FREE_URB;
917 } else {
918 goto FREE_URB;
919 }
920
921 Xhc->PciIo->Flush (Xhc->PciIo);
922
923 if (Urb->DataMap != NULL) {
924 Status = Xhc->PciIo->Unmap (Xhc->PciIo, Urb->DataMap);
925 ASSERT_EFI_ERROR (Status);
926 if (EFI_ERROR (Status)) {
927 Status = EFI_DEVICE_ERROR;
928 goto FREE_URB;
929 }
930 }
931
932 //
933 // Hook Get_Descriptor request from UsbBus as we need evaluate context and configure endpoint.
934 // Hook Get_Status request form UsbBus as we need trace device attach/detach event happened at hub.
935 // Hook Set_Config request from UsbBus as we need configure device endpoint.
936 //
937 if ((Request->Request == USB_REQ_GET_DESCRIPTOR) &&
938 ((Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE)) ||
939 ((Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_DEVICE))))) {
940 DescriptorType = (UINT8)(Request->Value >> 8);
941 if ((DescriptorType == USB_DESC_TYPE_DEVICE) && ((*DataLength == sizeof (EFI_USB_DEVICE_DESCRIPTOR)) || ((DeviceSpeed == EFI_USB_SPEED_FULL) && (*DataLength == 8)))) {
942 ASSERT (Data != NULL);
943 //
944 // Store a copy of device scriptor as hub device need this info to configure endpoint.
945 //
946 CopyMem (&Xhc->UsbDevContext[SlotId].DevDesc, Data, *DataLength);
947 if (Xhc->UsbDevContext[SlotId].DevDesc.BcdUSB == 0x0300) {
948 //
949 // If it's a usb3.0 device, then its max packet size is a 2^n.
950 //
951 MaxPacket0 = 1 << Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
952 } else {
953 MaxPacket0 = Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
954 }
955 Xhc->UsbDevContext[SlotId].ConfDesc = AllocateZeroPool (Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations * sizeof (EFI_USB_CONFIG_DESCRIPTOR *));
956 if (Xhc->HcCParams.Data.Csz == 0) {
957 Status = XhcEvaluateContext (Xhc, SlotId, MaxPacket0);
958 } else {
959 Status = XhcEvaluateContext64 (Xhc, SlotId, MaxPacket0);
960 }
961 } else if (DescriptorType == USB_DESC_TYPE_CONFIG) {
962 ASSERT (Data != NULL);
963 if (*DataLength == ((UINT16 *)Data)[1]) {
964 //
965 // Get configuration value from request, Store the configuration descriptor for Configure_Endpoint cmd.
966 //
967 Index = (UINT8)Request->Value;
968 ASSERT (Index < Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations);
969 Xhc->UsbDevContext[SlotId].ConfDesc[Index] = AllocateZeroPool(*DataLength);
970 CopyMem (Xhc->UsbDevContext[SlotId].ConfDesc[Index], Data, *DataLength);
971 //
972 // Default to use AlternateSetting 0 for all interfaces.
973 //
974 Xhc->UsbDevContext[SlotId].ActiveAlternateSetting = AllocateZeroPool (Xhc->UsbDevContext[SlotId].ConfDesc[Index]->NumInterfaces * sizeof (UINT8));
975 }
976 } else if (((DescriptorType == USB_DESC_TYPE_HUB) ||
977 (DescriptorType == USB_DESC_TYPE_HUB_SUPER_SPEED)) && (*DataLength > 2)) {
978 ASSERT (Data != NULL);
979 HubDesc = (EFI_USB_HUB_DESCRIPTOR *)Data;
980 ASSERT (HubDesc->NumPorts <= 15);
981 //
982 // The bit 5,6 of HubCharacter field of Hub Descriptor is TTT.
983 //
984 TTT = (UINT8)((HubDesc->HubCharacter & (BIT5 | BIT6)) >> 5);
985 if (Xhc->UsbDevContext[SlotId].DevDesc.DeviceProtocol == 2) {
986 //
987 // Don't support multi-TT feature for super speed hub now.
988 //
989 MTT = 0;
990 DEBUG ((EFI_D_ERROR, "XHCI: Don't support multi-TT feature for Hub now. (force to disable MTT)\n"));
991 } else {
992 MTT = 0;
993 }
994
995 if (Xhc->HcCParams.Data.Csz == 0) {
996 Status = XhcConfigHubContext (Xhc, SlotId, HubDesc->NumPorts, TTT, MTT);
997 } else {
998 Status = XhcConfigHubContext64 (Xhc, SlotId, HubDesc->NumPorts, TTT, MTT);
999 }
1000 }
1001 } else if ((Request->Request == USB_REQ_SET_CONFIG) &&
1002 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE))) {
1003 //
1004 // Hook Set_Config request from UsbBus as we need configure device endpoint.
1005 //
1006 for (Index = 0; Index < Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations; Index++) {
1007 if (Xhc->UsbDevContext[SlotId].ConfDesc[Index]->ConfigurationValue == (UINT8)Request->Value) {
1008 if (Xhc->HcCParams.Data.Csz == 0) {
1009 Status = XhcSetConfigCmd (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Index]);
1010 } else {
1011 Status = XhcSetConfigCmd64 (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Index]);
1012 }
1013 break;
1014 }
1015 }
1016 } else if ((Request->Request == USB_REQ_SET_INTERFACE) &&
1017 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_INTERFACE))) {
1018 //
1019 // Hook Set_Interface request from UsbBus as we need configure interface setting.
1020 // Request->Value indicates AlterlateSetting to set
1021 // Request->Index indicates Interface to set
1022 //
1023 if (Xhc->UsbDevContext[SlotId].ActiveAlternateSetting[(UINT8) Request->Index] != (UINT8) Request->Value) {
1024 if (Xhc->HcCParams.Data.Csz == 0) {
1025 Status = XhcSetInterface (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Xhc->UsbDevContext[SlotId].ActiveConfiguration - 1], Request);
1026 } else {
1027 Status = XhcSetInterface64 (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Xhc->UsbDevContext[SlotId].ActiveConfiguration - 1], Request);
1028 }
1029 }
1030 } else if ((Request->Request == USB_REQ_GET_STATUS) &&
1031 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER))) {
1032 ASSERT (Data != NULL);
1033 //
1034 // Hook Get_Status request from UsbBus to keep track of the port status change.
1035 //
1036 State = *(UINT32 *)Data;
1037 PortStatus.PortStatus = 0;
1038 PortStatus.PortChangeStatus = 0;
1039
1040 if (DeviceSpeed == EFI_USB_SPEED_SUPER) {
1041 //
1042 // For super speed hub, its bit10~12 presents the attached device speed.
1043 //
1044 if ((State & XHC_PORTSC_PS) >> 10 == 0) {
1045 PortStatus.PortStatus |= USB_PORT_STAT_SUPER_SPEED;
1046 }
1047 } else {
1048 //
1049 // For high or full/low speed hub, its bit9~10 presents the attached device speed.
1050 //
1051 if (XHC_BIT_IS_SET (State, BIT9)) {
1052 PortStatus.PortStatus |= USB_PORT_STAT_LOW_SPEED;
1053 } else if (XHC_BIT_IS_SET (State, BIT10)) {
1054 PortStatus.PortStatus |= USB_PORT_STAT_HIGH_SPEED;
1055 }
1056 }
1057
1058 //
1059 // Convert the XHCI port/port change state to UEFI status
1060 //
1061 MapSize = sizeof (mUsbHubPortStateMap) / sizeof (USB_PORT_STATE_MAP);
1062 for (Index = 0; Index < MapSize; Index++) {
1063 if (XHC_BIT_IS_SET (State, mUsbHubPortStateMap[Index].HwState)) {
1064 PortStatus.PortStatus = (UINT16) (PortStatus.PortStatus | mUsbHubPortStateMap[Index].UefiState);
1065 }
1066 }
1067
1068 MapSize = sizeof (mUsbHubPortChangeMap) / sizeof (USB_PORT_STATE_MAP);
1069 for (Index = 0; Index < MapSize; Index++) {
1070 if (XHC_BIT_IS_SET (State, mUsbHubPortChangeMap[Index].HwState)) {
1071 PortStatus.PortChangeStatus = (UINT16) (PortStatus.PortChangeStatus | mUsbHubPortChangeMap[Index].UefiState);
1072 }
1073 }
1074
1075 MapSize = sizeof (mUsbHubClearPortChangeMap) / sizeof (USB_CLEAR_PORT_MAP);
1076
1077 for (Index = 0; Index < MapSize; Index++) {
1078 if (XHC_BIT_IS_SET (State, mUsbHubClearPortChangeMap[Index].HwState)) {
1079 ZeroMem (&ClearPortRequest, sizeof (EFI_USB_DEVICE_REQUEST));
1080 ClearPortRequest.RequestType = USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER);
1081 ClearPortRequest.Request = (UINT8) USB_REQ_CLEAR_FEATURE;
1082 ClearPortRequest.Value = mUsbHubClearPortChangeMap[Index].Selector;
1083 ClearPortRequest.Index = Request->Index;
1084 ClearPortRequest.Length = 0;
1085
1086 XhcControlTransfer (
1087 This,
1088 DeviceAddress,
1089 DeviceSpeed,
1090 MaximumPacketLength,
1091 &ClearPortRequest,
1092 EfiUsbNoData,
1093 NULL,
1094 &Len,
1095 Timeout,
1096 Translator,
1097 TransferResult
1098 );
1099 }
1100 }
1101
1102 XhcPollPortStatusChange (Xhc, Xhc->UsbDevContext[SlotId].RouteString, (UINT8)Request->Index, &PortStatus);
1103
1104 *(UINT32 *)Data = *(UINT32*)&PortStatus;
1105 }
1106
1107 FREE_URB:
1108 FreePool (Urb);
1109
1110 ON_EXIT:
1111
1112 if (EFI_ERROR (Status)) {
1113 DEBUG ((EFI_D_ERROR, "XhcControlTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1114 }
1115
1116 gBS->RestoreTPL (OldTpl);
1117
1118 return Status;
1119 }
1120
1121
1122 /**
1123 Submits bulk transfer to a bulk endpoint of a USB device.
1124
1125 @param This This EFI_USB2_HC_PROTOCOL instance.
1126 @param DeviceAddress Target device address.
1127 @param EndPointAddress Endpoint number and its direction in bit 7.
1128 @param DeviceSpeed Device speed, Low speed device doesn't support bulk
1129 transfer.
1130 @param MaximumPacketLength Maximum packet size the endpoint is capable of
1131 sending or receiving.
1132 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1133 @param Data Array of pointers to the buffers of data to transmit
1134 from or receive into.
1135 @param DataLength The lenght of the data buffer.
1136 @param DataToggle On input, the initial data toggle for the transfer;
1137 On output, it is updated to to next data toggle to
1138 use of the subsequent bulk transfer.
1139 @param Timeout Indicates the maximum time, in millisecond, which
1140 the transfer is allowed to complete.
1141 @param Translator A pointr to the transaction translator data.
1142 @param TransferResult A pointer to the detailed result information of the
1143 bulk transfer.
1144
1145 @retval EFI_SUCCESS The transfer was completed successfully.
1146 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resource.
1147 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
1148 @retval EFI_TIMEOUT The transfer failed due to timeout.
1149 @retval EFI_DEVICE_ERROR The transfer failed due to host controller error.
1150
1151 **/
1152 EFI_STATUS
1153 EFIAPI
1154 XhcBulkTransfer (
1155 IN EFI_USB2_HC_PROTOCOL *This,
1156 IN UINT8 DeviceAddress,
1157 IN UINT8 EndPointAddress,
1158 IN UINT8 DeviceSpeed,
1159 IN UINTN MaximumPacketLength,
1160 IN UINT8 DataBuffersNumber,
1161 IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],
1162 IN OUT UINTN *DataLength,
1163 IN OUT UINT8 *DataToggle,
1164 IN UINTN Timeout,
1165 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1166 OUT UINT32 *TransferResult
1167 )
1168 {
1169 USB_XHCI_INSTANCE *Xhc;
1170 URB *Urb;
1171 UINT8 SlotId;
1172 EFI_STATUS Status;
1173 EFI_STATUS RecoveryStatus;
1174 EFI_TPL OldTpl;
1175
1176 //
1177 // Validate the parameters
1178 //
1179 if ((DataLength == NULL) || (*DataLength == 0) ||
1180 (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL)) {
1181 return EFI_INVALID_PARAMETER;
1182 }
1183
1184 if ((*DataToggle != 0) && (*DataToggle != 1)) {
1185 return EFI_INVALID_PARAMETER;
1186 }
1187
1188 if ((DeviceSpeed == EFI_USB_SPEED_LOW) ||
1189 ((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
1190 ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512)) ||
1191 ((EFI_USB_SPEED_SUPER == DeviceSpeed) && (MaximumPacketLength > 1024))) {
1192 return EFI_INVALID_PARAMETER;
1193 }
1194
1195 OldTpl = gBS->RaiseTPL (XHC_TPL);
1196
1197 Xhc = XHC_FROM_THIS (This);
1198
1199 *TransferResult = EFI_USB_ERR_SYSTEM;
1200 Status = EFI_DEVICE_ERROR;
1201
1202 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1203 DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: HC is halted\n"));
1204 goto ON_EXIT;
1205 }
1206
1207 //
1208 // Check if the device is still enabled before every transaction.
1209 //
1210 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1211 if (SlotId == 0) {
1212 goto ON_EXIT;
1213 }
1214
1215 //
1216 // Create a new URB, insert it into the asynchronous
1217 // schedule list, then poll the execution status.
1218 //
1219 Urb = XhcCreateUrb (
1220 Xhc,
1221 DeviceAddress,
1222 EndPointAddress,
1223 DeviceSpeed,
1224 MaximumPacketLength,
1225 XHC_BULK_TRANSFER,
1226 NULL,
1227 Data[0],
1228 *DataLength,
1229 NULL,
1230 NULL
1231 );
1232
1233 if (Urb == NULL) {
1234 DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: failed to create URB\n"));
1235 Status = EFI_OUT_OF_RESOURCES;
1236 goto ON_EXIT;
1237 }
1238
1239 Status = XhcExecTransfer (Xhc, FALSE, Urb, Timeout);
1240
1241 *TransferResult = Urb->Result;
1242 *DataLength = Urb->Completed;
1243
1244 if (*TransferResult == EFI_USB_NOERROR) {
1245 Status = EFI_SUCCESS;
1246 } else if (*TransferResult == EFI_USB_ERR_STALL) {
1247 RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);
1248 if (EFI_ERROR (RecoveryStatus)) {
1249 DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: XhcRecoverHaltedEndpoint failed\n"));
1250 }
1251 Status = EFI_DEVICE_ERROR;
1252 }
1253
1254 Xhc->PciIo->Flush (Xhc->PciIo);
1255 XhcFreeUrb (Xhc, Urb);
1256
1257 ON_EXIT:
1258
1259 if (EFI_ERROR (Status)) {
1260 DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1261 }
1262 gBS->RestoreTPL (OldTpl);
1263
1264 return Status;
1265 }
1266
1267 /**
1268 Submits an asynchronous interrupt transfer to an
1269 interrupt endpoint of a USB device.
1270
1271 @param This This EFI_USB2_HC_PROTOCOL instance.
1272 @param DeviceAddress Target device address.
1273 @param EndPointAddress Endpoint number and its direction encoded in bit 7
1274 @param DeviceSpeed Indicates device speed.
1275 @param MaximumPacketLength Maximum packet size the target endpoint is capable
1276 @param IsNewTransfer If TRUE, to submit an new asynchronous interrupt
1277 transfer If FALSE, to remove the specified
1278 asynchronous interrupt.
1279 @param DataToggle On input, the initial data toggle to use; on output,
1280 it is updated to indicate the next data toggle.
1281 @param PollingInterval The he interval, in milliseconds, that the transfer
1282 is polled.
1283 @param DataLength The length of data to receive at the rate specified
1284 by PollingInterval.
1285 @param Translator Transaction translator to use.
1286 @param CallBackFunction Function to call at the rate specified by
1287 PollingInterval.
1288 @param Context Context to CallBackFunction.
1289
1290 @retval EFI_SUCCESS The request has been successfully submitted or canceled.
1291 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
1292 @retval EFI_OUT_OF_RESOURCES The request failed due to a lack of resources.
1293 @retval EFI_DEVICE_ERROR The transfer failed due to host controller error.
1294
1295 **/
1296 EFI_STATUS
1297 EFIAPI
1298 XhcAsyncInterruptTransfer (
1299 IN EFI_USB2_HC_PROTOCOL *This,
1300 IN UINT8 DeviceAddress,
1301 IN UINT8 EndPointAddress,
1302 IN UINT8 DeviceSpeed,
1303 IN UINTN MaximumPacketLength,
1304 IN BOOLEAN IsNewTransfer,
1305 IN OUT UINT8 *DataToggle,
1306 IN UINTN PollingInterval,
1307 IN UINTN DataLength,
1308 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1309 IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,
1310 IN VOID *Context OPTIONAL
1311 )
1312 {
1313 USB_XHCI_INSTANCE *Xhc;
1314 URB *Urb;
1315 EFI_STATUS Status;
1316 UINT8 SlotId;
1317 UINT8 Index;
1318 UINT8 *Data;
1319 EFI_TPL OldTpl;
1320
1321 //
1322 // Validate parameters
1323 //
1324 if (!XHCI_IS_DATAIN (EndPointAddress)) {
1325 return EFI_INVALID_PARAMETER;
1326 }
1327
1328 if (IsNewTransfer) {
1329 if (DataLength == 0) {
1330 return EFI_INVALID_PARAMETER;
1331 }
1332
1333 if ((*DataToggle != 1) && (*DataToggle != 0)) {
1334 return EFI_INVALID_PARAMETER;
1335 }
1336
1337 if ((PollingInterval > 255) || (PollingInterval < 1)) {
1338 return EFI_INVALID_PARAMETER;
1339 }
1340 }
1341
1342 OldTpl = gBS->RaiseTPL (XHC_TPL);
1343
1344 Xhc = XHC_FROM_THIS (This);
1345
1346 //
1347 // Delete Async interrupt transfer request.
1348 //
1349 if (!IsNewTransfer) {
1350 //
1351 // The delete request may happen after device is detached.
1352 //
1353 for (Index = 0; Index < 255; Index++) {
1354 if (Xhc->UsbDevContext[Index + 1].BusDevAddr == DeviceAddress) {
1355 break;
1356 }
1357 }
1358
1359 if (Index == 255) {
1360 Status = EFI_INVALID_PARAMETER;
1361 goto ON_EXIT;
1362 }
1363
1364 Status = XhciDelAsyncIntTransfer (Xhc, DeviceAddress, EndPointAddress);
1365 DEBUG ((EFI_D_INFO, "XhcAsyncInterruptTransfer: remove old transfer for addr %d, Status = %r\n", DeviceAddress, Status));
1366 goto ON_EXIT;
1367 }
1368
1369 Status = EFI_SUCCESS;
1370
1371 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1372 DEBUG ((EFI_D_ERROR, "XhcAsyncInterruptTransfer: HC is halt\n"));
1373 Status = EFI_DEVICE_ERROR;
1374 goto ON_EXIT;
1375 }
1376
1377 //
1378 // Check if the device is still enabled before every transaction.
1379 //
1380 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1381 if (SlotId == 0) {
1382 goto ON_EXIT;
1383 }
1384
1385 Data = AllocateZeroPool (DataLength);
1386
1387 if (Data == NULL) {
1388 DEBUG ((EFI_D_ERROR, "XhcAsyncInterruptTransfer: failed to allocate buffer\n"));
1389 Status = EFI_OUT_OF_RESOURCES;
1390 goto ON_EXIT;
1391 }
1392
1393 Urb = XhcCreateUrb (
1394 Xhc,
1395 DeviceAddress,
1396 EndPointAddress,
1397 DeviceSpeed,
1398 MaximumPacketLength,
1399 XHC_INT_TRANSFER_ASYNC,
1400 NULL,
1401 Data,
1402 DataLength,
1403 CallBackFunction,
1404 Context
1405 );
1406
1407 if (Urb == NULL) {
1408 DEBUG ((EFI_D_ERROR, "XhcAsyncInterruptTransfer: failed to create URB\n"));
1409 FreePool (Data);
1410 Status = EFI_OUT_OF_RESOURCES;
1411 goto ON_EXIT;
1412 }
1413
1414 InsertHeadList (&Xhc->AsyncIntTransfers, &Urb->UrbList);
1415 //
1416 // Ring the doorbell
1417 //
1418 Status = RingIntTransferDoorBell (Xhc, Urb);
1419
1420 ON_EXIT:
1421 Xhc->PciIo->Flush (Xhc->PciIo);
1422 gBS->RestoreTPL (OldTpl);
1423
1424 return Status;
1425 }
1426
1427
1428 /**
1429 Submits synchronous interrupt transfer to an interrupt endpoint
1430 of a USB device.
1431
1432 @param This This EFI_USB2_HC_PROTOCOL instance.
1433 @param DeviceAddress Target device address.
1434 @param EndPointAddress Endpoint number and its direction encoded in bit 7
1435 @param DeviceSpeed Indicates device speed.
1436 @param MaximumPacketLength Maximum packet size the target endpoint is capable
1437 of sending or receiving.
1438 @param Data Buffer of data that will be transmitted to USB
1439 device or received from USB device.
1440 @param DataLength On input, the size, in bytes, of the data buffer; On
1441 output, the number of bytes transferred.
1442 @param DataToggle On input, the initial data toggle to use; on output,
1443 it is updated to indicate the next data toggle.
1444 @param Timeout Maximum time, in second, to complete.
1445 @param Translator Transaction translator to use.
1446 @param TransferResult Variable to receive the transfer result.
1447
1448 @return EFI_SUCCESS The transfer was completed successfully.
1449 @return EFI_OUT_OF_RESOURCES The transfer failed due to lack of resource.
1450 @return EFI_INVALID_PARAMETER Some parameters are invalid.
1451 @return EFI_TIMEOUT The transfer failed due to timeout.
1452 @return EFI_DEVICE_ERROR The failed due to host controller or device error
1453
1454 **/
1455 EFI_STATUS
1456 EFIAPI
1457 XhcSyncInterruptTransfer (
1458 IN EFI_USB2_HC_PROTOCOL *This,
1459 IN UINT8 DeviceAddress,
1460 IN UINT8 EndPointAddress,
1461 IN UINT8 DeviceSpeed,
1462 IN UINTN MaximumPacketLength,
1463 IN OUT VOID *Data,
1464 IN OUT UINTN *DataLength,
1465 IN OUT UINT8 *DataToggle,
1466 IN UINTN Timeout,
1467 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1468 OUT UINT32 *TransferResult
1469 )
1470 {
1471 USB_XHCI_INSTANCE *Xhc;
1472 URB *Urb;
1473 UINT8 SlotId;
1474 EFI_STATUS Status;
1475 EFI_STATUS RecoveryStatus;
1476 EFI_TPL OldTpl;
1477
1478 //
1479 // Validates parameters
1480 //
1481 if ((DataLength == NULL) || (*DataLength == 0) ||
1482 (Data == NULL) || (TransferResult == NULL)) {
1483 return EFI_INVALID_PARAMETER;
1484 }
1485
1486 if (!XHCI_IS_DATAIN (EndPointAddress)) {
1487 return EFI_INVALID_PARAMETER;
1488 }
1489
1490 if ((*DataToggle != 1) && (*DataToggle != 0)) {
1491 return EFI_INVALID_PARAMETER;
1492 }
1493
1494 if (((DeviceSpeed == EFI_USB_SPEED_LOW) && (MaximumPacketLength != 8)) ||
1495 ((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
1496 ((DeviceSpeed == EFI_USB_SPEED_HIGH) && (MaximumPacketLength > 3072))) {
1497 return EFI_INVALID_PARAMETER;
1498 }
1499
1500 OldTpl = gBS->RaiseTPL (XHC_TPL);
1501
1502 Xhc = XHC_FROM_THIS (This);
1503
1504 *TransferResult = EFI_USB_ERR_SYSTEM;
1505 Status = EFI_DEVICE_ERROR;
1506
1507 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1508 DEBUG ((EFI_D_ERROR, "EhcSyncInterruptTransfer: HC is halt\n"));
1509 goto ON_EXIT;
1510 }
1511
1512 //
1513 // Check if the device is still enabled before every transaction.
1514 //
1515 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1516 if (SlotId == 0) {
1517 goto ON_EXIT;
1518 }
1519
1520 Urb = XhcCreateUrb (
1521 Xhc,
1522 DeviceAddress,
1523 EndPointAddress,
1524 DeviceSpeed,
1525 MaximumPacketLength,
1526 XHC_INT_TRANSFER_SYNC,
1527 NULL,
1528 Data,
1529 *DataLength,
1530 NULL,
1531 NULL
1532 );
1533
1534 if (Urb == NULL) {
1535 DEBUG ((EFI_D_ERROR, "XhcSyncInterruptTransfer: failed to create URB\n"));
1536 Status = EFI_OUT_OF_RESOURCES;
1537 goto ON_EXIT;
1538 }
1539
1540 Status = XhcExecTransfer (Xhc, FALSE, Urb, Timeout);
1541
1542 *TransferResult = Urb->Result;
1543 *DataLength = Urb->Completed;
1544
1545 if (*TransferResult == EFI_USB_NOERROR) {
1546 Status = EFI_SUCCESS;
1547 } else if (*TransferResult == EFI_USB_ERR_STALL) {
1548 RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);
1549 if (EFI_ERROR (RecoveryStatus)) {
1550 DEBUG ((EFI_D_ERROR, "XhcSyncInterruptTransfer: XhcRecoverHaltedEndpoint failed\n"));
1551 }
1552 Status = EFI_DEVICE_ERROR;
1553 }
1554
1555 Xhc->PciIo->Flush (Xhc->PciIo);
1556 XhcFreeUrb (Xhc, Urb);
1557
1558 ON_EXIT:
1559 if (EFI_ERROR (Status)) {
1560 DEBUG ((EFI_D_ERROR, "XhcSyncInterruptTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1561 }
1562 gBS->RestoreTPL (OldTpl);
1563
1564 return Status;
1565 }
1566
1567
1568 /**
1569 Submits isochronous transfer to a target USB device.
1570
1571 @param This This EFI_USB2_HC_PROTOCOL instance.
1572 @param DeviceAddress Target device address.
1573 @param EndPointAddress End point address with its direction.
1574 @param DeviceSpeed Device speed, Low speed device doesn't support this
1575 type.
1576 @param MaximumPacketLength Maximum packet size that the endpoint is capable of
1577 sending or receiving.
1578 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1579 @param Data Array of pointers to the buffers of data that will
1580 be transmitted to USB device or received from USB
1581 device.
1582 @param DataLength The size, in bytes, of the data buffer.
1583 @param Translator Transaction translator to use.
1584 @param TransferResult Variable to receive the transfer result.
1585
1586 @return EFI_UNSUPPORTED Isochronous transfer is unsupported.
1587
1588 **/
1589 EFI_STATUS
1590 EFIAPI
1591 XhcIsochronousTransfer (
1592 IN EFI_USB2_HC_PROTOCOL *This,
1593 IN UINT8 DeviceAddress,
1594 IN UINT8 EndPointAddress,
1595 IN UINT8 DeviceSpeed,
1596 IN UINTN MaximumPacketLength,
1597 IN UINT8 DataBuffersNumber,
1598 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
1599 IN UINTN DataLength,
1600 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1601 OUT UINT32 *TransferResult
1602 )
1603 {
1604 return EFI_UNSUPPORTED;
1605 }
1606
1607
1608 /**
1609 Submits Async isochronous transfer to a target USB device.
1610
1611 @param This This EFI_USB2_HC_PROTOCOL instance.
1612 @param DeviceAddress Target device address.
1613 @param EndPointAddress End point address with its direction.
1614 @param DeviceSpeed Device speed, Low speed device doesn't support this
1615 type.
1616 @param MaximumPacketLength Maximum packet size that the endpoint is capable of
1617 sending or receiving.
1618 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1619 @param Data Array of pointers to the buffers of data that will
1620 be transmitted to USB device or received from USB
1621 device.
1622 @param DataLength The size, in bytes, of the data buffer.
1623 @param Translator Transaction translator to use.
1624 @param IsochronousCallBack Function to be called when the transfer complete.
1625 @param Context Context passed to the call back function as
1626 parameter.
1627
1628 @return EFI_UNSUPPORTED Isochronous transfer isn't supported.
1629
1630 **/
1631 EFI_STATUS
1632 EFIAPI
1633 XhcAsyncIsochronousTransfer (
1634 IN EFI_USB2_HC_PROTOCOL *This,
1635 IN UINT8 DeviceAddress,
1636 IN UINT8 EndPointAddress,
1637 IN UINT8 DeviceSpeed,
1638 IN UINTN MaximumPacketLength,
1639 IN UINT8 DataBuffersNumber,
1640 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
1641 IN UINTN DataLength,
1642 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1643 IN EFI_ASYNC_USB_TRANSFER_CALLBACK IsochronousCallBack,
1644 IN VOID *Context
1645 )
1646 {
1647 return EFI_UNSUPPORTED;
1648 }
1649
1650 /**
1651 Entry point for EFI drivers.
1652
1653 @param ImageHandle EFI_HANDLE.
1654 @param SystemTable EFI_SYSTEM_TABLE.
1655
1656 @retval EFI_SUCCESS Success.
1657 @retval Others Fail.
1658
1659 **/
1660 EFI_STATUS
1661 EFIAPI
1662 XhcDriverEntryPoint (
1663 IN EFI_HANDLE ImageHandle,
1664 IN EFI_SYSTEM_TABLE *SystemTable
1665 )
1666 {
1667 return EfiLibInstallDriverBindingComponentName2 (
1668 ImageHandle,
1669 SystemTable,
1670 &gXhciDriverBinding,
1671 ImageHandle,
1672 &gXhciComponentName,
1673 &gXhciComponentName2
1674 );
1675 }
1676
1677
1678 /**
1679 Test to see if this driver supports ControllerHandle. Any
1680 ControllerHandle that has Usb2HcProtocol installed will
1681 be supported.
1682
1683 @param This Protocol instance pointer.
1684 @param Controller Handle of device to test.
1685 @param RemainingDevicePath Not used.
1686
1687 @return EFI_SUCCESS This driver supports this device.
1688 @return EFI_UNSUPPORTED This driver does not support this device.
1689
1690 **/
1691 EFI_STATUS
1692 EFIAPI
1693 XhcDriverBindingSupported (
1694 IN EFI_DRIVER_BINDING_PROTOCOL *This,
1695 IN EFI_HANDLE Controller,
1696 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
1697 )
1698 {
1699 EFI_STATUS Status;
1700 EFI_PCI_IO_PROTOCOL *PciIo;
1701 USB_CLASSC UsbClassCReg;
1702
1703 //
1704 // Test whether there is PCI IO Protocol attached on the controller handle.
1705 //
1706 Status = gBS->OpenProtocol (
1707 Controller,
1708 &gEfiPciIoProtocolGuid,
1709 (VOID **) &PciIo,
1710 This->DriverBindingHandle,
1711 Controller,
1712 EFI_OPEN_PROTOCOL_BY_DRIVER
1713 );
1714
1715 if (EFI_ERROR (Status)) {
1716 return EFI_UNSUPPORTED;
1717 }
1718
1719 Status = PciIo->Pci.Read (
1720 PciIo,
1721 EfiPciIoWidthUint8,
1722 PCI_CLASSCODE_OFFSET,
1723 sizeof (USB_CLASSC) / sizeof (UINT8),
1724 &UsbClassCReg
1725 );
1726
1727 if (EFI_ERROR (Status)) {
1728 Status = EFI_UNSUPPORTED;
1729 goto ON_EXIT;
1730 }
1731
1732 //
1733 // Test whether the controller belongs to Xhci type
1734 //
1735 if ((UsbClassCReg.BaseCode != PCI_CLASS_SERIAL) ||
1736 (UsbClassCReg.SubClassCode != PCI_CLASS_SERIAL_USB) ||
1737 (UsbClassCReg.ProgInterface != PCI_IF_XHCI)) {
1738 Status = EFI_UNSUPPORTED;
1739 }
1740
1741 ON_EXIT:
1742 gBS->CloseProtocol (
1743 Controller,
1744 &gEfiPciIoProtocolGuid,
1745 This->DriverBindingHandle,
1746 Controller
1747 );
1748
1749 return Status;
1750 }
1751
1752 /**
1753 Create and initialize a USB_XHCI_INSTANCE structure.
1754
1755 @param PciIo The PciIo on this device.
1756 @param DevicePath The device path of host controller.
1757 @param OriginalPciAttributes Original PCI attributes.
1758
1759 @return The allocated and initialized USB_XHCI_INSTANCE structure if created,
1760 otherwise NULL.
1761
1762 **/
1763 USB_XHCI_INSTANCE*
1764 XhcCreateUsbHc (
1765 IN EFI_PCI_IO_PROTOCOL *PciIo,
1766 IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,
1767 IN UINT64 OriginalPciAttributes
1768 )
1769 {
1770 USB_XHCI_INSTANCE *Xhc;
1771 EFI_STATUS Status;
1772 UINT32 PageSize;
1773 UINT16 ExtCapReg;
1774
1775 Xhc = AllocateZeroPool (sizeof (USB_XHCI_INSTANCE));
1776
1777 if (Xhc == NULL) {
1778 return NULL;
1779 }
1780
1781 //
1782 // Initialize private data structure
1783 //
1784 Xhc->Signature = XHCI_INSTANCE_SIG;
1785 Xhc->PciIo = PciIo;
1786 Xhc->DevicePath = DevicePath;
1787 Xhc->OriginalPciAttributes = OriginalPciAttributes;
1788 CopyMem (&Xhc->Usb2Hc, &gXhciUsb2HcTemplate, sizeof (EFI_USB2_HC_PROTOCOL));
1789
1790 InitializeListHead (&Xhc->AsyncIntTransfers);
1791
1792 //
1793 // Be caution that the Offset passed to XhcReadCapReg() should be Dword align
1794 //
1795 Xhc->CapLength = XhcReadCapReg8 (Xhc, XHC_CAPLENGTH_OFFSET);
1796 Xhc->HcSParams1.Dword = XhcReadCapReg (Xhc, XHC_HCSPARAMS1_OFFSET);
1797 Xhc->HcSParams2.Dword = XhcReadCapReg (Xhc, XHC_HCSPARAMS2_OFFSET);
1798 Xhc->HcCParams.Dword = XhcReadCapReg (Xhc, XHC_HCCPARAMS_OFFSET);
1799 Xhc->DBOff = XhcReadCapReg (Xhc, XHC_DBOFF_OFFSET);
1800 Xhc->RTSOff = XhcReadCapReg (Xhc, XHC_RTSOFF_OFFSET);
1801
1802 //
1803 // This PageSize field defines the page size supported by the xHC implementation.
1804 // This xHC supports a page size of 2^(n+12) if bit n is Set. For example,
1805 // if bit 0 is Set, the xHC supports 4k byte page sizes.
1806 //
1807 PageSize = XhcReadOpReg(Xhc, XHC_PAGESIZE_OFFSET) & XHC_PAGESIZE_MASK;
1808 Xhc->PageSize = 1 << (HighBitSet32(PageSize) + 12);
1809
1810 ExtCapReg = (UINT16) (Xhc->HcCParams.Data.ExtCapReg);
1811 Xhc->ExtCapRegBase = ExtCapReg << 2;
1812 Xhc->UsbLegSupOffset = XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_LEGACY);
1813 Xhc->DebugCapSupOffset = XhcGetCapabilityAddr (Xhc, XHC_CAP_USB_DEBUG);
1814
1815 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: Capability length 0x%x\n", Xhc->CapLength));
1816 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: HcSParams1 0x%x\n", Xhc->HcSParams1));
1817 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: HcSParams2 0x%x\n", Xhc->HcSParams2));
1818 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: HcCParams 0x%x\n", Xhc->HcCParams));
1819 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: DBOff 0x%x\n", Xhc->DBOff));
1820 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: RTSOff 0x%x\n", Xhc->RTSOff));
1821 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: UsbLegSupOffset 0x%x\n", Xhc->UsbLegSupOffset));
1822 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: DebugCapSupOffset 0x%x\n", Xhc->DebugCapSupOffset));
1823
1824 //
1825 // Create AsyncRequest Polling Timer
1826 //
1827 Status = gBS->CreateEvent (
1828 EVT_TIMER | EVT_NOTIFY_SIGNAL,
1829 TPL_CALLBACK,
1830 XhcMonitorAsyncRequests,
1831 Xhc,
1832 &Xhc->PollTimer
1833 );
1834
1835 if (EFI_ERROR (Status)) {
1836 goto ON_ERROR;
1837 }
1838
1839 return Xhc;
1840
1841 ON_ERROR:
1842 FreePool (Xhc);
1843 return NULL;
1844 }
1845
1846 /**
1847 One notified function to stop the Host Controller when gBS->ExitBootServices() called.
1848
1849 @param Event Pointer to this event
1850 @param Context Event handler private data
1851
1852 **/
1853 VOID
1854 EFIAPI
1855 XhcExitBootService (
1856 EFI_EVENT Event,
1857 VOID *Context
1858 )
1859
1860 {
1861 USB_XHCI_INSTANCE *Xhc;
1862 EFI_PCI_IO_PROTOCOL *PciIo;
1863
1864 Xhc = (USB_XHCI_INSTANCE*) Context;
1865 PciIo = Xhc->PciIo;
1866
1867 //
1868 // Stop AsyncRequest Polling timer then stop the XHCI driver
1869 // and uninstall the XHCI protocl.
1870 //
1871 gBS->SetTimer (Xhc->PollTimer, TimerCancel, 0);
1872 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
1873
1874 if (Xhc->PollTimer != NULL) {
1875 gBS->CloseEvent (Xhc->PollTimer);
1876 }
1877
1878 XhcClearBiosOwnership (Xhc);
1879
1880 //
1881 // Restore original PCI attributes
1882 //
1883 PciIo->Attributes (
1884 PciIo,
1885 EfiPciIoAttributeOperationSet,
1886 Xhc->OriginalPciAttributes,
1887 NULL
1888 );
1889 }
1890
1891 /**
1892 Starting the Usb XHCI Driver.
1893
1894 @param This Protocol instance pointer.
1895 @param Controller Handle of device to test.
1896 @param RemainingDevicePath Not used.
1897
1898 @return EFI_SUCCESS supports this device.
1899 @return EFI_UNSUPPORTED do not support this device.
1900 @return EFI_DEVICE_ERROR cannot be started due to device Error.
1901 @return EFI_OUT_OF_RESOURCES cannot allocate resources.
1902
1903 **/
1904 EFI_STATUS
1905 EFIAPI
1906 XhcDriverBindingStart (
1907 IN EFI_DRIVER_BINDING_PROTOCOL *This,
1908 IN EFI_HANDLE Controller,
1909 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
1910 )
1911 {
1912 EFI_STATUS Status;
1913 EFI_PCI_IO_PROTOCOL *PciIo;
1914 UINT64 Supports;
1915 UINT64 OriginalPciAttributes;
1916 BOOLEAN PciAttributesSaved;
1917 USB_XHCI_INSTANCE *Xhc;
1918 EFI_DEVICE_PATH_PROTOCOL *HcDevicePath;
1919
1920 //
1921 // Open the PciIo Protocol, then enable the USB host controller
1922 //
1923 Status = gBS->OpenProtocol (
1924 Controller,
1925 &gEfiPciIoProtocolGuid,
1926 (VOID **) &PciIo,
1927 This->DriverBindingHandle,
1928 Controller,
1929 EFI_OPEN_PROTOCOL_BY_DRIVER
1930 );
1931
1932 if (EFI_ERROR (Status)) {
1933 return Status;
1934 }
1935
1936 //
1937 // Open Device Path Protocol for on USB host controller
1938 //
1939 HcDevicePath = NULL;
1940 Status = gBS->OpenProtocol (
1941 Controller,
1942 &gEfiDevicePathProtocolGuid,
1943 (VOID **) &HcDevicePath,
1944 This->DriverBindingHandle,
1945 Controller,
1946 EFI_OPEN_PROTOCOL_GET_PROTOCOL
1947 );
1948
1949 PciAttributesSaved = FALSE;
1950 //
1951 // Save original PCI attributes
1952 //
1953 Status = PciIo->Attributes (
1954 PciIo,
1955 EfiPciIoAttributeOperationGet,
1956 0,
1957 &OriginalPciAttributes
1958 );
1959
1960 if (EFI_ERROR (Status)) {
1961 goto CLOSE_PCIIO;
1962 }
1963 PciAttributesSaved = TRUE;
1964
1965 Status = PciIo->Attributes (
1966 PciIo,
1967 EfiPciIoAttributeOperationSupported,
1968 0,
1969 &Supports
1970 );
1971 if (!EFI_ERROR (Status)) {
1972 Supports &= (UINT64)EFI_PCI_DEVICE_ENABLE;
1973 Status = PciIo->Attributes (
1974 PciIo,
1975 EfiPciIoAttributeOperationEnable,
1976 Supports,
1977 NULL
1978 );
1979 }
1980
1981 if (EFI_ERROR (Status)) {
1982 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to enable controller\n"));
1983 goto CLOSE_PCIIO;
1984 }
1985
1986 //
1987 // Create then install USB2_HC_PROTOCOL
1988 //
1989 Xhc = XhcCreateUsbHc (PciIo, HcDevicePath, OriginalPciAttributes);
1990
1991 if (Xhc == NULL) {
1992 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to create USB2_HC\n"));
1993 return EFI_OUT_OF_RESOURCES;
1994 }
1995
1996 XhcSetBiosOwnership (Xhc);
1997
1998 XhcResetHC (Xhc, XHC_RESET_TIMEOUT);
1999 ASSERT (XhcIsHalt (Xhc));
2000
2001 //
2002 // After Chip Hardware Reset wait until the Controller Not Ready (CNR) flag
2003 // in the USBSTS is '0' before writing any xHC Operational or Runtime registers.
2004 //
2005 ASSERT (!(XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_CNR)));
2006
2007 //
2008 // Initialize the schedule
2009 //
2010 XhcInitSched (Xhc);
2011
2012 //
2013 // Start the Host Controller
2014 //
2015 XhcRunHC(Xhc, XHC_GENERIC_TIMEOUT);
2016
2017 //
2018 // Start the asynchronous interrupt monitor
2019 //
2020 Status = gBS->SetTimer (Xhc->PollTimer, TimerPeriodic, XHC_ASYNC_TIMER_INTERVAL);
2021 if (EFI_ERROR (Status)) {
2022 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to start async interrupt monitor\n"));
2023 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
2024 goto FREE_POOL;
2025 }
2026
2027 //
2028 // Create event to stop the HC when exit boot service.
2029 //
2030 Status = gBS->CreateEventEx (
2031 EVT_NOTIFY_SIGNAL,
2032 TPL_NOTIFY,
2033 XhcExitBootService,
2034 Xhc,
2035 &gEfiEventExitBootServicesGuid,
2036 &Xhc->ExitBootServiceEvent
2037 );
2038 if (EFI_ERROR (Status)) {
2039 goto FREE_POOL;
2040 }
2041
2042 //
2043 // Install the component name protocol, don't fail the start
2044 // because of something for display.
2045 //
2046 AddUnicodeString2 (
2047 "eng",
2048 gXhciComponentName.SupportedLanguages,
2049 &Xhc->ControllerNameTable,
2050 L"eXtensible Host Controller (USB 3.0)",
2051 TRUE
2052 );
2053 AddUnicodeString2 (
2054 "en",
2055 gXhciComponentName2.SupportedLanguages,
2056 &Xhc->ControllerNameTable,
2057 L"eXtensible Host Controller (USB 3.0)",
2058 FALSE
2059 );
2060
2061 Status = gBS->InstallProtocolInterface (
2062 &Controller,
2063 &gEfiUsb2HcProtocolGuid,
2064 EFI_NATIVE_INTERFACE,
2065 &Xhc->Usb2Hc
2066 );
2067 if (EFI_ERROR (Status)) {
2068 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to install USB2_HC Protocol\n"));
2069 goto FREE_POOL;
2070 }
2071
2072 DEBUG ((EFI_D_INFO, "XhcDriverBindingStart: XHCI started for controller @ %x\n", Controller));
2073 return EFI_SUCCESS;
2074
2075 FREE_POOL:
2076 gBS->CloseEvent (Xhc->PollTimer);
2077 XhcFreeSched (Xhc);
2078 FreePool (Xhc);
2079
2080 CLOSE_PCIIO:
2081 if (PciAttributesSaved) {
2082 //
2083 // Restore original PCI attributes
2084 //
2085 PciIo->Attributes (
2086 PciIo,
2087 EfiPciIoAttributeOperationSet,
2088 OriginalPciAttributes,
2089 NULL
2090 );
2091 }
2092
2093 gBS->CloseProtocol (
2094 Controller,
2095 &gEfiPciIoProtocolGuid,
2096 This->DriverBindingHandle,
2097 Controller
2098 );
2099
2100 return Status;
2101 }
2102
2103
2104 /**
2105 Stop this driver on ControllerHandle. Support stoping any child handles
2106 created by this driver.
2107
2108 @param This Protocol instance pointer.
2109 @param Controller Handle of device to stop driver on.
2110 @param NumberOfChildren Number of Children in the ChildHandleBuffer.
2111 @param ChildHandleBuffer List of handles for the children we need to stop.
2112
2113 @return EFI_SUCCESS Success.
2114 @return EFI_DEVICE_ERROR Fail.
2115
2116 **/
2117 EFI_STATUS
2118 EFIAPI
2119 XhcDriverBindingStop (
2120 IN EFI_DRIVER_BINDING_PROTOCOL *This,
2121 IN EFI_HANDLE Controller,
2122 IN UINTN NumberOfChildren,
2123 IN EFI_HANDLE *ChildHandleBuffer
2124 )
2125 {
2126 EFI_STATUS Status;
2127 EFI_USB2_HC_PROTOCOL *Usb2Hc;
2128 EFI_PCI_IO_PROTOCOL *PciIo;
2129 USB_XHCI_INSTANCE *Xhc;
2130 UINT8 Index;
2131
2132 //
2133 // Test whether the Controller handler passed in is a valid
2134 // Usb controller handle that should be supported, if not,
2135 // return the error status directly
2136 //
2137 Status = gBS->OpenProtocol (
2138 Controller,
2139 &gEfiUsb2HcProtocolGuid,
2140 (VOID **) &Usb2Hc,
2141 This->DriverBindingHandle,
2142 Controller,
2143 EFI_OPEN_PROTOCOL_GET_PROTOCOL
2144 );
2145
2146 if (EFI_ERROR (Status)) {
2147 return Status;
2148 }
2149
2150 Status = gBS->UninstallProtocolInterface (
2151 Controller,
2152 &gEfiUsb2HcProtocolGuid,
2153 Usb2Hc
2154 );
2155
2156 if (EFI_ERROR (Status)) {
2157 return Status;
2158 }
2159
2160 Xhc = XHC_FROM_THIS (Usb2Hc);
2161 PciIo = Xhc->PciIo;
2162
2163 //
2164 // Stop AsyncRequest Polling timer then stop the XHCI driver
2165 // and uninstall the XHCI protocl.
2166 //
2167 gBS->SetTimer (Xhc->PollTimer, TimerCancel, 0);
2168
2169 //
2170 // Disable the device slots occupied by these devices on its downstream ports.
2171 // Entry 0 is reserved.
2172 //
2173 for (Index = 0; Index < 255; Index++) {
2174 if (!Xhc->UsbDevContext[Index + 1].Enabled ||
2175 (Xhc->UsbDevContext[Index + 1].SlotId == 0)) {
2176 continue;
2177 }
2178 if (Xhc->HcCParams.Data.Csz == 0) {
2179 XhcDisableSlotCmd (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
2180 } else {
2181 XhcDisableSlotCmd64 (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
2182 }
2183 }
2184
2185 if (Xhc->PollTimer != NULL) {
2186 gBS->CloseEvent (Xhc->PollTimer);
2187 }
2188
2189 if (Xhc->ExitBootServiceEvent != NULL) {
2190 gBS->CloseEvent (Xhc->ExitBootServiceEvent);
2191 }
2192
2193 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
2194 XhcClearBiosOwnership (Xhc);
2195 XhciDelAllAsyncIntTransfers (Xhc);
2196 XhcFreeSched (Xhc);
2197
2198 if (Xhc->ControllerNameTable) {
2199 FreeUnicodeStringTable (Xhc->ControllerNameTable);
2200 }
2201
2202 //
2203 // Restore original PCI attributes
2204 //
2205 PciIo->Attributes (
2206 PciIo,
2207 EfiPciIoAttributeOperationSet,
2208 Xhc->OriginalPciAttributes,
2209 NULL
2210 );
2211
2212 gBS->CloseProtocol (
2213 Controller,
2214 &gEfiPciIoProtocolGuid,
2215 This->DriverBindingHandle,
2216 Controller
2217 );
2218
2219 FreePool (Xhc);
2220
2221 return EFI_SUCCESS;
2222 }
2223
EFI Development Kit II mirror for PVE