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1 /** @file
2 The XHCI controller driver.
3
4 Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #include "Xhci.h"
16
17 //
18 // Two arrays used to translate the XHCI port state (change)
19 // to the UEFI protocol's port state (change).
20 //
21 USB_PORT_STATE_MAP mUsbPortStateMap[] = {
22 {XHC_PORTSC_CCS, USB_PORT_STAT_CONNECTION},
23 {XHC_PORTSC_PED, USB_PORT_STAT_ENABLE},
24 {XHC_PORTSC_OCA, USB_PORT_STAT_OVERCURRENT},
25 {XHC_PORTSC_RESET, USB_PORT_STAT_RESET}
26 };
27
28 USB_PORT_STATE_MAP mUsbPortChangeMap[] = {
29 {XHC_PORTSC_CSC, USB_PORT_STAT_C_CONNECTION},
30 {XHC_PORTSC_PEC, USB_PORT_STAT_C_ENABLE},
31 {XHC_PORTSC_OCC, USB_PORT_STAT_C_OVERCURRENT},
32 {XHC_PORTSC_PRC, USB_PORT_STAT_C_RESET}
33 };
34
35 EFI_DRIVER_BINDING_PROTOCOL gXhciDriverBinding = {
36 XhcDriverBindingSupported,
37 XhcDriverBindingStart,
38 XhcDriverBindingStop,
39 0x30,
40 NULL,
41 NULL
42 };
43
44 //
45 // Template for Xhci's Usb2 Host Controller Protocol Instance.
46 //
47 EFI_USB2_HC_PROTOCOL gXhciUsb2HcTemplate = {
48 XhcGetCapability,
49 XhcReset,
50 XhcGetState,
51 XhcSetState,
52 XhcControlTransfer,
53 XhcBulkTransfer,
54 XhcAsyncInterruptTransfer,
55 XhcSyncInterruptTransfer,
56 XhcIsochronousTransfer,
57 XhcAsyncIsochronousTransfer,
58 XhcGetRootHubPortStatus,
59 XhcSetRootHubPortFeature,
60 XhcClearRootHubPortFeature,
61 0x3,
62 0x0
63 };
64
65 /**
66 Retrieves the capability of root hub ports.
67
68 @param This The EFI_USB2_HC_PROTOCOL instance.
69 @param MaxSpeed Max speed supported by the controller.
70 @param PortNumber Number of the root hub ports.
71 @param Is64BitCapable Whether the controller supports 64-bit memory
72 addressing.
73
74 @retval EFI_SUCCESS Host controller capability were retrieved successfully.
75 @retval EFI_INVALID_PARAMETER Either of the three capability pointer is NULL.
76
77 **/
78 EFI_STATUS
79 EFIAPI
80 XhcGetCapability (
81 IN EFI_USB2_HC_PROTOCOL *This,
82 OUT UINT8 *MaxSpeed,
83 OUT UINT8 *PortNumber,
84 OUT UINT8 *Is64BitCapable
85 )
86 {
87 USB_XHCI_INSTANCE *Xhc;
88 EFI_TPL OldTpl;
89
90 if ((MaxSpeed == NULL) || (PortNumber == NULL) || (Is64BitCapable == NULL)) {
91 return EFI_INVALID_PARAMETER;
92 }
93
94 OldTpl = gBS->RaiseTPL (XHC_TPL);
95
96 Xhc = XHC_FROM_THIS (This);
97 *MaxSpeed = EFI_USB_SPEED_SUPER;
98 *PortNumber = (UINT8) (Xhc->HcSParams1.Data.MaxPorts);
99 *Is64BitCapable = (UINT8) (Xhc->HcCParams.Data.Ac64);
100 DEBUG ((EFI_D_INFO, "XhcGetCapability: %d ports, 64 bit %d\n", *PortNumber, *Is64BitCapable));
101
102 gBS->RestoreTPL (OldTpl);
103
104 return EFI_SUCCESS;
105 }
106
107
108 /**
109 Provides software reset for the USB host controller.
110
111 @param This This EFI_USB2_HC_PROTOCOL instance.
112 @param Attributes A bit mask of the reset operation to perform.
113
114 @retval EFI_SUCCESS The reset operation succeeded.
115 @retval EFI_INVALID_PARAMETER Attributes is not valid.
116 @retval EFI_UNSUPPOURTED The type of reset specified by Attributes is
117 not currently supported by the host controller.
118 @retval EFI_DEVICE_ERROR Host controller isn't halted to reset.
119
120 **/
121 EFI_STATUS
122 EFIAPI
123 XhcReset (
124 IN EFI_USB2_HC_PROTOCOL *This,
125 IN UINT16 Attributes
126 )
127 {
128 USB_XHCI_INSTANCE *Xhc;
129 EFI_STATUS Status;
130 EFI_TPL OldTpl;
131
132 OldTpl = gBS->RaiseTPL (XHC_TPL);
133
134 Xhc = XHC_FROM_THIS (This);
135
136 switch (Attributes) {
137 case EFI_USB_HC_RESET_GLOBAL:
138 //
139 // Flow through, same behavior as Host Controller Reset
140 //
141 case EFI_USB_HC_RESET_HOST_CONTROLLER:
142 //
143 // Host Controller must be Halt when Reset it
144 //
145 if (!XhcIsHalt (Xhc)) {
146 Status = XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
147
148 if (EFI_ERROR (Status)) {
149 Status = EFI_DEVICE_ERROR;
150 goto ON_EXIT;
151 }
152 }
153
154 Status = XhcResetHC (Xhc, XHC_RESET_TIMEOUT);
155 ASSERT (!(XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_CNR)));
156
157 if (EFI_ERROR (Status)) {
158 goto ON_EXIT;
159 }
160 //
161 // Clean up the asynchronous transfers, currently only
162 // interrupt supports asynchronous operation.
163 //
164 XhciDelAllAsyncIntTransfers (Xhc);
165 XhcFreeSched (Xhc);
166
167 XhcInitSched (Xhc);
168 break;
169
170 case EFI_USB_HC_RESET_GLOBAL_WITH_DEBUG:
171 case EFI_USB_HC_RESET_HOST_WITH_DEBUG:
172 Status = EFI_UNSUPPORTED;
173 break;
174
175 default:
176 Status = EFI_INVALID_PARAMETER;
177 }
178
179 ON_EXIT:
180 DEBUG ((EFI_D_INFO, "XhcReset: status %r\n", Status));
181 gBS->RestoreTPL (OldTpl);
182
183 return Status;
184 }
185
186
187 /**
188 Retrieve the current state of the USB host controller.
189
190 @param This This EFI_USB2_HC_PROTOCOL instance.
191 @param State Variable to return the current host controller
192 state.
193
194 @retval EFI_SUCCESS Host controller state was returned in State.
195 @retval EFI_INVALID_PARAMETER State is NULL.
196 @retval EFI_DEVICE_ERROR An error was encountered while attempting to
197 retrieve the host controller's current state.
198
199 **/
200 EFI_STATUS
201 EFIAPI
202 XhcGetState (
203 IN EFI_USB2_HC_PROTOCOL *This,
204 OUT EFI_USB_HC_STATE *State
205 )
206 {
207 USB_XHCI_INSTANCE *Xhc;
208 EFI_TPL OldTpl;
209
210 if (State == NULL) {
211 return EFI_INVALID_PARAMETER;
212 }
213
214 OldTpl = gBS->RaiseTPL (XHC_TPL);
215
216 Xhc = XHC_FROM_THIS (This);
217
218 if (XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT)) {
219 *State = EfiUsbHcStateHalt;
220 } else {
221 *State = EfiUsbHcStateOperational;
222 }
223
224 DEBUG ((EFI_D_INFO, "XhcGetState: current state %d\n", *State));
225 gBS->RestoreTPL (OldTpl);
226
227 return EFI_SUCCESS;
228 }
229
230 /**
231 Sets the USB host controller to a specific state.
232
233 @param This This EFI_USB2_HC_PROTOCOL instance.
234 @param State The state of the host controller that will be set.
235
236 @retval EFI_SUCCESS The USB host controller was successfully placed
237 in the state specified by State.
238 @retval EFI_INVALID_PARAMETER State is invalid.
239 @retval EFI_DEVICE_ERROR Failed to set the state due to device error.
240
241 **/
242 EFI_STATUS
243 EFIAPI
244 XhcSetState (
245 IN EFI_USB2_HC_PROTOCOL *This,
246 IN EFI_USB_HC_STATE State
247 )
248 {
249 USB_XHCI_INSTANCE *Xhc;
250 EFI_STATUS Status;
251 EFI_USB_HC_STATE CurState;
252 EFI_TPL OldTpl;
253
254 Status = XhcGetState (This, &CurState);
255
256 if (EFI_ERROR (Status)) {
257 return EFI_DEVICE_ERROR;
258 }
259
260 if (CurState == State) {
261 return EFI_SUCCESS;
262 }
263
264 OldTpl = gBS->RaiseTPL (XHC_TPL);
265
266 Xhc = XHC_FROM_THIS (This);
267
268 switch (State) {
269 case EfiUsbHcStateHalt:
270 Status = XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
271 break;
272
273 case EfiUsbHcStateOperational:
274 if (XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HSE)) {
275 Status = EFI_DEVICE_ERROR;
276 break;
277 }
278
279 //
280 // Software must not write a one to this field unless the host controller
281 // is in the Halted state. Doing so will yield undefined results.
282 // refers to Spec[XHCI1.0-2.3.1]
283 //
284 if (!XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT)) {
285 Status = EFI_DEVICE_ERROR;
286 break;
287 }
288
289 Status = XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
290 break;
291
292 case EfiUsbHcStateSuspend:
293 Status = EFI_UNSUPPORTED;
294 break;
295
296 default:
297 Status = EFI_INVALID_PARAMETER;
298 }
299
300 DEBUG ((EFI_D_INFO, "XhcSetState: status %r\n", Status));
301 gBS->RestoreTPL (OldTpl);
302
303 return Status;
304 }
305
306 /**
307 Retrieves the current status of a USB root hub port.
308
309 @param This This EFI_USB2_HC_PROTOCOL instance.
310 @param PortNumber The root hub port to retrieve the state from.
311 This value is zero-based.
312 @param PortStatus Variable to receive the port state.
313
314 @retval EFI_SUCCESS The status of the USB root hub port specified.
315 by PortNumber was returned in PortStatus.
316 @retval EFI_INVALID_PARAMETER PortNumber is invalid.
317 @retval EFI_DEVICE_ERROR Can't read register.
318
319 **/
320 EFI_STATUS
321 EFIAPI
322 XhcGetRootHubPortStatus (
323 IN EFI_USB2_HC_PROTOCOL *This,
324 IN UINT8 PortNumber,
325 OUT EFI_USB_PORT_STATUS *PortStatus
326 )
327 {
328 USB_XHCI_INSTANCE *Xhc;
329 UINT32 Offset;
330 UINT32 State;
331 UINT32 TotalPort;
332 UINTN Index;
333 UINTN MapSize;
334 EFI_STATUS Status;
335 USB_DEV_ROUTE ParentRouteChart;
336 EFI_TPL OldTpl;
337
338 if (PortStatus == NULL) {
339 return EFI_INVALID_PARAMETER;
340 }
341
342 OldTpl = gBS->RaiseTPL (XHC_TPL);
343
344 Xhc = XHC_FROM_THIS (This);
345 Status = EFI_SUCCESS;
346
347 TotalPort = Xhc->HcSParams1.Data.MaxPorts;
348
349 if (PortNumber >= TotalPort) {
350 Status = EFI_INVALID_PARAMETER;
351 goto ON_EXIT;
352 }
353
354 Offset = (UINT32) (XHC_PORTSC_OFFSET + (0x10 * PortNumber));
355 PortStatus->PortStatus = 0;
356 PortStatus->PortChangeStatus = 0;
357
358 State = XhcReadOpReg (Xhc, Offset);
359
360 //
361 // According to XHCI 1.0 spec, bit 10~13 of the root port status register identifies the speed of the attached device.
362 //
363 switch ((State & XHC_PORTSC_PS) >> 10) {
364 case 2:
365 PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;
366 break;
367
368 case 3:
369 PortStatus->PortStatus |= USB_PORT_STAT_HIGH_SPEED;
370 break;
371
372 case 4:
373 PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED;
374 break;
375
376 default:
377 break;
378 }
379
380 //
381 // Convert the XHCI port/port change state to UEFI status
382 //
383 MapSize = sizeof (mUsbPortStateMap) / sizeof (USB_PORT_STATE_MAP);
384
385 for (Index = 0; Index < MapSize; Index++) {
386 if (XHC_BIT_IS_SET (State, mUsbPortStateMap[Index].HwState)) {
387 PortStatus->PortStatus = (UINT16) (PortStatus->PortStatus | mUsbPortStateMap[Index].UefiState);
388 }
389 }
390 //
391 // Bit5~8 reflects its current link state.
392 //
393 if ((State & XHC_PORTSC_PLS) >> 5 == 3) {
394 PortStatus->PortStatus |= USB_PORT_STAT_SUSPEND;
395 }
396
397 MapSize = sizeof (mUsbPortChangeMap) / sizeof (USB_PORT_STATE_MAP);
398
399 for (Index = 0; Index < MapSize; Index++) {
400 if (XHC_BIT_IS_SET (State, mUsbPortChangeMap[Index].HwState)) {
401 PortStatus->PortChangeStatus = (UINT16) (PortStatus->PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
402 }
403 }
404
405 //
406 // Poll the root port status register to enable/disable corresponding device slot if there is a device attached/detached.
407 // For those devices behind hub, we get its attach/detach event by hooking Get_Port_Status request at control transfer for those hub.
408 //
409 ParentRouteChart.Dword = 0;
410 XhcPollPortStatusChange (Xhc, ParentRouteChart, PortNumber, PortStatus);
411
412 ON_EXIT:
413 gBS->RestoreTPL (OldTpl);
414 return Status;
415 }
416
417
418 /**
419 Sets a feature for the specified root hub port.
420
421 @param This This EFI_USB2_HC_PROTOCOL instance.
422 @param PortNumber Root hub port to set.
423 @param PortFeature Feature to set.
424
425 @retval EFI_SUCCESS The feature specified by PortFeature was set.
426 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
427 @retval EFI_DEVICE_ERROR Can't read register.
428
429 **/
430 EFI_STATUS
431 EFIAPI
432 XhcSetRootHubPortFeature (
433 IN EFI_USB2_HC_PROTOCOL *This,
434 IN UINT8 PortNumber,
435 IN EFI_USB_PORT_FEATURE PortFeature
436 )
437 {
438 USB_XHCI_INSTANCE *Xhc;
439 UINT32 Offset;
440 UINT32 State;
441 UINT32 TotalPort;
442 UINT8 SlotId;
443 USB_DEV_ROUTE RouteChart;
444 EFI_STATUS Status;
445 EFI_TPL OldTpl;
446
447 OldTpl = gBS->RaiseTPL (XHC_TPL);
448
449 Xhc = XHC_FROM_THIS (This);
450 Status = EFI_SUCCESS;
451
452 TotalPort = (Xhc->HcSParams1.Data.MaxPorts);
453
454 if (PortNumber >= TotalPort) {
455 Status = EFI_INVALID_PARAMETER;
456 goto ON_EXIT;
457 }
458
459 Offset = (UINT32) (XHC_PORTSC_OFFSET + (0x10 * PortNumber));
460 State = XhcReadOpReg (Xhc, Offset);
461
462 //
463 // Mask off the port status change bits, these bits are
464 // write clean bit
465 //
466 State &= ~ (BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
467
468 switch (PortFeature) {
469 case EfiUsbPortEnable:
470 //
471 // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
472 // A port may be disabled by software writing a '1' to this flag.
473 //
474 Status = EFI_SUCCESS;
475 break;
476
477 case EfiUsbPortSuspend:
478 State |= XHC_PORTSC_LWS;
479 XhcWriteOpReg (Xhc, Offset, State);
480 State &= ~XHC_PORTSC_PLS;
481 State |= (3 << 5) ;
482 XhcWriteOpReg (Xhc, Offset, State);
483 break;
484
485 case EfiUsbPortReset:
486 DEBUG ((EFI_D_INFO, "XhcUsbPortReset!\n"));
487 //
488 // Make sure Host Controller not halt before reset it
489 //
490 if (XhcIsHalt (Xhc)) {
491 Status = XhcRunHC (Xhc, XHC_GENERIC_TIMEOUT);
492
493 if (EFI_ERROR (Status)) {
494 DEBUG ((EFI_D_INFO, "XhcSetRootHubPortFeature :failed to start HC - %r\n", Status));
495 break;
496 }
497 }
498
499 RouteChart.Route.RouteString = 0;
500 RouteChart.Route.RootPortNum = PortNumber + 1;
501 RouteChart.Route.TierNum = 1;
502 //
503 // If the port reset operation happens after the usb super speed device is enabled,
504 // The subsequent configuration, such as getting device descriptor, will fail.
505 // So here a workaround is introduced to skip the reset operation if the device is enabled.
506 //
507 SlotId = XhcRouteStringToSlotId (Xhc, RouteChart);
508 if (SlotId == 0) {
509 //
510 // 4.3.1 Resetting a Root Hub Port
511 // 1) Write the PORTSC register with the Port Reset (PR) bit set to '1'.
512 //
513 State |= XHC_PORTSC_RESET;
514 XhcWriteOpReg (Xhc, Offset, State);
515 XhcWaitOpRegBit(Xhc, Offset, XHC_PORTSC_PRC, TRUE, XHC_GENERIC_TIMEOUT);
516 }
517 break;
518
519 case EfiUsbPortPower:
520 //
521 // Not supported, ignore the operation
522 //
523 Status = EFI_SUCCESS;
524 break;
525
526 case EfiUsbPortOwner:
527 //
528 // XHCI root hub port don't has the owner bit, ignore the operation
529 //
530 Status = EFI_SUCCESS;
531 break;
532
533 default:
534 Status = EFI_INVALID_PARAMETER;
535 }
536
537 ON_EXIT:
538 DEBUG ((EFI_D_INFO, "XhcSetRootHubPortFeature: status %r\n", Status));
539 gBS->RestoreTPL (OldTpl);
540
541 return Status;
542 }
543
544
545 /**
546 Clears a feature for the specified root hub port.
547
548 @param This A pointer to the EFI_USB2_HC_PROTOCOL instance.
549 @param PortNumber Specifies the root hub port whose feature is
550 requested to be cleared.
551 @param PortFeature Indicates the feature selector associated with the
552 feature clear request.
553
554 @retval EFI_SUCCESS The feature specified by PortFeature was cleared
555 for the USB root hub port specified by PortNumber.
556 @retval EFI_INVALID_PARAMETER PortNumber is invalid or PortFeature is invalid.
557 @retval EFI_DEVICE_ERROR Can't read register.
558
559 **/
560 EFI_STATUS
561 EFIAPI
562 XhcClearRootHubPortFeature (
563 IN EFI_USB2_HC_PROTOCOL *This,
564 IN UINT8 PortNumber,
565 IN EFI_USB_PORT_FEATURE PortFeature
566 )
567 {
568 USB_XHCI_INSTANCE *Xhc;
569 UINT32 Offset;
570 UINT32 State;
571 UINT32 TotalPort;
572 EFI_STATUS Status;
573 EFI_TPL OldTpl;
574
575 OldTpl = gBS->RaiseTPL (XHC_TPL);
576
577 Xhc = XHC_FROM_THIS (This);
578 Status = EFI_SUCCESS;
579
580 TotalPort = (Xhc->HcSParams1.Data.MaxPorts);
581
582 if (PortNumber >= TotalPort) {
583 Status = EFI_INVALID_PARAMETER;
584 goto ON_EXIT;
585 }
586
587 Offset = XHC_PORTSC_OFFSET + (0x10 * PortNumber);
588
589 //
590 // Mask off the port status change bits, these bits are
591 // write clean bit
592 //
593 State = XhcReadOpReg (Xhc, Offset);
594 State &= ~ (BIT1 | BIT17 | BIT18 | BIT19 | BIT20 | BIT21 | BIT22 | BIT23);
595
596 switch (PortFeature) {
597 case EfiUsbPortEnable:
598 //
599 // Ports may only be enabled by the xHC. Software cannot enable a port by writing a '1' to this flag.
600 // A port may be disabled by software writing a '1' to this flag.
601 //
602 State |= XHC_PORTSC_PED;
603 State &= ~XHC_PORTSC_RESET;
604 XhcWriteOpReg (Xhc, Offset, State);
605 break;
606
607 case EfiUsbPortSuspend:
608 State |= XHC_PORTSC_LWS;
609 XhcWriteOpReg (Xhc, Offset, State);
610 State &= ~XHC_PORTSC_PLS;
611 XhcWriteOpReg (Xhc, Offset, State);
612 break;
613
614 case EfiUsbPortReset:
615 //
616 // PORTSC_RESET BIT(4) bit is RW1S attribute, which means Write-1-to-set status:
617 // Register bits indicate status when read, a clear bit may be set by
618 // writing a '1'. Writing a '0' to RW1S bits has no effect.
619 //
620 break;
621
622 case EfiUsbPortOwner:
623 //
624 // XHCI root hub port don't has the owner bit, ignore the operation
625 //
626 break;
627
628 case EfiUsbPortConnectChange:
629 //
630 // Clear connect status change
631 //
632 State |= XHC_PORTSC_CSC;
633 XhcWriteOpReg (Xhc, Offset, State);
634 break;
635
636 case EfiUsbPortEnableChange:
637 //
638 // Clear enable status change
639 //
640 State |= XHC_PORTSC_PEC;
641 XhcWriteOpReg (Xhc, Offset, State);
642 break;
643
644 case EfiUsbPortOverCurrentChange:
645 //
646 // Clear PortOverCurrent change
647 //
648 State |= XHC_PORTSC_OCC;
649 XhcWriteOpReg (Xhc, Offset, State);
650 break;
651
652 case EfiUsbPortResetChange:
653 //
654 // Clear Port Reset change
655 //
656 State |= XHC_PORTSC_PRC;
657 XhcWriteOpReg (Xhc, Offset, State);
658 break;
659
660 case EfiUsbPortPower:
661 case EfiUsbPortSuspendChange:
662 //
663 // Not supported or not related operation
664 //
665 break;
666
667 default:
668 Status = EFI_INVALID_PARAMETER;
669 break;
670 }
671
672 ON_EXIT:
673 DEBUG ((EFI_D_INFO, "XhcClearRootHubPortFeature: status %r\n", Status));
674 gBS->RestoreTPL (OldTpl);
675
676 return Status;
677 }
678
679
680 /**
681 Submits control transfer to a target USB device.
682
683 @param This This EFI_USB2_HC_PROTOCOL instance.
684 @param DeviceAddress The target device address.
685 @param DeviceSpeed Target device speed.
686 @param MaximumPacketLength Maximum packet size the default control transfer
687 endpoint is capable of sending or receiving.
688 @param Request USB device request to send.
689 @param TransferDirection Specifies the data direction for the data stage
690 @param Data Data buffer to be transmitted or received from USB
691 device.
692 @param DataLength The size (in bytes) of the data buffer.
693 @param Timeout Indicates the maximum timeout, in millisecond.
694 @param Translator Transaction translator to be used by this device.
695 @param TransferResult Return the result of this control transfer.
696
697 @retval EFI_SUCCESS Transfer was completed successfully.
698 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resources.
699 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
700 @retval EFI_TIMEOUT Transfer failed due to timeout.
701 @retval EFI_DEVICE_ERROR Transfer failed due to host controller or device error.
702
703 **/
704 EFI_STATUS
705 EFIAPI
706 XhcControlTransfer (
707 IN EFI_USB2_HC_PROTOCOL *This,
708 IN UINT8 DeviceAddress,
709 IN UINT8 DeviceSpeed,
710 IN UINTN MaximumPacketLength,
711 IN EFI_USB_DEVICE_REQUEST *Request,
712 IN EFI_USB_DATA_DIRECTION TransferDirection,
713 IN OUT VOID *Data,
714 IN OUT UINTN *DataLength,
715 IN UINTN Timeout,
716 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
717 OUT UINT32 *TransferResult
718 )
719 {
720 USB_XHCI_INSTANCE *Xhc;
721 URB *Urb;
722 UINT8 Endpoint;
723 UINT8 Index;
724 UINT8 XhciDevAddr;
725 UINT8 DescriptorType;
726 UINT8 SlotId;
727 UINT8 TTT;
728 UINT8 MTT;
729 UINT32 MaxPacket0;
730 EFI_USB_HUB_DESCRIPTOR *HubDesc;
731 EFI_TPL OldTpl;
732 EFI_STATUS Status;
733 EFI_STATUS RecoveryStatus;
734 UINTN MapSize;
735 EFI_USB_PORT_STATUS PortStatus;
736 UINT32 State;
737
738 //
739 // Validate parameters
740 //
741 if ((Request == NULL) || (TransferResult == NULL)) {
742 return EFI_INVALID_PARAMETER;
743 }
744
745 if ((TransferDirection != EfiUsbDataIn) &&
746 (TransferDirection != EfiUsbDataOut) &&
747 (TransferDirection != EfiUsbNoData)) {
748 return EFI_INVALID_PARAMETER;
749 }
750
751 if ((TransferDirection == EfiUsbNoData) &&
752 ((Data != NULL) || (*DataLength != 0))) {
753 return EFI_INVALID_PARAMETER;
754 }
755
756 if ((TransferDirection != EfiUsbNoData) &&
757 ((Data == NULL) || (*DataLength == 0))) {
758 return EFI_INVALID_PARAMETER;
759 }
760
761 if ((MaximumPacketLength != 8) && (MaximumPacketLength != 16) &&
762 (MaximumPacketLength != 32) && (MaximumPacketLength != 64) &&
763 (MaximumPacketLength != 512)
764 ) {
765 return EFI_INVALID_PARAMETER;
766 }
767
768 if ((DeviceSpeed == EFI_USB_SPEED_LOW) && (MaximumPacketLength != 8)) {
769 return EFI_INVALID_PARAMETER;
770 }
771
772 if ((DeviceSpeed == EFI_USB_SPEED_SUPER) && (MaximumPacketLength != 512)) {
773 return EFI_INVALID_PARAMETER;
774 }
775
776 OldTpl = gBS->RaiseTPL (XHC_TPL);
777
778 Xhc = XHC_FROM_THIS (This);
779
780 Status = EFI_DEVICE_ERROR;
781 *TransferResult = EFI_USB_ERR_SYSTEM;
782
783 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
784 DEBUG ((EFI_D_ERROR, "XhcControlTransfer: HC halted at entrance\n"));
785 goto ON_EXIT;
786 }
787
788 //
789 // Check if the device is still enabled before every transaction.
790 //
791 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
792 if (SlotId == 0) {
793 goto ON_EXIT;
794 }
795
796 //
797 // Acquire the actual device address assigned by XHCI's Address_Device cmd.
798 //
799 XhciDevAddr = Xhc->UsbDevContext[SlotId].XhciDevAddr;
800
801 //
802 // Hook the Set_Address request from UsbBus.
803 // According to XHCI 1.0 spec, the Set_Address request is replaced by XHCI's Address_Device cmd.
804 //
805 if ((Request->Request == USB_REQ_SET_ADDRESS) &&
806 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE))) {
807 //
808 // Reset the BusDevAddr field of all disabled entries in UsbDevContext array firstly.
809 // This way is used to clean the history to avoid using wrong device address by XhcAsyncInterruptTransfer().
810 //
811 for (Index = 0; Index < 255; Index++) {
812 if (!Xhc->UsbDevContext[Index + 1].Enabled &&
813 (Xhc->UsbDevContext[Index + 1].SlotId != 0) &&
814 (Xhc->UsbDevContext[Index + 1].BusDevAddr == (UINT8)Request->Value)) {
815 Xhc->UsbDevContext[Index + 1].BusDevAddr = 0;
816 }
817 }
818 //
819 // The actual device address has been assigned by XHCI during initializing the device slot.
820 // So we just need establish the mapping relationship between the device address requested from UsbBus
821 // and the actual device address assigned by XHCI. The the following invocations through EFI_USB2_HC_PROTOCOL interface
822 // can find out the actual device address by it.
823 //
824 Xhc->UsbDevContext[SlotId].BusDevAddr = (UINT8)Request->Value;
825 Status = EFI_SUCCESS;
826 goto ON_EXIT;
827 }
828
829 //
830 // If the port reset operation happens after the usb super speed device is enabled,
831 // The subsequent configuration, such as getting device descriptor, will fail.
832 // So here a workaround is introduced to skip the reset operation if the device is enabled.
833 //
834 if ((Request->Request == USB_REQ_SET_FEATURE) &&
835 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER)) &&
836 (Request->Value == EfiUsbPortReset)) {
837 if (DeviceSpeed == EFI_USB_SPEED_SUPER) {
838 Status = EFI_SUCCESS;
839 goto ON_EXIT;
840 }
841 }
842
843 //
844 // Create a new URB, insert it into the asynchronous
845 // schedule list, then poll the execution status.
846 // Note that we encode the direction in address although default control
847 // endpoint is bidirectional. XhcCreateUrb expects this
848 // combination of Ep addr and its direction.
849 //
850 Endpoint = (UINT8) (0 | ((TransferDirection == EfiUsbDataIn) ? 0x80 : 0));
851 Urb = XhcCreateUrb (
852 Xhc,
853 XhciDevAddr,
854 Endpoint,
855 DeviceSpeed,
856 MaximumPacketLength,
857 XHC_CTRL_TRANSFER,
858 Request,
859 Data,
860 *DataLength,
861 NULL,
862 NULL
863 );
864
865 if (Urb == NULL) {
866 DEBUG ((EFI_D_ERROR, "XhcControlTransfer: failed to create URB"));
867 Status = EFI_OUT_OF_RESOURCES;
868 goto ON_EXIT;
869 }
870 ASSERT (Urb->EvtRing == &Xhc->CtrlTrEventRing);
871 Status = XhcExecTransfer (Xhc, FALSE, Urb, Timeout);
872
873 //
874 // Get the status from URB. The result is updated in XhcCheckUrbResult
875 // which is called by XhcExecTransfer
876 //
877 *TransferResult = Urb->Result;
878 *DataLength = Urb->Completed;
879
880 if (*TransferResult == EFI_USB_NOERROR) {
881 Status = EFI_SUCCESS;
882 } else if ((*TransferResult == EFI_USB_ERR_STALL) ||
883 (*TransferResult == EFI_USB_ERR_TIMEOUT)) {
884 RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);
885 ASSERT_EFI_ERROR (RecoveryStatus);
886 goto FREE_URB;
887 }
888
889 //
890 // Hook Get_Descriptor request from UsbBus as we need evaluate context and configure endpoint.
891 // Hook Get_Status request form UsbBus as we need trace device attach/detach event happened at hub.
892 // Hook Set_Config request from UsbBus as we need configure device endpoint.
893 //
894 if ((Request->Request == USB_REQ_GET_DESCRIPTOR) &&
895 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE))) {
896 DescriptorType = (UINT8)(Request->Value >> 8);
897 if ((DescriptorType == USB_DESC_TYPE_DEVICE) && (*DataLength == sizeof (EFI_USB_DEVICE_DESCRIPTOR))) {
898 ASSERT (Data != NULL);
899 //
900 // Store a copy of device scriptor as hub device need this info to configure endpoint.
901 //
902 CopyMem (&Xhc->UsbDevContext[SlotId].DevDesc, Data, *DataLength);
903 if (Xhc->UsbDevContext[SlotId].DevDesc.BcdUSB == 0x0300) {
904 //
905 // If it's a usb3.0 device, then its max packet size is a 2^n.
906 //
907 MaxPacket0 = 1 << Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
908 } else {
909 MaxPacket0 = Xhc->UsbDevContext[SlotId].DevDesc.MaxPacketSize0;
910 }
911 Xhc->UsbDevContext[SlotId].ConfDesc = AllocateZeroPool (Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations * sizeof (EFI_USB_CONFIG_DESCRIPTOR *));
912 Status = XhcEvaluateContext (Xhc, SlotId, MaxPacket0);
913 ASSERT_EFI_ERROR (Status);
914 } else if (DescriptorType == USB_DESC_TYPE_CONFIG) {
915 ASSERT (Data != NULL);
916 if (*DataLength == ((UINT16 *)Data)[1]) {
917 //
918 // Get configuration value from request, Store the configuration descriptor for Configure_Endpoint cmd.
919 //
920 Index = (UINT8)Request->Value;
921 ASSERT (Index < Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations);
922 Xhc->UsbDevContext[SlotId].ConfDesc[Index] = AllocateZeroPool(*DataLength);
923 CopyMem (Xhc->UsbDevContext[SlotId].ConfDesc[Index], Data, *DataLength);
924 }
925 } else if ((DescriptorType == USB_DESC_TYPE_HUB) ||
926 (DescriptorType == USB_DESC_TYPE_HUB_SUPER_SPEED)) {
927 ASSERT (Data != NULL);
928 HubDesc = (EFI_USB_HUB_DESCRIPTOR *)Data;
929 //
930 // The bit 5,6 of HubCharacter field of Hub Descriptor is TTT.
931 //
932 TTT = (UINT8)((HubDesc->HubCharacter & (BIT5 | BIT6)) >> 5);
933 if (Xhc->UsbDevContext[SlotId].DevDesc.DeviceProtocol == 2) {
934 //
935 // Don't support multi-TT feature for super speed hub now.
936 //
937 MTT = 1;
938 ASSERT (FALSE);
939 } else {
940 MTT = 0;
941 }
942
943 Status = XhcConfigHubContext (
944 Xhc,
945 SlotId,
946 HubDesc->NumPorts,
947 TTT,
948 MTT
949 );
950 }
951 } else if ((Request->Request == USB_REQ_SET_CONFIG) &&
952 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbNoData, USB_REQ_TYPE_STANDARD, USB_TARGET_DEVICE))) {
953 //
954 // Hook Set_Config request from UsbBus as we need configure device endpoint.
955 //
956 for (Index = 0; Index < Xhc->UsbDevContext[SlotId].DevDesc.NumConfigurations; Index++) {
957 if (Xhc->UsbDevContext[SlotId].ConfDesc[Index]->ConfigurationValue == (UINT8)Request->Value) {
958 XhcSetConfigCmd (Xhc, SlotId, DeviceSpeed, Xhc->UsbDevContext[SlotId].ConfDesc[Index]);
959 break;
960 }
961 }
962 } else if ((Request->Request == USB_REQ_GET_STATUS) &&
963 (Request->RequestType == USB_REQUEST_TYPE (EfiUsbDataIn, USB_REQ_TYPE_CLASS, USB_TARGET_OTHER))) {
964 ASSERT (Data != NULL);
965 //
966 // Hook Get_Status request from UsbBus to keep track of the port status change.
967 //
968 State = *(UINT32 *)Data;
969 PortStatus.PortStatus = 0;
970 PortStatus.PortChangeStatus = 0;
971
972 if (DeviceSpeed == EFI_USB_SPEED_SUPER) {
973 //
974 // For super speed hub, its bit10~12 presents the attached device speed.
975 //
976 if ((State & XHC_PORTSC_PS) >> 10 == 0) {
977 PortStatus.PortStatus |= USB_PORT_STAT_SUPER_SPEED;
978 }
979 } else if (DeviceSpeed == EFI_USB_SPEED_HIGH) {
980 //
981 // For high speed hub, its bit9~10 presents the attached device speed.
982 //
983 if (XHC_BIT_IS_SET (State, BIT9)) {
984 PortStatus.PortStatus |= USB_PORT_STAT_LOW_SPEED;
985 } else if (XHC_BIT_IS_SET (State, BIT10)) {
986 PortStatus.PortStatus |= USB_PORT_STAT_HIGH_SPEED;
987 }
988 } else {
989 ASSERT (0);
990 }
991
992 //
993 // Convert the XHCI port/port change state to UEFI status
994 //
995 MapSize = sizeof (mUsbPortStateMap) / sizeof (USB_PORT_STATE_MAP);
996 for (Index = 0; Index < MapSize; Index++) {
997 if (XHC_BIT_IS_SET (State, mUsbPortStateMap[Index].HwState)) {
998 PortStatus.PortStatus = (UINT16) (PortStatus.PortStatus | mUsbPortStateMap[Index].UefiState);
999 }
1000 }
1001 MapSize = sizeof (mUsbPortChangeMap) / sizeof (USB_PORT_STATE_MAP);
1002
1003 for (Index = 0; Index < MapSize; Index++) {
1004 if (XHC_BIT_IS_SET (State, mUsbPortChangeMap[Index].HwState)) {
1005 PortStatus.PortChangeStatus = (UINT16) (PortStatus.PortChangeStatus | mUsbPortChangeMap[Index].UefiState);
1006 }
1007 }
1008
1009 XhcPollPortStatusChange (Xhc, Xhc->UsbDevContext[SlotId].RouteString, (UINT8)Request->Index, &PortStatus);
1010 }
1011
1012 FREE_URB:
1013 FreePool (Urb);
1014
1015 ON_EXIT:
1016
1017 if (EFI_ERROR (Status)) {
1018 DEBUG ((EFI_D_ERROR, "XhcControlTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1019 }
1020
1021 gBS->RestoreTPL (OldTpl);
1022
1023 return Status;
1024 }
1025
1026
1027 /**
1028 Submits bulk transfer to a bulk endpoint of a USB device.
1029
1030 @param This This EFI_USB2_HC_PROTOCOL instance.
1031 @param DeviceAddress Target device address.
1032 @param EndPointAddress Endpoint number and its direction in bit 7.
1033 @param DeviceSpeed Device speed, Low speed device doesn't support bulk
1034 transfer.
1035 @param MaximumPacketLength Maximum packet size the endpoint is capable of
1036 sending or receiving.
1037 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1038 @param Data Array of pointers to the buffers of data to transmit
1039 from or receive into.
1040 @param DataLength The lenght of the data buffer.
1041 @param DataToggle On input, the initial data toggle for the transfer;
1042 On output, it is updated to to next data toggle to
1043 use of the subsequent bulk transfer.
1044 @param Timeout Indicates the maximum time, in millisecond, which
1045 the transfer is allowed to complete.
1046 @param Translator A pointr to the transaction translator data.
1047 @param TransferResult A pointer to the detailed result information of the
1048 bulk transfer.
1049
1050 @retval EFI_SUCCESS The transfer was completed successfully.
1051 @retval EFI_OUT_OF_RESOURCES The transfer failed due to lack of resource.
1052 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
1053 @retval EFI_TIMEOUT The transfer failed due to timeout.
1054 @retval EFI_DEVICE_ERROR The transfer failed due to host controller error.
1055
1056 **/
1057 EFI_STATUS
1058 EFIAPI
1059 XhcBulkTransfer (
1060 IN EFI_USB2_HC_PROTOCOL *This,
1061 IN UINT8 DeviceAddress,
1062 IN UINT8 EndPointAddress,
1063 IN UINT8 DeviceSpeed,
1064 IN UINTN MaximumPacketLength,
1065 IN UINT8 DataBuffersNumber,
1066 IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],
1067 IN OUT UINTN *DataLength,
1068 IN OUT UINT8 *DataToggle,
1069 IN UINTN Timeout,
1070 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1071 OUT UINT32 *TransferResult
1072 )
1073 {
1074 USB_XHCI_INSTANCE *Xhc;
1075 URB *Urb;
1076 UINT8 XhciDevAddr;
1077 UINT8 SlotId;
1078 EFI_STATUS Status;
1079 EFI_STATUS RecoveryStatus;
1080 EFI_TPL OldTpl;
1081
1082 //
1083 // Validate the parameters
1084 //
1085 if ((DataLength == NULL) || (*DataLength == 0) ||
1086 (Data == NULL) || (Data[0] == NULL) || (TransferResult == NULL)) {
1087 return EFI_INVALID_PARAMETER;
1088 }
1089
1090 if ((*DataToggle != 0) && (*DataToggle != 1)) {
1091 return EFI_INVALID_PARAMETER;
1092 }
1093
1094 if ((DeviceSpeed == EFI_USB_SPEED_LOW) ||
1095 ((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
1096 ((EFI_USB_SPEED_HIGH == DeviceSpeed) && (MaximumPacketLength > 512)) ||
1097 ((EFI_USB_SPEED_SUPER == DeviceSpeed) && (MaximumPacketLength > 1024))) {
1098 return EFI_INVALID_PARAMETER;
1099 }
1100
1101 OldTpl = gBS->RaiseTPL (XHC_TPL);
1102
1103 Xhc = XHC_FROM_THIS (This);
1104
1105 *TransferResult = EFI_USB_ERR_SYSTEM;
1106 Status = EFI_DEVICE_ERROR;
1107
1108 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1109 DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: HC is halted\n"));
1110 goto ON_EXIT;
1111 }
1112
1113 //
1114 // Check if the device is still enabled before every transaction.
1115 //
1116 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1117 if (SlotId == 0) {
1118 goto ON_EXIT;
1119 }
1120
1121 //
1122 // Acquire the actual device address assigned by XHCI's Address_Device cmd.
1123 //
1124 XhciDevAddr = Xhc->UsbDevContext[SlotId].XhciDevAddr;
1125
1126 //
1127 // Create a new URB, insert it into the asynchronous
1128 // schedule list, then poll the execution status.
1129 //
1130 Urb = XhcCreateUrb (
1131 Xhc,
1132 XhciDevAddr,
1133 EndPointAddress,
1134 DeviceSpeed,
1135 MaximumPacketLength,
1136 XHC_BULK_TRANSFER,
1137 NULL,
1138 Data[0],
1139 *DataLength,
1140 NULL,
1141 NULL
1142 );
1143
1144 if (Urb == NULL) {
1145 DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: failed to create URB\n"));
1146 Status = EFI_OUT_OF_RESOURCES;
1147 goto ON_EXIT;
1148 }
1149
1150 ASSERT (Urb->EvtRing == &Xhc->BulkTrEventRing);
1151
1152 Status = XhcExecTransfer (Xhc, FALSE, Urb, Timeout);
1153
1154 *TransferResult = Urb->Result;
1155 *DataLength = Urb->Completed;
1156
1157 if (*TransferResult == EFI_USB_NOERROR) {
1158 Status = EFI_SUCCESS;
1159 } else if ((*TransferResult == EFI_USB_ERR_STALL) ||
1160 (*TransferResult == EFI_USB_ERR_TIMEOUT)) {
1161 RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);
1162 ASSERT_EFI_ERROR (RecoveryStatus);
1163 }
1164
1165 FreePool (Urb);
1166
1167 ON_EXIT:
1168
1169 if (EFI_ERROR (Status)) {
1170 DEBUG ((EFI_D_ERROR, "XhcBulkTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1171 }
1172 gBS->RestoreTPL (OldTpl);
1173
1174 return Status;
1175 }
1176
1177 /**
1178 Submits an asynchronous interrupt transfer to an
1179 interrupt endpoint of a USB device.
1180
1181 @param This This EFI_USB2_HC_PROTOCOL instance.
1182 @param DeviceAddress Target device address.
1183 @param EndPointAddress Endpoint number and its direction encoded in bit 7
1184 @param DeviceSpeed Indicates device speed.
1185 @param MaximumPacketLength Maximum packet size the target endpoint is capable
1186 @param IsNewTransfer If TRUE, to submit an new asynchronous interrupt
1187 transfer If FALSE, to remove the specified
1188 asynchronous interrupt.
1189 @param DataToggle On input, the initial data toggle to use; on output,
1190 it is updated to indicate the next data toggle.
1191 @param PollingInterval The he interval, in milliseconds, that the transfer
1192 is polled.
1193 @param DataLength The length of data to receive at the rate specified
1194 by PollingInterval.
1195 @param Translator Transaction translator to use.
1196 @param CallBackFunction Function to call at the rate specified by
1197 PollingInterval.
1198 @param Context Context to CallBackFunction.
1199
1200 @retval EFI_SUCCESS The request has been successfully submitted or canceled.
1201 @retval EFI_INVALID_PARAMETER Some parameters are invalid.
1202 @retval EFI_OUT_OF_RESOURCES The request failed due to a lack of resources.
1203 @retval EFI_DEVICE_ERROR The transfer failed due to host controller error.
1204
1205 **/
1206 EFI_STATUS
1207 EFIAPI
1208 XhcAsyncInterruptTransfer (
1209 IN EFI_USB2_HC_PROTOCOL *This,
1210 IN UINT8 DeviceAddress,
1211 IN UINT8 EndPointAddress,
1212 IN UINT8 DeviceSpeed,
1213 IN UINTN MaximumPacketLength,
1214 IN BOOLEAN IsNewTransfer,
1215 IN OUT UINT8 *DataToggle,
1216 IN UINTN PollingInterval,
1217 IN UINTN DataLength,
1218 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1219 IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,
1220 IN VOID *Context OPTIONAL
1221 )
1222 {
1223 USB_XHCI_INSTANCE *Xhc;
1224 URB *Urb;
1225 EFI_STATUS Status;
1226 UINT8 XhciDevAddr;
1227 UINT8 SlotId;
1228 UINT8 Index;
1229 UINT8 *Data;
1230 EFI_TPL OldTpl;
1231
1232 //
1233 // Validate parameters
1234 //
1235 if (!XHCI_IS_DATAIN (EndPointAddress)) {
1236 return EFI_INVALID_PARAMETER;
1237 }
1238
1239 if (IsNewTransfer) {
1240 if (DataLength == 0) {
1241 return EFI_INVALID_PARAMETER;
1242 }
1243
1244 if ((*DataToggle != 1) && (*DataToggle != 0)) {
1245 return EFI_INVALID_PARAMETER;
1246 }
1247
1248 if ((PollingInterval > 255) || (PollingInterval < 1)) {
1249 return EFI_INVALID_PARAMETER;
1250 }
1251 }
1252
1253 OldTpl = gBS->RaiseTPL (XHC_TPL);
1254
1255 Xhc = XHC_FROM_THIS (This);
1256
1257 //
1258 // Delete Async interrupt transfer request.
1259 //
1260 if (!IsNewTransfer) {
1261 //
1262 // The delete request may happen after device is detached.
1263 //
1264 for (Index = 0; Index < 255; Index++) {
1265 if ((Xhc->UsbDevContext[Index + 1].SlotId != 0) &&
1266 (Xhc->UsbDevContext[Index + 1].BusDevAddr == DeviceAddress)) {
1267 break;
1268 }
1269 }
1270
1271 if (Index == 255) {
1272 Status = EFI_INVALID_PARAMETER;
1273 goto ON_EXIT;
1274 }
1275
1276 //
1277 // Acquire the actual device address assigned by XHCI's Address_Device cmd.
1278 //
1279 XhciDevAddr = Xhc->UsbDevContext[Index + 1].XhciDevAddr;
1280
1281 Status = XhciDelAsyncIntTransfer (Xhc, XhciDevAddr, EndPointAddress);
1282 DEBUG ((EFI_D_INFO, "XhcAsyncInterruptTransfer: remove old transfer, Status = %r\n", Status));
1283 goto ON_EXIT;
1284 }
1285
1286 Status = EFI_SUCCESS;
1287
1288 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1289 DEBUG ((EFI_D_ERROR, "XhcAsyncInterruptTransfer: HC is halt\n"));
1290 Status = EFI_DEVICE_ERROR;
1291 goto ON_EXIT;
1292 }
1293
1294 //
1295 // Check if the device is still enabled before every transaction.
1296 //
1297 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1298 if (SlotId == 0) {
1299 goto ON_EXIT;
1300 }
1301
1302 //
1303 // Acquire the actual device address assigned by XHCI's Address_Device cmd.
1304 //
1305 XhciDevAddr = Xhc->UsbDevContext[SlotId].XhciDevAddr;
1306
1307 Data = AllocateZeroPool (DataLength);
1308
1309 if (Data == NULL) {
1310 DEBUG ((EFI_D_ERROR, "XhcAsyncInterruptTransfer: failed to allocate buffer\n"));
1311 Status = EFI_OUT_OF_RESOURCES;
1312 goto ON_EXIT;
1313 }
1314
1315 Urb = XhcCreateUrb (
1316 Xhc,
1317 XhciDevAddr,
1318 EndPointAddress,
1319 DeviceSpeed,
1320 MaximumPacketLength,
1321 XHC_INT_TRANSFER_ASYNC,
1322 NULL,
1323 Data,
1324 DataLength,
1325 CallBackFunction,
1326 Context
1327 );
1328
1329 if (Urb == NULL) {
1330 DEBUG ((EFI_D_ERROR, "XhcAsyncInterruptTransfer: failed to create URB\n"));
1331 FreePool (Data);
1332 Status = EFI_OUT_OF_RESOURCES;
1333 goto ON_EXIT;
1334 }
1335
1336 ASSERT (Urb->EvtRing == &Xhc->AsynIntTrEventRing);
1337
1338 InsertHeadList (&Xhc->AsyncIntTransfers, &Urb->UrbList);
1339 //
1340 // Ring the doorbell
1341 //
1342 Status = RingIntTransferDoorBell (Xhc, Urb);
1343
1344 ON_EXIT:
1345 gBS->RestoreTPL (OldTpl);
1346
1347 return Status;
1348 }
1349
1350
1351 /**
1352 Submits synchronous interrupt transfer to an interrupt endpoint
1353 of a USB device.
1354
1355 @param This This EFI_USB2_HC_PROTOCOL instance.
1356 @param DeviceAddress Target device address.
1357 @param EndPointAddress Endpoint number and its direction encoded in bit 7
1358 @param DeviceSpeed Indicates device speed.
1359 @param MaximumPacketLength Maximum packet size the target endpoint is capable
1360 of sending or receiving.
1361 @param Data Buffer of data that will be transmitted to USB
1362 device or received from USB device.
1363 @param DataLength On input, the size, in bytes, of the data buffer; On
1364 output, the number of bytes transferred.
1365 @param DataToggle On input, the initial data toggle to use; on output,
1366 it is updated to indicate the next data toggle.
1367 @param Timeout Maximum time, in second, to complete.
1368 @param Translator Transaction translator to use.
1369 @param TransferResult Variable to receive the transfer result.
1370
1371 @return EFI_SUCCESS The transfer was completed successfully.
1372 @return EFI_OUT_OF_RESOURCES The transfer failed due to lack of resource.
1373 @return EFI_INVALID_PARAMETER Some parameters are invalid.
1374 @return EFI_TIMEOUT The transfer failed due to timeout.
1375 @return EFI_DEVICE_ERROR The failed due to host controller or device error
1376
1377 **/
1378 EFI_STATUS
1379 EFIAPI
1380 XhcSyncInterruptTransfer (
1381 IN EFI_USB2_HC_PROTOCOL *This,
1382 IN UINT8 DeviceAddress,
1383 IN UINT8 EndPointAddress,
1384 IN UINT8 DeviceSpeed,
1385 IN UINTN MaximumPacketLength,
1386 IN OUT VOID *Data,
1387 IN OUT UINTN *DataLength,
1388 IN OUT UINT8 *DataToggle,
1389 IN UINTN Timeout,
1390 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1391 OUT UINT32 *TransferResult
1392 )
1393 {
1394 USB_XHCI_INSTANCE *Xhc;
1395 URB *Urb;
1396 UINT8 XhciDevAddr;
1397 UINT8 SlotId;
1398 EFI_STATUS Status;
1399 EFI_STATUS RecoveryStatus;
1400 EFI_TPL OldTpl;
1401
1402 //
1403 // Validates parameters
1404 //
1405 if ((DataLength == NULL) || (*DataLength == 0) ||
1406 (Data == NULL) || (TransferResult == NULL)) {
1407 return EFI_INVALID_PARAMETER;
1408 }
1409
1410 if (!XHCI_IS_DATAIN (EndPointAddress)) {
1411 return EFI_INVALID_PARAMETER;
1412 }
1413
1414 if ((*DataToggle != 1) && (*DataToggle != 0)) {
1415 return EFI_INVALID_PARAMETER;
1416 }
1417
1418 if (((DeviceSpeed == EFI_USB_SPEED_LOW) && (MaximumPacketLength != 8)) ||
1419 ((DeviceSpeed == EFI_USB_SPEED_FULL) && (MaximumPacketLength > 64)) ||
1420 ((DeviceSpeed == EFI_USB_SPEED_HIGH) && (MaximumPacketLength > 3072))) {
1421 return EFI_INVALID_PARAMETER;
1422 }
1423
1424 OldTpl = gBS->RaiseTPL (XHC_TPL);
1425
1426 Xhc = XHC_FROM_THIS (This);
1427
1428 *TransferResult = EFI_USB_ERR_SYSTEM;
1429 Status = EFI_DEVICE_ERROR;
1430
1431 if (XhcIsHalt (Xhc) || XhcIsSysError (Xhc)) {
1432 DEBUG ((EFI_D_ERROR, "EhcSyncInterruptTransfer: HC is halt\n"));
1433 goto ON_EXIT;
1434 }
1435
1436 //
1437 // Check if the device is still enabled before every transaction.
1438 //
1439 SlotId = XhcBusDevAddrToSlotId (Xhc, DeviceAddress);
1440 if (SlotId == 0) {
1441 goto ON_EXIT;
1442 }
1443
1444 //
1445 // Acquire the actual device address assigned by XHCI's Address_Device cmd.
1446 //
1447 XhciDevAddr = Xhc->UsbDevContext[SlotId].XhciDevAddr;
1448
1449 Urb = XhcCreateUrb (
1450 Xhc,
1451 XhciDevAddr,
1452 EndPointAddress,
1453 DeviceSpeed,
1454 MaximumPacketLength,
1455 XHC_INT_TRANSFER_SYNC,
1456 NULL,
1457 Data,
1458 *DataLength,
1459 NULL,
1460 NULL
1461 );
1462
1463 if (Urb == NULL) {
1464 DEBUG ((EFI_D_ERROR, "XhcSyncInterruptTransfer: failed to create URB\n"));
1465 Status = EFI_OUT_OF_RESOURCES;
1466 goto ON_EXIT;
1467 }
1468
1469 Status = XhcExecTransfer (Xhc, FALSE, Urb, Timeout);
1470
1471 *TransferResult = Urb->Result;
1472 *DataLength = Urb->Completed;
1473
1474 if (*TransferResult == EFI_USB_NOERROR) {
1475 Status = EFI_SUCCESS;
1476 } else if ((*TransferResult == EFI_USB_ERR_STALL) ||
1477 (*TransferResult == EFI_USB_ERR_TIMEOUT)) {
1478 RecoveryStatus = XhcRecoverHaltedEndpoint(Xhc, Urb);
1479 ASSERT_EFI_ERROR (RecoveryStatus);
1480 }
1481
1482 FreePool (Urb);
1483
1484 ON_EXIT:
1485 if (EFI_ERROR (Status)) {
1486 DEBUG ((EFI_D_ERROR, "XhcSyncInterruptTransfer: error - %r, transfer - %x\n", Status, *TransferResult));
1487 }
1488 gBS->RestoreTPL (OldTpl);
1489
1490 return Status;
1491 }
1492
1493
1494 /**
1495 Submits isochronous transfer to a target USB device.
1496
1497 @param This This EFI_USB2_HC_PROTOCOL instance.
1498 @param DeviceAddress Target device address.
1499 @param EndPointAddress End point address with its direction.
1500 @param DeviceSpeed Device speed, Low speed device doesn't support this
1501 type.
1502 @param MaximumPacketLength Maximum packet size that the endpoint is capable of
1503 sending or receiving.
1504 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1505 @param Data Array of pointers to the buffers of data that will
1506 be transmitted to USB device or received from USB
1507 device.
1508 @param DataLength The size, in bytes, of the data buffer.
1509 @param Translator Transaction translator to use.
1510 @param TransferResult Variable to receive the transfer result.
1511
1512 @return EFI_UNSUPPORTED Isochronous transfer is unsupported.
1513
1514 **/
1515 EFI_STATUS
1516 EFIAPI
1517 XhcIsochronousTransfer (
1518 IN EFI_USB2_HC_PROTOCOL *This,
1519 IN UINT8 DeviceAddress,
1520 IN UINT8 EndPointAddress,
1521 IN UINT8 DeviceSpeed,
1522 IN UINTN MaximumPacketLength,
1523 IN UINT8 DataBuffersNumber,
1524 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
1525 IN UINTN DataLength,
1526 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1527 OUT UINT32 *TransferResult
1528 )
1529 {
1530 return EFI_UNSUPPORTED;
1531 }
1532
1533
1534 /**
1535 Submits Async isochronous transfer to a target USB device.
1536
1537 @param This This EFI_USB2_HC_PROTOCOL instance.
1538 @param DeviceAddress Target device address.
1539 @param EndPointAddress End point address with its direction.
1540 @param DeviceSpeed Device speed, Low speed device doesn't support this
1541 type.
1542 @param MaximumPacketLength Maximum packet size that the endpoint is capable of
1543 sending or receiving.
1544 @param DataBuffersNumber Number of data buffers prepared for the transfer.
1545 @param Data Array of pointers to the buffers of data that will
1546 be transmitted to USB device or received from USB
1547 device.
1548 @param DataLength The size, in bytes, of the data buffer.
1549 @param Translator Transaction translator to use.
1550 @param IsochronousCallBack Function to be called when the transfer complete.
1551 @param Context Context passed to the call back function as
1552 parameter.
1553
1554 @return EFI_UNSUPPORTED Isochronous transfer isn't supported.
1555
1556 **/
1557 EFI_STATUS
1558 EFIAPI
1559 XhcAsyncIsochronousTransfer (
1560 IN EFI_USB2_HC_PROTOCOL *This,
1561 IN UINT8 DeviceAddress,
1562 IN UINT8 EndPointAddress,
1563 IN UINT8 DeviceSpeed,
1564 IN UINTN MaximumPacketLength,
1565 IN UINT8 DataBuffersNumber,
1566 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],
1567 IN UINTN DataLength,
1568 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,
1569 IN EFI_ASYNC_USB_TRANSFER_CALLBACK IsochronousCallBack,
1570 IN VOID *Context
1571 )
1572 {
1573 return EFI_UNSUPPORTED;
1574 }
1575
1576 /**
1577 Entry point for EFI drivers.
1578
1579 @param ImageHandle EFI_HANDLE.
1580 @param SystemTable EFI_SYSTEM_TABLE.
1581
1582 @retval EFI_SUCCESS Success.
1583 @retval Others Fail.
1584
1585 **/
1586 EFI_STATUS
1587 EFIAPI
1588 XhcDriverEntryPoint (
1589 IN EFI_HANDLE ImageHandle,
1590 IN EFI_SYSTEM_TABLE *SystemTable
1591 )
1592 {
1593 return EfiLibInstallDriverBindingComponentName2 (
1594 ImageHandle,
1595 SystemTable,
1596 &gXhciDriverBinding,
1597 ImageHandle,
1598 &gXhciComponentName,
1599 &gXhciComponentName2
1600 );
1601 }
1602
1603
1604 /**
1605 Test to see if this driver supports ControllerHandle. Any
1606 ControllerHandle that has Usb2HcProtocol installed will
1607 be supported.
1608
1609 @param This Protocol instance pointer.
1610 @param Controller Handle of device to test.
1611 @param RemainingDevicePath Not used.
1612
1613 @return EFI_SUCCESS This driver supports this device.
1614 @return EFI_UNSUPPORTED This driver does not support this device.
1615
1616 **/
1617 EFI_STATUS
1618 EFIAPI
1619 XhcDriverBindingSupported (
1620 IN EFI_DRIVER_BINDING_PROTOCOL *This,
1621 IN EFI_HANDLE Controller,
1622 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
1623 )
1624 {
1625 EFI_STATUS Status;
1626 EFI_PCI_IO_PROTOCOL *PciIo;
1627 USB_CLASSC UsbClassCReg;
1628
1629 //
1630 // Test whether there is PCI IO Protocol attached on the controller handle.
1631 //
1632 Status = gBS->OpenProtocol (
1633 Controller,
1634 &gEfiPciIoProtocolGuid,
1635 (VOID **) &PciIo,
1636 This->DriverBindingHandle,
1637 Controller,
1638 EFI_OPEN_PROTOCOL_BY_DRIVER
1639 );
1640
1641 if (EFI_ERROR (Status)) {
1642 return EFI_UNSUPPORTED;
1643 }
1644
1645 Status = PciIo->Pci.Read (
1646 PciIo,
1647 EfiPciIoWidthUint8,
1648 PCI_CLASSCODE_OFFSET,
1649 sizeof (USB_CLASSC) / sizeof (UINT8),
1650 &UsbClassCReg
1651 );
1652
1653 if (EFI_ERROR (Status)) {
1654 Status = EFI_UNSUPPORTED;
1655 goto ON_EXIT;
1656 }
1657
1658 //
1659 // Test whether the controller belongs to Xhci type
1660 //
1661 if ((UsbClassCReg.BaseCode != PCI_CLASS_SERIAL) ||
1662 (UsbClassCReg.SubClassCode != PCI_CLASS_SERIAL_USB) ||
1663 (UsbClassCReg.ProgInterface != PCI_IF_XHCI)) {
1664 Status = EFI_UNSUPPORTED;
1665 }
1666
1667 ON_EXIT:
1668 gBS->CloseProtocol (
1669 Controller,
1670 &gEfiPciIoProtocolGuid,
1671 This->DriverBindingHandle,
1672 Controller
1673 );
1674
1675 return Status;
1676 }
1677
1678 /**
1679 Create and initialize a USB_XHCI_INSTANCE structure.
1680
1681 @param PciIo The PciIo on this device.
1682 @param OriginalPciAttributes Original PCI attributes.
1683
1684 @return The allocated and initialized USB_XHCI_INSTANCE structure if created,
1685 otherwise NULL.
1686
1687 **/
1688 USB_XHCI_INSTANCE*
1689 XhcCreateUsbHc (
1690 IN EFI_PCI_IO_PROTOCOL *PciIo,
1691 IN UINT64 OriginalPciAttributes
1692 )
1693 {
1694 USB_XHCI_INSTANCE *Xhc;
1695 EFI_STATUS Status;
1696 UINT32 PageSize;
1697 UINT16 ExtCapReg;
1698
1699 Xhc = AllocateZeroPool (sizeof (USB_XHCI_INSTANCE));
1700
1701 if (Xhc == NULL) {
1702 return NULL;
1703 }
1704
1705 //
1706 // Initialize private data structure
1707 //
1708 Xhc->Signature = XHCI_INSTANCE_SIG;
1709 Xhc->PciIo = PciIo;
1710 Xhc->OriginalPciAttributes = OriginalPciAttributes;
1711 CopyMem (&Xhc->Usb2Hc, &gXhciUsb2HcTemplate, sizeof (EFI_USB2_HC_PROTOCOL));
1712
1713 InitializeListHead (&Xhc->AsyncIntTransfers);
1714
1715 //
1716 // Be caution that the Offset passed to XhcReadCapReg() should be Dword align
1717 //
1718 Xhc->CapLength = XhcReadCapReg8 (Xhc, XHC_CAPLENGTH_OFFSET);
1719 Xhc->HcSParams1.Dword = XhcReadCapReg (Xhc, XHC_HCSPARAMS1_OFFSET);
1720 Xhc->HcSParams2.Dword = XhcReadCapReg (Xhc, XHC_HCSPARAMS2_OFFSET);
1721 Xhc->HcCParams.Dword = XhcReadCapReg (Xhc, XHC_HCCPARAMS_OFFSET);
1722 Xhc->DBOff = XhcReadCapReg (Xhc, XHC_DBOFF_OFFSET);
1723 Xhc->RTSOff = XhcReadCapReg (Xhc, XHC_RTSOFF_OFFSET);
1724
1725 //
1726 // This PageSize field defines the page size supported by the xHC implementation.
1727 // This xHC supports a page size of 2^(n+12) if bit n is Set. For example,
1728 // if bit 0 is Set, the xHC supports 4k byte page sizes.
1729 //
1730 PageSize = XhcReadOpReg(Xhc, XHC_PAGESIZE_OFFSET) & XHC_PAGESIZE_MASK;
1731 Xhc->PageSize = 1 << (HighBitSet32(PageSize) + 12);
1732
1733 ExtCapReg = (UINT16) (Xhc->HcCParams.Data.ExtCapReg);
1734 Xhc->ExtCapRegBase = ExtCapReg << 2;
1735 Xhc->UsbLegSupOffset = XhcGetLegSupCapAddr (Xhc);
1736
1737 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: Capability length 0x%x\n", Xhc->CapLength));
1738 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: HcSParams1 0x%x\n", Xhc->HcSParams1));
1739 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: HcSParams2 0x%x\n", Xhc->HcSParams2));
1740 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: HcCParams 0x%x\n", Xhc->HcCParams));
1741 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: DBOff 0x%x\n", Xhc->DBOff));
1742 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: RTSOff 0x%x\n", Xhc->RTSOff));
1743 DEBUG ((EFI_D_INFO, "XhcCreateUsb3Hc: UsbLegSupOffset 0x%x\n", Xhc->UsbLegSupOffset));
1744
1745 //
1746 // Create AsyncRequest Polling Timer
1747 //
1748 Status = gBS->CreateEvent (
1749 EVT_TIMER | EVT_NOTIFY_SIGNAL,
1750 TPL_CALLBACK,
1751 XhcMonitorAsyncRequests,
1752 Xhc,
1753 &Xhc->PollTimer
1754 );
1755
1756 if (EFI_ERROR (Status)) {
1757 goto ON_ERROR;
1758 }
1759
1760 return Xhc;
1761
1762 ON_ERROR:
1763 FreePool (Xhc);
1764 return NULL;
1765 }
1766
1767 /**
1768 One notified function to stop the Host Controller when gBS->ExitBootServices() called.
1769
1770 @param Event Pointer to this event
1771 @param Context Event hanlder private data
1772
1773 **/
1774 VOID
1775 EFIAPI
1776 XhcExitBootService (
1777 EFI_EVENT Event,
1778 VOID *Context
1779 )
1780
1781 {
1782 USB_XHCI_INSTANCE *Xhc;
1783 EFI_PCI_IO_PROTOCOL *PciIo;
1784
1785 Xhc = (USB_XHCI_INSTANCE*) Context;
1786 PciIo = Xhc->PciIo;
1787
1788 //
1789 // Stop AsyncRequest Polling timer then stop the XHCI driver
1790 // and uninstall the XHCI protocl.
1791 //
1792 gBS->SetTimer (Xhc->PollTimer, TimerCancel, 0);
1793 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
1794
1795 if (Xhc->PollTimer != NULL) {
1796 gBS->CloseEvent (Xhc->PollTimer);
1797 }
1798
1799 //
1800 // Restore original PCI attributes
1801 //
1802 PciIo->Attributes (
1803 PciIo,
1804 EfiPciIoAttributeOperationSet,
1805 Xhc->OriginalPciAttributes,
1806 NULL
1807 );
1808
1809 XhcClearBiosOwnership (Xhc);
1810 }
1811
1812 /**
1813 Starting the Usb XHCI Driver.
1814
1815 @param This Protocol instance pointer.
1816 @param Controller Handle of device to test.
1817 @param RemainingDevicePath Not used.
1818
1819 @return EFI_SUCCESS supports this device.
1820 @return EFI_UNSUPPORTED do not support this device.
1821 @return EFI_DEVICE_ERROR cannot be started due to device Error.
1822 @return EFI_OUT_OF_RESOURCES cannot allocate resources.
1823
1824 **/
1825 EFI_STATUS
1826 EFIAPI
1827 XhcDriverBindingStart (
1828 IN EFI_DRIVER_BINDING_PROTOCOL *This,
1829 IN EFI_HANDLE Controller,
1830 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath
1831 )
1832 {
1833 EFI_STATUS Status;
1834 EFI_PCI_IO_PROTOCOL *PciIo;
1835 UINT64 Supports;
1836 UINT64 OriginalPciAttributes;
1837 BOOLEAN PciAttributesSaved;
1838 USB_XHCI_INSTANCE *Xhc;
1839
1840 //
1841 // Open the PciIo Protocol, then enable the USB host controller
1842 //
1843 Status = gBS->OpenProtocol (
1844 Controller,
1845 &gEfiPciIoProtocolGuid,
1846 (VOID **) &PciIo,
1847 This->DriverBindingHandle,
1848 Controller,
1849 EFI_OPEN_PROTOCOL_BY_DRIVER
1850 );
1851
1852 if (EFI_ERROR (Status)) {
1853 return Status;
1854 }
1855
1856 PciAttributesSaved = FALSE;
1857 //
1858 // Save original PCI attributes
1859 //
1860 Status = PciIo->Attributes (
1861 PciIo,
1862 EfiPciIoAttributeOperationGet,
1863 0,
1864 &OriginalPciAttributes
1865 );
1866
1867 if (EFI_ERROR (Status)) {
1868 goto CLOSE_PCIIO;
1869 }
1870 PciAttributesSaved = TRUE;
1871
1872 Status = PciIo->Attributes (
1873 PciIo,
1874 EfiPciIoAttributeOperationSupported,
1875 0,
1876 &Supports
1877 );
1878 if (!EFI_ERROR (Status)) {
1879 Supports &= EFI_PCI_DEVICE_ENABLE;
1880 Status = PciIo->Attributes (
1881 PciIo,
1882 EfiPciIoAttributeOperationEnable,
1883 Supports,
1884 NULL
1885 );
1886 }
1887
1888 if (EFI_ERROR (Status)) {
1889 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to enable controller\n"));
1890 goto CLOSE_PCIIO;
1891 }
1892
1893 //
1894 // Create then install USB2_HC_PROTOCOL
1895 //
1896 Xhc = XhcCreateUsbHc (PciIo, OriginalPciAttributes);
1897
1898 if (Xhc == NULL) {
1899 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to create USB2_HC\n"));
1900 return EFI_OUT_OF_RESOURCES;
1901 }
1902
1903 XhcSetBiosOwnership (Xhc);
1904
1905 XhcResetHC (Xhc, XHC_RESET_TIMEOUT);
1906 ASSERT (XhcIsHalt (Xhc));
1907
1908 //
1909 // After Chip Hardware Reset wait until the Controller Not Ready (CNR) flag
1910 // in the USBSTS is '0' before writing any xHC Operational or Runtime registers.
1911 //
1912 ASSERT (!(XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_CNR)));
1913
1914 //
1915 // Initialize the schedule
1916 //
1917 XhcInitSched (Xhc);
1918
1919 //
1920 // Start the Host Controller
1921 //
1922 XhcRunHC(Xhc, XHC_GENERIC_TIMEOUT);
1923
1924 //
1925 // Start the asynchronous interrupt monitor
1926 //
1927 Status = gBS->SetTimer (Xhc->PollTimer, TimerPeriodic, XHC_ASYNC_TIMER_INTERVAL);
1928 if (EFI_ERROR (Status)) {
1929 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to start async interrupt monitor\n"));
1930 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
1931 goto FREE_POOL;
1932 }
1933
1934 //
1935 // Create event to stop the HC when exit boot service.
1936 //
1937 Status = gBS->CreateEventEx (
1938 EVT_NOTIFY_SIGNAL,
1939 TPL_NOTIFY,
1940 XhcExitBootService,
1941 Xhc,
1942 &gEfiEventExitBootServicesGuid,
1943 &Xhc->ExitBootServiceEvent
1944 );
1945 if (EFI_ERROR (Status)) {
1946 goto FREE_POOL;
1947 }
1948
1949 //
1950 // Install the component name protocol, don't fail the start
1951 // because of something for display.
1952 //
1953 AddUnicodeString2 (
1954 "eng",
1955 gXhciComponentName.SupportedLanguages,
1956 &Xhc->ControllerNameTable,
1957 L"eXtensible Host Controller (USB 3.0)",
1958 TRUE
1959 );
1960 AddUnicodeString2 (
1961 "en",
1962 gXhciComponentName2.SupportedLanguages,
1963 &Xhc->ControllerNameTable,
1964 L"eXtensible Host Controller (USB 3.0)",
1965 FALSE
1966 );
1967
1968 Status = gBS->InstallProtocolInterface (
1969 &Controller,
1970 &gEfiUsb2HcProtocolGuid,
1971 EFI_NATIVE_INTERFACE,
1972 &Xhc->Usb2Hc
1973 );
1974 if (EFI_ERROR (Status)) {
1975 DEBUG ((EFI_D_ERROR, "XhcDriverBindingStart: failed to install USB2_HC Protocol\n"));
1976 goto FREE_POOL;
1977 }
1978
1979 DEBUG ((EFI_D_INFO, "XhcDriverBindingStart: XHCI started for controller @ %x\n", Controller));
1980 return EFI_SUCCESS;
1981
1982 FREE_POOL:
1983 gBS->CloseEvent (Xhc->PollTimer);
1984 XhcFreeSched (Xhc);
1985 FreePool (Xhc);
1986
1987 CLOSE_PCIIO:
1988 if (PciAttributesSaved) {
1989 //
1990 // Restore original PCI attributes
1991 //
1992 PciIo->Attributes (
1993 PciIo,
1994 EfiPciIoAttributeOperationSet,
1995 OriginalPciAttributes,
1996 NULL
1997 );
1998 }
1999
2000 gBS->CloseProtocol (
2001 Controller,
2002 &gEfiPciIoProtocolGuid,
2003 This->DriverBindingHandle,
2004 Controller
2005 );
2006
2007 return Status;
2008 }
2009
2010
2011 /**
2012 Stop this driver on ControllerHandle. Support stoping any child handles
2013 created by this driver.
2014
2015 @param This Protocol instance pointer.
2016 @param Controller Handle of device to stop driver on.
2017 @param NumberOfChildren Number of Children in the ChildHandleBuffer.
2018 @param ChildHandleBuffer List of handles for the children we need to stop.
2019
2020 @return EFI_SUCCESS Success.
2021 @return EFI_DEVICE_ERROR Fail.
2022
2023 **/
2024 EFI_STATUS
2025 EFIAPI
2026 XhcDriverBindingStop (
2027 IN EFI_DRIVER_BINDING_PROTOCOL *This,
2028 IN EFI_HANDLE Controller,
2029 IN UINTN NumberOfChildren,
2030 IN EFI_HANDLE *ChildHandleBuffer
2031 )
2032 {
2033 EFI_STATUS Status;
2034 EFI_USB2_HC_PROTOCOL *Usb2Hc;
2035 EFI_PCI_IO_PROTOCOL *PciIo;
2036 USB_XHCI_INSTANCE *Xhc;
2037 UINT8 Index;
2038
2039 //
2040 // Test whether the Controller handler passed in is a valid
2041 // Usb controller handle that should be supported, if not,
2042 // return the error status directly
2043 //
2044 Status = gBS->OpenProtocol (
2045 Controller,
2046 &gEfiUsb2HcProtocolGuid,
2047 (VOID **) &Usb2Hc,
2048 This->DriverBindingHandle,
2049 Controller,
2050 EFI_OPEN_PROTOCOL_GET_PROTOCOL
2051 );
2052
2053 if (EFI_ERROR (Status)) {
2054 return Status;
2055 }
2056
2057 Xhc = XHC_FROM_THIS (Usb2Hc);
2058 PciIo = Xhc->PciIo;
2059
2060 //
2061 // Stop AsyncRequest Polling timer then stop the XHCI driver
2062 // and uninstall the XHCI protocl.
2063 //
2064 gBS->SetTimer (Xhc->PollTimer, TimerCancel, 0);
2065
2066 //
2067 // Disable the device slots occupied by these devices on its downstream ports.
2068 // Entry 0 is reserved.
2069 //
2070 for (Index = 0; Index < 255; Index++) {
2071 if (!Xhc->UsbDevContext[Index + 1].Enabled ||
2072 (Xhc->UsbDevContext[Index + 1].SlotId == 0)) {
2073 continue;
2074 }
2075
2076 XhcDisableSlotCmd (Xhc, Xhc->UsbDevContext[Index + 1].SlotId);
2077 }
2078
2079 XhcHaltHC (Xhc, XHC_GENERIC_TIMEOUT);
2080 XhcClearBiosOwnership (Xhc);
2081
2082 Status = gBS->UninstallProtocolInterface (
2083 Controller,
2084 &gEfiUsb2HcProtocolGuid,
2085 Usb2Hc
2086 );
2087
2088 if (EFI_ERROR (Status)) {
2089 return Status;
2090 }
2091
2092 if (Xhc->PollTimer != NULL) {
2093 gBS->CloseEvent (Xhc->PollTimer);
2094 }
2095
2096 if (Xhc->ExitBootServiceEvent != NULL) {
2097 gBS->CloseEvent (Xhc->ExitBootServiceEvent);
2098 }
2099
2100 XhciDelAllAsyncIntTransfers (Xhc);
2101 XhcFreeSched (Xhc);
2102
2103 if (Xhc->ControllerNameTable) {
2104 FreeUnicodeStringTable (Xhc->ControllerNameTable);
2105 }
2106
2107 //
2108 // Restore original PCI attributes
2109 //
2110 PciIo->Attributes (
2111 PciIo,
2112 EfiPciIoAttributeOperationSet,
2113 Xhc->OriginalPciAttributes,
2114 NULL
2115 );
2116
2117 gBS->CloseProtocol (
2118 Controller,
2119 &gEfiPciIoProtocolGuid,
2120 This->DriverBindingHandle,
2121 Controller
2122 );
2123
2124 FreePool (Xhc);
2125
2126 return EFI_SUCCESS;
2127 }
2128