3 This file contains the definition for XHCI host controller schedule routines.
5 Copyright (c) 2011 - 2018, Intel Corporation. All rights reserved.<BR>
6 SPDX-License-Identifier: BSD-2-Clause-Patent
10 #ifndef _EFI_XHCI_SCHED_H_
11 #define _EFI_XHCI_SCHED_H_
13 #define XHC_URB_SIG SIGNATURE_32 ('U', 'S', 'B', 'R')
16 // Transfer types, used in URB to identify the transfer type
18 #define XHC_CTRL_TRANSFER 0x01
19 #define XHC_BULK_TRANSFER 0x02
20 #define XHC_INT_TRANSFER_SYNC 0x04
21 #define XHC_INT_TRANSFER_ASYNC 0x08
22 #define XHC_INT_ONLY_TRANSFER_ASYNC 0x10
27 #define TRB_TYPE_NORMAL 1
28 #define TRB_TYPE_SETUP_STAGE 2
29 #define TRB_TYPE_DATA_STAGE 3
30 #define TRB_TYPE_STATUS_STAGE 4
31 #define TRB_TYPE_ISOCH 5
32 #define TRB_TYPE_LINK 6
33 #define TRB_TYPE_EVENT_DATA 7
34 #define TRB_TYPE_NO_OP 8
35 #define TRB_TYPE_EN_SLOT 9
36 #define TRB_TYPE_DIS_SLOT 10
37 #define TRB_TYPE_ADDRESS_DEV 11
38 #define TRB_TYPE_CON_ENDPOINT 12
39 #define TRB_TYPE_EVALU_CONTXT 13
40 #define TRB_TYPE_RESET_ENDPOINT 14
41 #define TRB_TYPE_STOP_ENDPOINT 15
42 #define TRB_TYPE_SET_TR_DEQUE 16
43 #define TRB_TYPE_RESET_DEV 17
44 #define TRB_TYPE_GET_PORT_BANW 21
45 #define TRB_TYPE_FORCE_HEADER 22
46 #define TRB_TYPE_NO_OP_COMMAND 23
47 #define TRB_TYPE_TRANS_EVENT 32
48 #define TRB_TYPE_COMMAND_COMPLT_EVENT 33
49 #define TRB_TYPE_PORT_STATUS_CHANGE_EVENT 34
50 #define TRB_TYPE_HOST_CONTROLLER_EVENT 37
51 #define TRB_TYPE_DEVICE_NOTIFI_EVENT 38
52 #define TRB_TYPE_MFINDEX_WRAP_EVENT 39
55 // Endpoint Type (EP Type).
57 #define ED_NOT_VALID 0
58 #define ED_ISOCH_OUT 1
60 #define ED_INTERRUPT_OUT 3
61 #define ED_CONTROL_BIDIR 4
64 #define ED_INTERRUPT_IN 7
67 // 6.4.5 TRB Completion Codes
69 #define TRB_COMPLETION_INVALID 0
70 #define TRB_COMPLETION_SUCCESS 1
71 #define TRB_COMPLETION_DATA_BUFFER_ERROR 2
72 #define TRB_COMPLETION_BABBLE_ERROR 3
73 #define TRB_COMPLETION_USB_TRANSACTION_ERROR 4
74 #define TRB_COMPLETION_TRB_ERROR 5
75 #define TRB_COMPLETION_STALL_ERROR 6
76 #define TRB_COMPLETION_SHORT_PACKET 13
77 #define TRB_COMPLETION_STOPPED 26
78 #define TRB_COMPLETION_STOPPED_LENGTH_INVALID 27
81 // The topology string used to present usb device location
83 typedef struct _USB_DEV_TOPOLOGY
{
85 // The tier concatenation of down stream port.
87 UINT32 RouteString
:20;
89 // The root port number of the chain.
93 // The Tier the device reside.
99 // USB Device's RouteChart
101 typedef union _USB_DEV_ROUTE
{
103 USB_DEV_TOPOLOGY Route
;
107 // Endpoint address and its capabilities
109 typedef struct _USB_ENDPOINT
{
111 // Store logical device address assigned by UsbBus
112 // It's because some XHCI host controllers may assign the same physcial device
113 // address for those devices inserted at different root port.
118 EFI_USB_DATA_DIRECTION Direction
;
127 typedef struct _TRB_TEMPLATE
{
140 typedef struct _TRANSFER_RING
{
143 TRB_TEMPLATE
*RingEnqueue
;
144 TRB_TEMPLATE
*RingDequeue
;
148 typedef struct _EVENT_RING
{
152 TRB_TEMPLATE
*EventRingEnqueue
;
153 TRB_TEMPLATE
*EventRingDequeue
;
158 // URB (Usb Request Block) contains information for all kinds of
161 typedef struct _URB
{
165 // Usb Device URB related information
168 EFI_USB_DEVICE_REQUEST
*Request
;
173 EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
;
180 // completed data length
184 // Command/Tranfer Ring info
187 TRB_TEMPLATE
*TrbStart
;
188 TRB_TEMPLATE
*TrbEnd
;
194 TRB_TEMPLATE
*EvtTrb
;
198 // 6.5 Event Ring Segment Table
199 // The Event Ring Segment Table is used to define multi-segment Event Rings and to enable runtime
200 // expansion and shrinking of the Event Ring. The location of the Event Ring Segment Table is defined by the
201 // Event Ring Segment Table Base Address Register (5.5.2.3.2). The size of the Event Ring Segment Table
202 // is defined by the Event Ring Segment Table Base Size Register (5.5.2.3.1).
204 typedef struct _EVENT_RING_SEG_TABLE_ENTRY
{
207 UINT32 RingTrbSize
:16;
210 } EVENT_RING_SEG_TABLE_ENTRY
;
213 // 6.4.1.1 Normal TRB
214 // A Normal TRB is used in several ways; exclusively on Bulk and Interrupt Transfer Rings for normal and
215 // Scatter/Gather operations, to define additional data buffers for Scatter/Gather operations on Isoch Transfer
216 // Rings, and to define the Data stage information for Control Transfer Rings.
218 typedef struct _TRANSFER_TRB_NORMAL
{
238 } TRANSFER_TRB_NORMAL
;
241 // 6.4.1.2.1 Setup Stage TRB
242 // A Setup Stage TRB is created by system software to initiate a USB Setup packet on a control endpoint.
244 typedef struct _TRANSFER_TRB_CONTROL_SETUP
{
245 UINT32 bmRequestType
:8;
264 } TRANSFER_TRB_CONTROL_SETUP
;
267 // 6.4.1.2.2 Data Stage TRB
268 // A Data Stage TRB is used generate the Data stage transaction of a USB Control transfer.
270 typedef struct _TRANSFER_TRB_CONTROL_DATA
{
290 } TRANSFER_TRB_CONTROL_DATA
;
293 // 6.4.1.2.2 Data Stage TRB
294 // A Data Stage TRB is used generate the Data stage transaction of a USB Control transfer.
296 typedef struct _TRANSFER_TRB_CONTROL_STATUS
{
312 } TRANSFER_TRB_CONTROL_STATUS
;
315 // 6.4.2.1 Transfer Event TRB
316 // A Transfer Event provides the completion status associated with a Transfer TRB. Refer to section 4.11.3.1
317 // for more information on the use and operation of Transfer Events.
319 typedef struct _EVT_TRB_TRANSFER
{
325 UINT32 Completecode
:8;
338 // 6.4.2.2 Command Completion Event TRB
339 // A Command Completion Event TRB shall be generated by the xHC when a command completes on the
340 // Command Ring. Refer to section 4.11.4 for more information on the use of Command Completion Events.
342 typedef struct _EVT_TRB_COMMAND_COMPLETION
{
348 UINT32 Completecode
:8;
355 } EVT_TRB_COMMAND_COMPLETION
;
358 TRB_TEMPLATE TrbTemplate
;
359 TRANSFER_TRB_NORMAL TrbNormal
;
360 TRANSFER_TRB_CONTROL_SETUP TrbCtrSetup
;
361 TRANSFER_TRB_CONTROL_DATA TrbCtrData
;
362 TRANSFER_TRB_CONTROL_STATUS TrbCtrStatus
;
366 // 6.4.3.1 No Op Command TRB
367 // The No Op Command TRB provides a simple means for verifying the operation of the Command Ring
368 // mechanisms offered by the xHCI.
370 typedef struct _CMD_TRB_NO_OP
{
382 // 6.4.3.2 Enable Slot Command TRB
383 // The Enable Slot Command TRB causes the xHC to select an available Device Slot and return the ID of the
384 // selected slot to the host in a Command Completion Event.
386 typedef struct _CMD_TRB_ENABLE_SLOT
{
395 } CMD_TRB_ENABLE_SLOT
;
398 // 6.4.3.3 Disable Slot Command TRB
399 // The Disable Slot Command TRB releases any bandwidth assigned to the disabled slot and frees any
400 // internal xHC resources assigned to the slot.
402 typedef struct _CMD_TRB_DISABLE_SLOT
{
412 } CMD_TRB_DISABLE_SLOT
;
415 // 6.4.3.4 Address Device Command TRB
416 // The Address Device Command TRB transitions the selected Device Context from the Default to the
417 // Addressed state and causes the xHC to select an address for the USB device in the Default State and
418 // issue a SET_ADDRESS request to the USB device.
420 typedef struct _CMD_TRB_ADDRESS_DEVICE
{
433 } CMD_TRB_ADDRESS_DEVICE
;
436 // 6.4.3.5 Configure Endpoint Command TRB
437 // The Configure Endpoint Command TRB evaluates the bandwidth and resource requirements of the
438 // endpoints selected by the command.
440 typedef struct _CMD_TRB_CONFIG_ENDPOINT
{
453 } CMD_TRB_CONFIG_ENDPOINT
;
456 // 6.4.3.6 Evaluate Context Command TRB
457 // The Evaluate Context Command TRB is used by system software to inform the xHC that the selected
458 // Context data structures in the Device Context have been modified by system software and that the xHC
459 // shall evaluate any changes
461 typedef struct _CMD_TRB_EVALUATE_CONTEXT
{
473 } CMD_TRB_EVALUATE_CONTEXT
;
476 // 6.4.3.7 Reset Endpoint Command TRB
477 // The Reset Endpoint Command TRB is used by system software to reset a specified Transfer Ring
479 typedef struct _CMD_TRB_RESET_ENDPOINT
{
491 } CMD_TRB_RESET_ENDPOINT
;
494 // 6.4.3.8 Stop Endpoint Command TRB
495 // The Stop Endpoint Command TRB command allows software to stop the xHC execution of the TDs on a
496 // Transfer Ring and temporarily take ownership of TDs that had previously been passed to the xHC.
498 typedef struct _CMD_TRB_STOP_ENDPOINT
{
510 } CMD_TRB_STOP_ENDPOINT
;
513 // 6.4.3.9 Set TR Dequeue Pointer Command TRB
514 // The Set TR Dequeue Pointer Command TRB is used by system software to modify the TR Dequeue
515 // Pointer and DCS fields of an Endpoint or Stream Context.
517 typedef struct _CMD_SET_TR_DEQ_POINTER
{
531 } CMD_SET_TR_DEQ_POINTER
;
535 // A Link TRB provides support for non-contiguous TRB Rings.
537 typedef struct _LINK_TRB
{
543 UINT32 InterTarget
:10;
556 // 6.2.2 Slot Context
558 typedef struct _SLOT_CONTEXT
{
559 UINT32 RouteString
:20;
564 UINT32 ContextEntries
:5;
566 UINT32 MaxExitLatency
:16;
567 UINT32 RootHubPortNum
:8;
570 UINT32 TTHubSlotId
:8;
574 UINT32 InterTarget
:10;
576 UINT32 DeviceAddress
:8;
586 typedef struct _SLOT_CONTEXT_64
{
587 UINT32 RouteString
:20;
592 UINT32 ContextEntries
:5;
594 UINT32 MaxExitLatency
:16;
595 UINT32 RootHubPortNum
:8;
598 UINT32 TTHubSlotId
:8;
602 UINT32 InterTarget
:10;
604 UINT32 DeviceAddress
:8;
627 // 6.2.3 Endpoint Context
629 typedef struct _ENDPOINT_CONTEXT
{
633 UINT32 MaxPStreams
:5;
643 UINT32 MaxBurstSize
:8;
644 UINT32 MaxPacketSize
:16;
650 UINT32 AverageTRBLength
:16;
651 UINT32 MaxESITPayload
:16;
658 typedef struct _ENDPOINT_CONTEXT_64
{
662 UINT32 MaxPStreams
:5;
672 UINT32 MaxBurstSize
:8;
673 UINT32 MaxPacketSize
:16;
679 UINT32 AverageTRBLength
:16;
680 UINT32 MaxESITPayload
:16;
696 } ENDPOINT_CONTEXT_64
;
700 // 6.2.5.1 Input Control Context
702 typedef struct _INPUT_CONTRL_CONTEXT
{
711 } INPUT_CONTRL_CONTEXT
;
713 typedef struct _INPUT_CONTRL_CONTEXT_64
{
730 } INPUT_CONTRL_CONTEXT_64
;
733 // 6.2.1 Device Context
735 typedef struct _DEVICE_CONTEXT
{
737 ENDPOINT_CONTEXT EP
[31];
740 typedef struct _DEVICE_CONTEXT_64
{
741 SLOT_CONTEXT_64 Slot
;
742 ENDPOINT_CONTEXT_64 EP
[31];
746 // 6.2.5 Input Context
748 typedef struct _INPUT_CONTEXT
{
749 INPUT_CONTRL_CONTEXT InputControlContext
;
751 ENDPOINT_CONTEXT EP
[31];
754 typedef struct _INPUT_CONTEXT_64
{
755 INPUT_CONTRL_CONTEXT_64 InputControlContext
;
756 SLOT_CONTEXT_64 Slot
;
757 ENDPOINT_CONTEXT_64 EP
[31];
762 Initialize the XHCI host controller for schedule.
764 @param Xhc The XHCI Instance to be initialized.
769 IN USB_XHCI_INSTANCE
*Xhc
773 Free the resouce allocated at initializing schedule.
775 @param Xhc The XHCI Instance.
780 IN USB_XHCI_INSTANCE
*Xhc
784 Ring the door bell to notify XHCI there is a transaction to be executed through URB.
786 @param Xhc The XHCI Instance.
787 @param Urb The URB to be rung.
789 @retval EFI_SUCCESS Successfully ring the door bell.
793 RingIntTransferDoorBell (
794 IN USB_XHCI_INSTANCE
*Xhc
,
799 Execute the transfer by polling the URB. This is a synchronous operation.
801 @param Xhc The XHCI Instance.
802 @param CmdTransfer The executed URB is for cmd transfer or not.
803 @param Urb The URB to execute.
804 @param Timeout The time to wait before abort, in millisecond.
806 @return EFI_DEVICE_ERROR The transfer failed due to transfer error.
807 @return EFI_TIMEOUT The transfer failed due to time out.
808 @return EFI_SUCCESS The transfer finished OK.
813 IN USB_XHCI_INSTANCE
*Xhc
,
814 IN BOOLEAN CmdTransfer
,
820 Delete a single asynchronous interrupt transfer for
821 the device and endpoint.
823 @param Xhc The XHCI Instance.
824 @param BusAddr The logical device address assigned by UsbBus driver.
825 @param EpNum The endpoint of the target.
827 @retval EFI_SUCCESS An asynchronous transfer is removed.
828 @retval EFI_NOT_FOUND No transfer for the device is found.
832 XhciDelAsyncIntTransfer (
833 IN USB_XHCI_INSTANCE
*Xhc
,
839 Remove all the asynchronous interrupt transfers.
841 @param Xhc The XHCI Instance.
845 XhciDelAllAsyncIntTransfers (
846 IN USB_XHCI_INSTANCE
*Xhc
850 Insert a single asynchronous interrupt transfer for
851 the device and endpoint.
853 @param Xhc The XHCI Instance
854 @param BusAddr The logical device address assigned by UsbBus driver
855 @param EpAddr Endpoint addrress
856 @param DevSpeed The device speed
857 @param MaxPacket The max packet length of the endpoint
858 @param DataLen The length of data buffer
859 @param Callback The function to call when data is transferred
860 @param Context The context to the callback
862 @return Created URB or NULL
866 XhciInsertAsyncIntTransfer (
867 IN USB_XHCI_INSTANCE
*Xhc
,
873 IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
,
880 @param Xhc The XHCI Instance.
884 XhcSetBiosOwnership (
885 IN USB_XHCI_INSTANCE
*Xhc
891 @param Xhc The XHCI Instance.
895 XhcClearBiosOwnership (
896 IN USB_XHCI_INSTANCE
*Xhc
900 Find out the slot id according to the device's route string.
902 @param Xhc The XHCI Instance.
903 @param RouteString The route string described the device location.
905 @return The slot id used by the device.
910 XhcRouteStringToSlotId (
911 IN USB_XHCI_INSTANCE
*Xhc
,
912 IN USB_DEV_ROUTE RouteString
916 Calculate the device context index by endpoint address and direction.
918 @param EpAddr The target endpoint number.
919 @param Direction The direction of the target endpoint.
921 @return The device context index of endpoint.
931 Ring the door bell to notify XHCI there is a transaction to be executed.
933 @param Xhc The XHCI Instance.
934 @param SlotId The slot id of the target device.
935 @param Dci The device context index of the target slot or endpoint.
937 @retval EFI_SUCCESS Successfully ring the door bell.
943 IN USB_XHCI_INSTANCE
*Xhc
,
949 Interrupt transfer periodic check handler.
951 @param Event Interrupt event.
952 @param Context Pointer to USB_XHCI_INSTANCE.
957 XhcMonitorAsyncRequests (
963 Monitor the port status change. Enable/Disable device slot if there is a device attached/detached.
965 @param Xhc The XHCI Instance.
966 @param ParentRouteChart The route string pointed to the parent device if it exists.
967 @param Port The port to be polled.
968 @param PortState The port state.
970 @retval EFI_SUCCESS Successfully enable/disable device slot according to port state.
971 @retval Others Should not appear.
976 XhcPollPortStatusChange (
977 IN USB_XHCI_INSTANCE
*Xhc
,
978 IN USB_DEV_ROUTE ParentRouteChart
,
980 IN EFI_USB_PORT_STATUS
*PortState
984 Evaluate the slot context for hub device through XHCI's Configure_Endpoint cmd.
986 @param Xhc The XHCI Instance.
987 @param SlotId The slot id to be configured.
988 @param PortNum The total number of downstream port supported by the hub.
989 @param TTT The TT think time of the hub device.
990 @param MTT The multi-TT of the hub device.
992 @retval EFI_SUCCESS Successfully configure the hub device's slot context.
996 XhcConfigHubContext (
997 IN USB_XHCI_INSTANCE
*Xhc
,
1006 Evaluate the slot context for hub device through XHCI's Configure_Endpoint cmd.
1008 @param Xhc The XHCI Instance.
1009 @param SlotId The slot id to be configured.
1010 @param PortNum The total number of downstream port supported by the hub.
1011 @param TTT The TT think time of the hub device.
1012 @param MTT The multi-TT of the hub device.
1014 @retval EFI_SUCCESS Successfully configure the hub device's slot context.
1018 XhcConfigHubContext64 (
1019 IN USB_XHCI_INSTANCE
*Xhc
,
1028 Configure all the device endpoints through XHCI's Configure_Endpoint cmd.
1030 @param Xhc The XHCI Instance.
1031 @param SlotId The slot id to be configured.
1032 @param DeviceSpeed The device's speed.
1033 @param ConfigDesc The pointer to the usb device configuration descriptor.
1035 @retval EFI_SUCCESS Successfully configure all the device endpoints.
1041 IN USB_XHCI_INSTANCE
*Xhc
,
1043 IN UINT8 DeviceSpeed
,
1044 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
1049 Configure all the device endpoints through XHCI's Configure_Endpoint cmd.
1051 @param Xhc The XHCI Instance.
1052 @param SlotId The slot id to be configured.
1053 @param DeviceSpeed The device's speed.
1054 @param ConfigDesc The pointer to the usb device configuration descriptor.
1056 @retval EFI_SUCCESS Successfully configure all the device endpoints.
1062 IN USB_XHCI_INSTANCE
*Xhc
,
1064 IN UINT8 DeviceSpeed
,
1065 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
1069 Set interface through XHCI's Configure_Endpoint cmd.
1071 @param Xhc The XHCI Instance.
1072 @param SlotId The slot id to be configured.
1073 @param DeviceSpeed The device's speed.
1074 @param ConfigDesc The pointer to the usb device configuration descriptor.
1075 @param Request USB device request to send.
1077 @retval EFI_SUCCESS Successfully set interface.
1083 IN USB_XHCI_INSTANCE
*Xhc
,
1085 IN UINT8 DeviceSpeed
,
1086 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
,
1087 IN EFI_USB_DEVICE_REQUEST
*Request
1091 Set interface through XHCI's Configure_Endpoint cmd.
1093 @param Xhc The XHCI Instance.
1094 @param SlotId The slot id to be configured.
1095 @param DeviceSpeed The device's speed.
1096 @param ConfigDesc The pointer to the usb device configuration descriptor.
1097 @param Request USB device request to send.
1099 @retval EFI_SUCCESS Successfully set interface.
1105 IN USB_XHCI_INSTANCE
*Xhc
,
1107 IN UINT8 DeviceSpeed
,
1108 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
,
1109 IN EFI_USB_DEVICE_REQUEST
*Request
1113 Find out the actual device address according to the requested device address from UsbBus.
1115 @param Xhc The XHCI Instance.
1116 @param BusDevAddr The requested device address by UsbBus upper driver.
1118 @return The actual device address assigned to the device.
1123 XhcBusDevAddrToSlotId (
1124 IN USB_XHCI_INSTANCE
*Xhc
,
1129 Assign and initialize the device slot for a new device.
1131 @param Xhc The XHCI Instance.
1132 @param ParentRouteChart The route string pointed to the parent device.
1133 @param ParentPort The port at which the device is located.
1134 @param RouteChart The route string pointed to the device.
1135 @param DeviceSpeed The device speed.
1137 @retval EFI_SUCCESS Successfully assign a slot to the device and assign an address to it.
1142 XhcInitializeDeviceSlot (
1143 IN USB_XHCI_INSTANCE
*Xhc
,
1144 IN USB_DEV_ROUTE ParentRouteChart
,
1145 IN UINT16 ParentPort
,
1146 IN USB_DEV_ROUTE RouteChart
,
1147 IN UINT8 DeviceSpeed
1151 Assign and initialize the device slot for a new device.
1153 @param Xhc The XHCI Instance.
1154 @param ParentRouteChart The route string pointed to the parent device.
1155 @param ParentPort The port at which the device is located.
1156 @param RouteChart The route string pointed to the device.
1157 @param DeviceSpeed The device speed.
1159 @retval EFI_SUCCESS Successfully assign a slot to the device and assign an address to it.
1164 XhcInitializeDeviceSlot64 (
1165 IN USB_XHCI_INSTANCE
*Xhc
,
1166 IN USB_DEV_ROUTE ParentRouteChart
,
1167 IN UINT16 ParentPort
,
1168 IN USB_DEV_ROUTE RouteChart
,
1169 IN UINT8 DeviceSpeed
1173 Evaluate the endpoint 0 context through XHCI's Evaluate_Context cmd.
1175 @param Xhc The XHCI Instance.
1176 @param SlotId The slot id to be evaluated.
1177 @param MaxPacketSize The max packet size supported by the device control transfer.
1179 @retval EFI_SUCCESS Successfully evaluate the device endpoint 0.
1184 XhcEvaluateContext (
1185 IN USB_XHCI_INSTANCE
*Xhc
,
1187 IN UINT32 MaxPacketSize
1192 Evaluate the endpoint 0 context through XHCI's Evaluate_Context cmd.
1194 @param Xhc The XHCI Instance.
1195 @param SlotId The slot id to be evaluated.
1196 @param MaxPacketSize The max packet size supported by the device control transfer.
1198 @retval EFI_SUCCESS Successfully evaluate the device endpoint 0.
1203 XhcEvaluateContext64 (
1204 IN USB_XHCI_INSTANCE
*Xhc
,
1206 IN UINT32 MaxPacketSize
1211 Disable the specified device slot.
1213 @param Xhc The XHCI Instance.
1214 @param SlotId The slot id to be disabled.
1216 @retval EFI_SUCCESS Successfully disable the device slot.
1222 IN USB_XHCI_INSTANCE
*Xhc
,
1228 Disable the specified device slot.
1230 @param Xhc The XHCI Instance.
1231 @param SlotId The slot id to be disabled.
1233 @retval EFI_SUCCESS Successfully disable the device slot.
1238 XhcDisableSlotCmd64 (
1239 IN USB_XHCI_INSTANCE
*Xhc
,
1245 Synchronize the specified transfer ring to update the enqueue and dequeue pointer.
1247 @param Xhc The XHCI Instance.
1248 @param TrsRing The transfer ring to sync.
1250 @retval EFI_SUCCESS The transfer ring is synchronized successfully.
1256 IN USB_XHCI_INSTANCE
*Xhc
,
1257 TRANSFER_RING
*TrsRing
1261 Synchronize the specified event ring to update the enqueue and dequeue pointer.
1263 @param Xhc The XHCI Instance.
1264 @param EvtRing The event ring to sync.
1266 @retval EFI_SUCCESS The event ring is synchronized successfully.
1272 IN USB_XHCI_INSTANCE
*Xhc
,
1277 Check if there is a new generated event.
1279 @param Xhc The XHCI Instance.
1280 @param EvtRing The event ring to check.
1281 @param NewEvtTrb The new event TRB found.
1283 @retval EFI_SUCCESS Found a new event TRB at the event ring.
1284 @retval EFI_NOT_READY The event ring has no new event.
1290 IN USB_XHCI_INSTANCE
*Xhc
,
1291 IN EVENT_RING
*EvtRing
,
1292 OUT TRB_TEMPLATE
**NewEvtTrb
1296 Create XHCI transfer ring.
1298 @param Xhc The XHCI Instance.
1299 @param TrbNum The number of TRB in the ring.
1300 @param TransferRing The created transfer ring.
1304 CreateTransferRing (
1305 IN USB_XHCI_INSTANCE
*Xhc
,
1307 OUT TRANSFER_RING
*TransferRing
1311 Create XHCI event ring.
1313 @param Xhc The XHCI Instance.
1314 @param EventRing The created event ring.
1319 IN USB_XHCI_INSTANCE
*Xhc
,
1320 OUT EVENT_RING
*EventRing
1324 System software shall use a Reset Endpoint Command (section 4.11.4.7) to remove the Halted
1325 condition in the xHC. After the successful completion of the Reset Endpoint Command, the Endpoint
1326 Context is transitioned from the Halted to the Stopped state and the Transfer Ring of the endpoint is
1327 reenabled. The next write to the Doorbell of the Endpoint will transition the Endpoint Context from the
1328 Stopped to the Running state.
1330 @param Xhc The XHCI Instance.
1331 @param Urb The urb which makes the endpoint halted.
1333 @retval EFI_SUCCESS The recovery is successful.
1334 @retval Others Failed to recovery halted endpoint.
1339 XhcRecoverHaltedEndpoint (
1340 IN USB_XHCI_INSTANCE
*Xhc
,
1345 System software shall use a Stop Endpoint Command (section 4.6.9) and the Set TR Dequeue Pointer
1346 Command (section 4.6.10) to remove the timed-out TDs from the xHC transfer ring. The next write to
1347 the Doorbell of the Endpoint will transition the Endpoint Context from the Stopped to the Running
1350 @param Xhc The XHCI Instance.
1351 @param Urb The urb which doesn't get completed in a specified timeout range.
1353 @retval EFI_SUCCESS The dequeuing of the TDs is successful.
1354 @retval Others Failed to stop the endpoint and dequeue the TDs.
1359 XhcDequeueTrbFromEndpoint (
1360 IN USB_XHCI_INSTANCE
*Xhc
,
1365 Stop endpoint through XHCI's Stop_Endpoint cmd.
1367 @param Xhc The XHCI Instance.
1368 @param SlotId The slot id to be configured.
1369 @param Dci The device context index of endpoint.
1370 @param PendingUrb The pending URB to check completion status when stopping the end point.
1372 @retval EFI_SUCCESS Stop endpoint successfully.
1373 @retval Others Failed to stop endpoint.
1379 IN USB_XHCI_INSTANCE
*Xhc
,
1382 IN URB
*PendingUrb OPTIONAL
1386 Reset endpoint through XHCI's Reset_Endpoint cmd.
1388 @param Xhc The XHCI Instance.
1389 @param SlotId The slot id to be configured.
1390 @param Dci The device context index of endpoint.
1392 @retval EFI_SUCCESS Reset endpoint successfully.
1393 @retval Others Failed to reset endpoint.
1399 IN USB_XHCI_INSTANCE
*Xhc
,
1405 Set transfer ring dequeue pointer through XHCI's Set_Tr_Dequeue_Pointer cmd.
1407 @param Xhc The XHCI Instance.
1408 @param SlotId The slot id to be configured.
1409 @param Dci The device context index of endpoint.
1410 @param Urb The dequeue pointer of the transfer ring specified
1411 by the urb to be updated.
1413 @retval EFI_SUCCESS Set transfer ring dequeue pointer succeeds.
1414 @retval Others Failed to set transfer ring dequeue pointer.
1419 XhcSetTrDequeuePointer (
1420 IN USB_XHCI_INSTANCE
*Xhc
,
1427 Create a new URB for a new transaction.
1429 @param Xhc The XHCI Instance
1430 @param DevAddr The device address
1431 @param EpAddr Endpoint addrress
1432 @param DevSpeed The device speed
1433 @param MaxPacket The max packet length of the endpoint
1434 @param Type The transaction type
1435 @param Request The standard USB request for control transfer
1436 @param Data The user data to transfer
1437 @param DataLen The length of data buffer
1438 @param Callback The function to call when data is transferred
1439 @param Context The context to the callback
1441 @return Created URB or NULL
1446 IN USB_XHCI_INSTANCE
*Xhc
,
1452 IN EFI_USB_DEVICE_REQUEST
*Request
,
1455 IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
,
1460 Free an allocated URB.
1462 @param Xhc The XHCI device.
1463 @param Urb The URB to free.
1468 IN USB_XHCI_INSTANCE
*Xhc
,
1473 Create a transfer TRB.
1475 @param Xhc The XHCI Instance
1476 @param Urb The urb used to construct the transfer TRB.
1478 @return Created TRB or NULL
1482 XhcCreateTransferTrb (
1483 IN USB_XHCI_INSTANCE
*Xhc
,