3 This file contains the definition for XHCI host controller schedule routines.
5 Copyright (c) 2011 - 2013, Intel Corporation. All rights reserved.<BR>
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
16 #ifndef _EFI_XHCI_SCHED_H_
17 #define _EFI_XHCI_SCHED_H_
19 #define XHC_URB_SIG SIGNATURE_32 ('U', 'S', 'B', 'R')
22 // Transfer types, used in URB to identify the transfer type
24 #define XHC_CTRL_TRANSFER 0x01
25 #define XHC_BULK_TRANSFER 0x02
26 #define XHC_INT_TRANSFER_SYNC 0x04
27 #define XHC_INT_TRANSFER_ASYNC 0x08
28 #define XHC_INT_ONLY_TRANSFER_ASYNC 0x10
33 #define TRB_TYPE_NORMAL 1
34 #define TRB_TYPE_SETUP_STAGE 2
35 #define TRB_TYPE_DATA_STAGE 3
36 #define TRB_TYPE_STATUS_STAGE 4
37 #define TRB_TYPE_ISOCH 5
38 #define TRB_TYPE_LINK 6
39 #define TRB_TYPE_EVENT_DATA 7
40 #define TRB_TYPE_NO_OP 8
41 #define TRB_TYPE_EN_SLOT 9
42 #define TRB_TYPE_DIS_SLOT 10
43 #define TRB_TYPE_ADDRESS_DEV 11
44 #define TRB_TYPE_CON_ENDPOINT 12
45 #define TRB_TYPE_EVALU_CONTXT 13
46 #define TRB_TYPE_RESET_ENDPOINT 14
47 #define TRB_TYPE_STOP_ENDPOINT 15
48 #define TRB_TYPE_SET_TR_DEQUE 16
49 #define TRB_TYPE_RESET_DEV 17
50 #define TRB_TYPE_GET_PORT_BANW 21
51 #define TRB_TYPE_FORCE_HEADER 22
52 #define TRB_TYPE_NO_OP_COMMAND 23
53 #define TRB_TYPE_TRANS_EVENT 32
54 #define TRB_TYPE_COMMAND_COMPLT_EVENT 33
55 #define TRB_TYPE_PORT_STATUS_CHANGE_EVENT 34
56 #define TRB_TYPE_HOST_CONTROLLER_EVENT 37
57 #define TRB_TYPE_DEVICE_NOTIFI_EVENT 38
58 #define TRB_TYPE_MFINDEX_WRAP_EVENT 39
61 // Endpoint Type (EP Type).
63 #define ED_NOT_VALID 0
64 #define ED_ISOCH_OUT 1
66 #define ED_INTERRUPT_OUT 3
67 #define ED_CONTROL_BIDIR 4
70 #define ED_INTERRUPT_IN 7
73 // 6.4.5 TRB Completion Codes
75 #define TRB_COMPLETION_INVALID 0
76 #define TRB_COMPLETION_SUCCESS 1
77 #define TRB_COMPLETION_DATA_BUFFER_ERROR 2
78 #define TRB_COMPLETION_BABBLE_ERROR 3
79 #define TRB_COMPLETION_USB_TRANSACTION_ERROR 4
80 #define TRB_COMPLETION_TRB_ERROR 5
81 #define TRB_COMPLETION_STALL_ERROR 6
82 #define TRB_COMPLETION_SHORT_PACKET 13
85 // The topology string used to present usb device location
87 typedef struct _USB_DEV_TOPOLOGY
{
89 // The tier concatenation of down stream port.
91 UINT32 RouteString
:20;
93 // The root port number of the chain.
97 // The Tier the device reside.
103 // USB Device's RouteChart
105 typedef union _USB_DEV_ROUTE
{
107 USB_DEV_TOPOLOGY Route
;
111 // Endpoint address and its capabilities
113 typedef struct _USB_ENDPOINT
{
115 // Store logical device address assigned by UsbBus
116 // It's because some XHCI host controllers may assign the same physcial device
117 // address for those devices inserted at different root port.
122 EFI_USB_DATA_DIRECTION Direction
;
131 typedef struct _TRB_TEMPLATE
{
144 typedef struct _TRANSFER_RING
{
147 TRB_TEMPLATE
*RingEnqueue
;
148 TRB_TEMPLATE
*RingDequeue
;
152 typedef struct _EVENT_RING
{
156 TRB_TEMPLATE
*EventRingEnqueue
;
157 TRB_TEMPLATE
*EventRingDequeue
;
162 // URB (Usb Request Block) contains information for all kinds of
165 typedef struct _URB
{
169 // Usb Device URB related information
172 EFI_USB_DEVICE_REQUEST
*Request
;
177 EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
;
184 // completed data length
188 // Command/Tranfer Ring info
191 TRB_TEMPLATE
*TrbStart
;
192 TRB_TEMPLATE
*TrbEnd
;
198 TRB_TEMPLATE
*EvtTrb
;
202 // 6.5 Event Ring Segment Table
203 // The Event Ring Segment Table is used to define multi-segment Event Rings and to enable runtime
204 // expansion and shrinking of the Event Ring. The location of the Event Ring Segment Table is defined by the
205 // Event Ring Segment Table Base Address Register (5.5.2.3.2). The size of the Event Ring Segment Table
206 // is defined by the Event Ring Segment Table Base Size Register (5.5.2.3.1).
208 typedef struct _EVENT_RING_SEG_TABLE_ENTRY
{
211 UINT32 RingTrbSize
:16;
214 } EVENT_RING_SEG_TABLE_ENTRY
;
217 // 6.4.1.1 Normal TRB
218 // A Normal TRB is used in several ways; exclusively on Bulk and Interrupt Transfer Rings for normal and
219 // Scatter/Gather operations, to define additional data buffers for Scatter/Gather operations on Isoch Transfer
220 // Rings, and to define the Data stage information for Control Transfer Rings.
222 typedef struct _TRANSFER_TRB_NORMAL
{
242 } TRANSFER_TRB_NORMAL
;
245 // 6.4.1.2.1 Setup Stage TRB
246 // A Setup Stage TRB is created by system software to initiate a USB Setup packet on a control endpoint.
248 typedef struct _TRANSFER_TRB_CONTROL_SETUP
{
249 UINT32 bmRequestType
:8;
268 } TRANSFER_TRB_CONTROL_SETUP
;
271 // 6.4.1.2.2 Data Stage TRB
272 // A Data Stage TRB is used generate the Data stage transaction of a USB Control transfer.
274 typedef struct _TRANSFER_TRB_CONTROL_DATA
{
294 } TRANSFER_TRB_CONTROL_DATA
;
297 // 6.4.1.2.2 Data Stage TRB
298 // A Data Stage TRB is used generate the Data stage transaction of a USB Control transfer.
300 typedef struct _TRANSFER_TRB_CONTROL_STATUS
{
316 } TRANSFER_TRB_CONTROL_STATUS
;
319 // 6.4.2.1 Transfer Event TRB
320 // A Transfer Event provides the completion status associated with a Transfer TRB. Refer to section 4.11.3.1
321 // for more information on the use and operation of Transfer Events.
323 typedef struct _EVT_TRB_TRANSFER
{
329 UINT32 Completecode
:8;
342 // 6.4.2.2 Command Completion Event TRB
343 // A Command Completion Event TRB shall be generated by the xHC when a command completes on the
344 // Command Ring. Refer to section 4.11.4 for more information on the use of Command Completion Events.
346 typedef struct _EVT_TRB_COMMAND_COMPLETION
{
352 UINT32 Completecode
:8;
359 } EVT_TRB_COMMAND_COMPLETION
;
362 TRB_TEMPLATE TrbTemplate
;
363 TRANSFER_TRB_NORMAL TrbNormal
;
364 TRANSFER_TRB_CONTROL_SETUP TrbCtrSetup
;
365 TRANSFER_TRB_CONTROL_DATA TrbCtrData
;
366 TRANSFER_TRB_CONTROL_STATUS TrbCtrStatus
;
370 // 6.4.3.1 No Op Command TRB
371 // The No Op Command TRB provides a simple means for verifying the operation of the Command Ring
372 // mechanisms offered by the xHCI.
374 typedef struct _CMD_TRB_NO_OP
{
386 // 6.4.3.2 Enable Slot Command TRB
387 // The Enable Slot Command TRB causes the xHC to select an available Device Slot and return the ID of the
388 // selected slot to the host in a Command Completion Event.
390 typedef struct _CMD_TRB_ENABLE_SLOT
{
399 } CMD_TRB_ENABLE_SLOT
;
402 // 6.4.3.3 Disable Slot Command TRB
403 // The Disable Slot Command TRB releases any bandwidth assigned to the disabled slot and frees any
404 // internal xHC resources assigned to the slot.
406 typedef struct _CMD_TRB_DISABLE_SLOT
{
416 } CMD_TRB_DISABLE_SLOT
;
419 // 6.4.3.4 Address Device Command TRB
420 // The Address Device Command TRB transitions the selected Device Context from the Default to the
421 // Addressed state and causes the xHC to select an address for the USB device in the Default State and
422 // issue a SET_ADDRESS request to the USB device.
424 typedef struct _CMD_TRB_ADDRESS_DEVICE
{
437 } CMD_TRB_ADDRESS_DEVICE
;
440 // 6.4.3.5 Configure Endpoint Command TRB
441 // The Configure Endpoint Command TRB evaluates the bandwidth and resource requirements of the
442 // endpoints selected by the command.
444 typedef struct _CMD_TRB_CONFIG_ENDPOINT
{
457 } CMD_TRB_CONFIG_ENDPOINT
;
460 // 6.4.3.6 Evaluate Context Command TRB
461 // The Evaluate Context Command TRB is used by system software to inform the xHC that the selected
462 // Context data structures in the Device Context have been modified by system software and that the xHC
463 // shall evaluate any changes
465 typedef struct _CMD_TRB_EVALUATE_CONTEXT
{
477 } CMD_TRB_EVALUATE_CONTEXT
;
480 // 6.4.3.7 Reset Endpoint Command TRB
481 // The Reset Endpoint Command TRB is used by system software to reset a specified Transfer Ring
483 typedef struct _CMD_TRB_RESET_ENDPOINT
{
495 } CMD_TRB_RESET_ENDPOINT
;
498 // 6.4.3.8 Stop Endpoint Command TRB
499 // The Stop Endpoint Command TRB command allows software to stop the xHC execution of the TDs on a
500 // Transfer Ring and temporarily take ownership of TDs that had previously been passed to the xHC.
502 typedef struct _CMD_TRB_STOP_ENDPOINT
{
514 } CMD_TRB_STOP_ENDPOINT
;
517 // 6.4.3.9 Set TR Dequeue Pointer Command TRB
518 // The Set TR Dequeue Pointer Command TRB is used by system software to modify the TR Dequeue
519 // Pointer and DCS fields of an Endpoint or Stream Context.
521 typedef struct _CMD_SET_TR_DEQ_POINTER
{
535 } CMD_SET_TR_DEQ_POINTER
;
539 // A Link TRB provides support for non-contiguous TRB Rings.
541 typedef struct _LINK_TRB
{
547 UINT32 InterTarget
:10;
560 // 6.2.2 Slot Context
562 typedef struct _SLOT_CONTEXT
{
563 UINT32 RouteString
:20;
568 UINT32 ContextEntries
:5;
570 UINT32 MaxExitLatency
:16;
571 UINT32 RootHubPortNum
:8;
574 UINT32 TTHubSlotId
:8;
578 UINT32 InterTarget
:10;
580 UINT32 DeviceAddress
:8;
590 typedef struct _SLOT_CONTEXT_64
{
591 UINT32 RouteString
:20;
596 UINT32 ContextEntries
:5;
598 UINT32 MaxExitLatency
:16;
599 UINT32 RootHubPortNum
:8;
602 UINT32 TTHubSlotId
:8;
606 UINT32 InterTarget
:10;
608 UINT32 DeviceAddress
:8;
631 // 6.2.3 Endpoint Context
633 typedef struct _ENDPOINT_CONTEXT
{
637 UINT32 MaxPStreams
:5;
647 UINT32 MaxBurstSize
:8;
648 UINT32 MaxPacketSize
:16;
654 UINT32 AverageTRBLength
:16;
655 UINT32 MaxESITPayload
:16;
662 typedef struct _ENDPOINT_CONTEXT_64
{
666 UINT32 MaxPStreams
:5;
676 UINT32 MaxBurstSize
:8;
677 UINT32 MaxPacketSize
:16;
683 UINT32 AverageTRBLength
:16;
684 UINT32 MaxESITPayload
:16;
700 } ENDPOINT_CONTEXT_64
;
704 // 6.2.5.1 Input Control Context
706 typedef struct _INPUT_CONTRL_CONTEXT
{
715 } INPUT_CONTRL_CONTEXT
;
717 typedef struct _INPUT_CONTRL_CONTEXT_64
{
734 } INPUT_CONTRL_CONTEXT_64
;
737 // 6.2.1 Device Context
739 typedef struct _DEVICE_CONTEXT
{
741 ENDPOINT_CONTEXT EP
[31];
744 typedef struct _DEVICE_CONTEXT_64
{
745 SLOT_CONTEXT_64 Slot
;
746 ENDPOINT_CONTEXT_64 EP
[31];
750 // 6.2.5 Input Context
752 typedef struct _INPUT_CONTEXT
{
753 INPUT_CONTRL_CONTEXT InputControlContext
;
755 ENDPOINT_CONTEXT EP
[31];
758 typedef struct _INPUT_CONTEXT_64
{
759 INPUT_CONTRL_CONTEXT_64 InputControlContext
;
760 SLOT_CONTEXT_64 Slot
;
761 ENDPOINT_CONTEXT_64 EP
[31];
766 Initialize the XHCI host controller for schedule.
768 @param Xhc The XHCI Instance to be initialized.
773 IN USB_XHCI_INSTANCE
*Xhc
777 Free the resouce allocated at initializing schedule.
779 @param Xhc The XHCI Instance.
784 IN USB_XHCI_INSTANCE
*Xhc
788 Ring the door bell to notify XHCI there is a transaction to be executed through URB.
790 @param Xhc The XHCI Instance.
791 @param Urb The URB to be rung.
793 @retval EFI_SUCCESS Successfully ring the door bell.
797 RingIntTransferDoorBell (
798 IN USB_XHCI_INSTANCE
*Xhc
,
803 Execute the transfer by polling the URB. This is a synchronous operation.
805 @param Xhc The XHCI Instance.
806 @param CmdTransfer The executed URB is for cmd transfer or not.
807 @param Urb The URB to execute.
808 @param Timeout The time to wait before abort, in millisecond.
810 @return EFI_DEVICE_ERROR The transfer failed due to transfer error.
811 @return EFI_TIMEOUT The transfer failed due to time out.
812 @return EFI_SUCCESS The transfer finished OK.
817 IN USB_XHCI_INSTANCE
*Xhc
,
818 IN BOOLEAN CmdTransfer
,
824 Delete a single asynchronous interrupt transfer for
825 the device and endpoint.
827 @param Xhc The XHCI Instance.
828 @param BusAddr The logical device address assigned by UsbBus driver.
829 @param EpNum The endpoint of the target.
831 @retval EFI_SUCCESS An asynchronous transfer is removed.
832 @retval EFI_NOT_FOUND No transfer for the device is found.
836 XhciDelAsyncIntTransfer (
837 IN USB_XHCI_INSTANCE
*Xhc
,
843 Remove all the asynchronous interrupt transfers.
845 @param Xhc The XHCI Instance.
849 XhciDelAllAsyncIntTransfers (
850 IN USB_XHCI_INSTANCE
*Xhc
856 @param Xhc The XHCI Instance.
860 XhcSetBiosOwnership (
861 IN USB_XHCI_INSTANCE
*Xhc
867 @param Xhc The XHCI Instance.
871 XhcClearBiosOwnership (
872 IN USB_XHCI_INSTANCE
*Xhc
876 Find out the slot id according to the device's route string.
878 @param Xhc The XHCI Instance.
879 @param RouteString The route string described the device location.
881 @return The slot id used by the device.
886 XhcRouteStringToSlotId (
887 IN USB_XHCI_INSTANCE
*Xhc
,
888 IN USB_DEV_ROUTE RouteString
892 Calculate the device context index by endpoint address and direction.
894 @param EpAddr The target endpoint number.
895 @param Direction The direction of the target endpoint.
897 @return The device context index of endpoint.
907 Ring the door bell to notify XHCI there is a transaction to be executed.
909 @param Xhc The XHCI Instance.
910 @param SlotId The slot id of the target device.
911 @param Dci The device context index of the target slot or endpoint.
913 @retval EFI_SUCCESS Successfully ring the door bell.
919 IN USB_XHCI_INSTANCE
*Xhc
,
925 Interrupt transfer periodic check handler.
927 @param Event Interrupt event.
928 @param Context Pointer to USB_XHCI_INSTANCE.
933 XhcMonitorAsyncRequests (
939 Monitor the port status change. Enable/Disable device slot if there is a device attached/detached.
941 @param Xhc The XHCI Instance.
942 @param ParentRouteChart The route string pointed to the parent device if it exists.
943 @param Port The port to be polled.
944 @param PortState The port state.
946 @retval EFI_SUCCESS Successfully enable/disable device slot according to port state.
947 @retval Others Should not appear.
952 XhcPollPortStatusChange (
953 IN USB_XHCI_INSTANCE
*Xhc
,
954 IN USB_DEV_ROUTE ParentRouteChart
,
956 IN EFI_USB_PORT_STATUS
*PortState
960 Evaluate the slot context for hub device through XHCI's Configure_Endpoint cmd.
962 @param Xhc The XHCI Instance.
963 @param SlotId The slot id to be configured.
964 @param PortNum The total number of downstream port supported by the hub.
965 @param TTT The TT think time of the hub device.
966 @param MTT The multi-TT of the hub device.
968 @retval EFI_SUCCESS Successfully configure the hub device's slot context.
972 XhcConfigHubContext (
973 IN USB_XHCI_INSTANCE
*Xhc
,
982 Evaluate the slot context for hub device through XHCI's Configure_Endpoint cmd.
984 @param Xhc The XHCI Instance.
985 @param SlotId The slot id to be configured.
986 @param PortNum The total number of downstream port supported by the hub.
987 @param TTT The TT think time of the hub device.
988 @param MTT The multi-TT of the hub device.
990 @retval EFI_SUCCESS Successfully configure the hub device's slot context.
994 XhcConfigHubContext64 (
995 IN USB_XHCI_INSTANCE
*Xhc
,
1004 Configure all the device endpoints through XHCI's Configure_Endpoint cmd.
1006 @param Xhc The XHCI Instance.
1007 @param SlotId The slot id to be configured.
1008 @param DeviceSpeed The device's speed.
1009 @param ConfigDesc The pointer to the usb device configuration descriptor.
1011 @retval EFI_SUCCESS Successfully configure all the device endpoints.
1017 IN USB_XHCI_INSTANCE
*Xhc
,
1019 IN UINT8 DeviceSpeed
,
1020 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
1025 Configure all the device endpoints through XHCI's Configure_Endpoint cmd.
1027 @param Xhc The XHCI Instance.
1028 @param SlotId The slot id to be configured.
1029 @param DeviceSpeed The device's speed.
1030 @param ConfigDesc The pointer to the usb device configuration descriptor.
1032 @retval EFI_SUCCESS Successfully configure all the device endpoints.
1038 IN USB_XHCI_INSTANCE
*Xhc
,
1040 IN UINT8 DeviceSpeed
,
1041 IN USB_CONFIG_DESCRIPTOR
*ConfigDesc
1046 Find out the actual device address according to the requested device address from UsbBus.
1048 @param Xhc The XHCI Instance.
1049 @param BusDevAddr The requested device address by UsbBus upper driver.
1051 @return The actual device address assigned to the device.
1056 XhcBusDevAddrToSlotId (
1057 IN USB_XHCI_INSTANCE
*Xhc
,
1062 Assign and initialize the device slot for a new device.
1064 @param Xhc The XHCI Instance.
1065 @param ParentRouteChart The route string pointed to the parent device.
1066 @param ParentPort The port at which the device is located.
1067 @param RouteChart The route string pointed to the device.
1068 @param DeviceSpeed The device speed.
1070 @retval EFI_SUCCESS Successfully assign a slot to the device and assign an address to it.
1075 XhcInitializeDeviceSlot (
1076 IN USB_XHCI_INSTANCE
*Xhc
,
1077 IN USB_DEV_ROUTE ParentRouteChart
,
1078 IN UINT16 ParentPort
,
1079 IN USB_DEV_ROUTE RouteChart
,
1080 IN UINT8 DeviceSpeed
1084 Assign and initialize the device slot for a new device.
1086 @param Xhc The XHCI Instance.
1087 @param ParentRouteChart The route string pointed to the parent device.
1088 @param ParentPort The port at which the device is located.
1089 @param RouteChart The route string pointed to the device.
1090 @param DeviceSpeed The device speed.
1092 @retval EFI_SUCCESS Successfully assign a slot to the device and assign an address to it.
1097 XhcInitializeDeviceSlot64 (
1098 IN USB_XHCI_INSTANCE
*Xhc
,
1099 IN USB_DEV_ROUTE ParentRouteChart
,
1100 IN UINT16 ParentPort
,
1101 IN USB_DEV_ROUTE RouteChart
,
1102 IN UINT8 DeviceSpeed
1106 Evaluate the endpoint 0 context through XHCI's Evaluate_Context cmd.
1108 @param Xhc The XHCI Instance.
1109 @param SlotId The slot id to be evaluated.
1110 @param MaxPacketSize The max packet size supported by the device control transfer.
1112 @retval EFI_SUCCESS Successfully evaluate the device endpoint 0.
1117 XhcEvaluateContext (
1118 IN USB_XHCI_INSTANCE
*Xhc
,
1120 IN UINT32 MaxPacketSize
1125 Evaluate the endpoint 0 context through XHCI's Evaluate_Context cmd.
1127 @param Xhc The XHCI Instance.
1128 @param SlotId The slot id to be evaluated.
1129 @param MaxPacketSize The max packet size supported by the device control transfer.
1131 @retval EFI_SUCCESS Successfully evaluate the device endpoint 0.
1136 XhcEvaluateContext64 (
1137 IN USB_XHCI_INSTANCE
*Xhc
,
1139 IN UINT32 MaxPacketSize
1144 Disable the specified device slot.
1146 @param Xhc The XHCI Instance.
1147 @param SlotId The slot id to be disabled.
1149 @retval EFI_SUCCESS Successfully disable the device slot.
1155 IN USB_XHCI_INSTANCE
*Xhc
,
1161 Disable the specified device slot.
1163 @param Xhc The XHCI Instance.
1164 @param SlotId The slot id to be disabled.
1166 @retval EFI_SUCCESS Successfully disable the device slot.
1171 XhcDisableSlotCmd64 (
1172 IN USB_XHCI_INSTANCE
*Xhc
,
1178 Synchronize the specified transfer ring to update the enqueue and dequeue pointer.
1180 @param Xhc The XHCI Instance.
1181 @param TrsRing The transfer ring to sync.
1183 @retval EFI_SUCCESS The transfer ring is synchronized successfully.
1189 IN USB_XHCI_INSTANCE
*Xhc
,
1190 TRANSFER_RING
*TrsRing
1194 Synchronize the specified event ring to update the enqueue and dequeue pointer.
1196 @param Xhc The XHCI Instance.
1197 @param EvtRing The event ring to sync.
1199 @retval EFI_SUCCESS The event ring is synchronized successfully.
1205 IN USB_XHCI_INSTANCE
*Xhc
,
1210 Check if there is a new generated event.
1212 @param Xhc The XHCI Instance.
1213 @param EvtRing The event ring to check.
1214 @param NewEvtTrb The new event TRB found.
1216 @retval EFI_SUCCESS Found a new event TRB at the event ring.
1217 @retval EFI_NOT_READY The event ring has no new event.
1223 IN USB_XHCI_INSTANCE
*Xhc
,
1224 IN EVENT_RING
*EvtRing
,
1225 OUT TRB_TEMPLATE
**NewEvtTrb
1229 Create XHCI transfer ring.
1231 @param Xhc The XHCI Instance.
1232 @param TrbNum The number of TRB in the ring.
1233 @param TransferRing The created transfer ring.
1237 CreateTransferRing (
1238 IN USB_XHCI_INSTANCE
*Xhc
,
1240 OUT TRANSFER_RING
*TransferRing
1244 Create XHCI event ring.
1246 @param Xhc The XHCI Instance.
1247 @param EventRing The created event ring.
1252 IN USB_XHCI_INSTANCE
*Xhc
,
1253 OUT EVENT_RING
*EventRing
1257 System software shall use a Reset Endpoint Command (section 4.11.4.7) to remove the Halted
1258 condition in the xHC. After the successful completion of the Reset Endpoint Command, the Endpoint
1259 Context is transitioned from the Halted to the Stopped state and the Transfer Ring of the endpoint is
1260 reenabled. The next write to the Doorbell of the Endpoint will transition the Endpoint Context from the
1261 Stopped to the Running state.
1263 @param Xhc The XHCI Instance.
1264 @param Urb The urb which makes the endpoint halted.
1266 @retval EFI_SUCCESS The recovery is successful.
1267 @retval Others Failed to recovery halted endpoint.
1272 XhcRecoverHaltedEndpoint (
1273 IN USB_XHCI_INSTANCE
*Xhc
,
1278 Create a new URB for a new transaction.
1280 @param Xhc The XHCI Instance
1281 @param DevAddr The device address
1282 @param EpAddr Endpoint addrress
1283 @param DevSpeed The device speed
1284 @param MaxPacket The max packet length of the endpoint
1285 @param Type The transaction type
1286 @param Request The standard USB request for control transfer
1287 @param Data The user data to transfer
1288 @param DataLen The length of data buffer
1289 @param Callback The function to call when data is transferred
1290 @param Context The context to the callback
1292 @return Created URB or NULL
1297 IN USB_XHCI_INSTANCE
*Xhc
,
1303 IN EFI_USB_DEVICE_REQUEST
*Request
,
1306 IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback
,
1311 Free an allocated URB.
1313 @param Xhc The XHCI device.
1314 @param Urb The URB to free.
1319 IN USB_XHCI_INSTANCE
*Xhc
,
1324 Create a transfer TRB.
1326 @param Xhc The XHCI Instance
1327 @param Urb The urb used to construct the transfer TRB.
1329 @return Created TRB or NULL
1333 XhcCreateTransferTrb (
1334 IN USB_XHCI_INSTANCE
*Xhc
,